From patchwork Tue Mar 20 08:00:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 132133 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp544621ljb; Tue, 20 Mar 2018 01:00:35 -0700 (PDT) X-Google-Smtp-Source: AG47ELt3XiH3B3QP0CEcyCGL4Orx3zDrVhlU36LDcvHDfXW0EI4YnVrsp+4a8v6X63rImSqJGJ5m X-Received: by 10.98.144.65 with SMTP id a62mr12743202pfe.96.1521532835257; Tue, 20 Mar 2018 01:00:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521532835; cv=none; d=google.com; s=arc-20160816; b=PtNgpeueiQ6Z3l4ja/dn4bYYZQwp/Zsh9gRKrNxvyFlvvEEqCtkDVsV5OV0+1EW5d5 cEBpqnU/r8lOVe8hfdkDiOFOTgqX92+PU1W9aIkaY4BDfj3al9YYvUWQp7R1hXb/6lA4 uAIf7dwCU356l/m3uUDM6QJsLbepKJclLry7ClB3KZT4cbNi5ckNJfkO7QQLHF6Fghja PSnk1PJtSiotL/0BxnKFG+dAb4hsS4SSkZk2zwXSapbmOkxNvDBNxEjgwieoxDfY61Tj Ct2l4a/jNRB34810Mtj+7vAvhkVwBWkDpgzju4+UP21A279jrVEbwXwEjsKtT1bI5XFz z9qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=FMFHk33/zviiPonsTt38yr6Jpuo4A7EqgXuxlxPGmvo=; b=Qbz1D3AXmffg5k00H6y+K3Jx2itDCKPROnxvxcXeUucrZkvZDDQvgij2MYu8nPNuuv qNVHGxfGwRaXYuGuZfMZw2EhltWA+RfVtWuZQAZ3N6tLxNHkuIJdO5l4pSZ1fnassUii Y5V1i9DANuw/7ifDZqKMKOW39386BLZ85HLRB3Acdlehi+MniMDQbfKLz0YCQo4gAdXF 25QrIGARtSzFJe3ToQHWZ8EHS6RHLe6nCCYdjC1peGL00W4wuQOALDMgv/Nxtu2LykW4 R8+1PfCtmlKMWdsM+yHunspB2JjlHFKV8aArPnbA+mwUj6sOEVq28oWI0dha11Nj6Kim obPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eP4Og3zJ; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 31-v6si1115343pli.653.2018.03.20.01.00.35; Tue, 20 Mar 2018 01:00:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eP4Og3zJ; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751858AbeCTIAe (ORCPT + 11 others); Tue, 20 Mar 2018 04:00:34 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:35002 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751527AbeCTIAd (ORCPT ); Tue, 20 Mar 2018 04:00:33 -0400 Received: by mail-pg0-f68.google.com with SMTP id d1so340318pgv.2 for ; Tue, 20 Mar 2018 01:00:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FMFHk33/zviiPonsTt38yr6Jpuo4A7EqgXuxlxPGmvo=; b=eP4Og3zJ+e0d4PyOxLLy/VkOTI8LRLa1OW9ZCmECDxvYpnM+uyyKgOwh5HRMnBK70I EmYQwgwwDp5mr2GdxVC3jyroK3WT200dIDFVFO6Sg+bWUj9WOCRtOhK8YlbXRaXYsRth Zmjpe3iHp7/yb+Zn/qdLcHVO+GuAi0HbqQ6vc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FMFHk33/zviiPonsTt38yr6Jpuo4A7EqgXuxlxPGmvo=; b=cAmETrvukYH5Er7dOK//N+hE1AdhTNdtdpE84Z5BSbrnxy3dfXvFAL5Ck1ZZwBSPTF CxUaOQ4tbmbtjJyTsUu3WirQa97Kb43FBh3BgxCMok2NvLr85OUPL7ezBlUz7X7i8C56 IXbC8IdDQ8FS3eR+3wK20FWvvwWnworjWF7HuyBwwlfZNOjqPkVmzVIRQr3e4PiLdSqv lNxCowo7vh+avs4lqUskPWQOrP93sEeNxjPFMGTZXq4QgITNlpZ/VqRxvQ3MsL0Ls7oo 08WAfY2VYo6shgCBJU6SW08lkKndmn5WThbXiJfeZV4DitxcTN8wtnvvGVlVcNEQTsfV HE4Q== X-Gm-Message-State: AElRT7HScTdYZ2Akk3P8LSvMsrDl1SiY+rrdPgdds+ZZE6YHPMIVnRVi hVZ4NdJKBNxpPwLRJz9rAWo3jUC8F7M= X-Received: by 10.101.68.141 with SMTP id l13mr11616098pgq.216.1521532832641; Tue, 20 Mar 2018 01:00:32 -0700 (PDT) Received: from localhost ([218.255.99.6]) by smtp.gmail.com with ESMTPSA id h75sm2225946pfh.28.2018.03.20.01.00.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Mar 2018 01:00:31 -0700 (PDT) From: Sam Protsenko To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , Praneeth Bajjuri , Sekhar Nori , Roger Quadros , Tero Kristo , Milosz Wasilewski , Dan Rue Subject: [PATCH 1/3] ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIs Date: Tue, 20 Mar 2018 16:00:25 +0800 Message-Id: <20180320080027.8948-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180320080027.8948-1-semen.protsenko@linaro.org> References: <20180320080027.8948-1-semen.protsenko@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Tero Kristo commit 1d9a5425654de6bb141c7ca1d5dde120ee8c5430 upstream. The previous implementation was racy in many locations, where the current status of the clockdomain was read out, some operations were executed, and the previous status info was used afterwards to decide next state for the clockdomain. Instead, fix the implementation of the allow_idle / deny_idle APIs to properly have usecounting support. This allows clean handling internally within the clockdomain core, and simplifies the usage also within hwmod. Signed-off-by: Tero Kristo Signed-off-by: Tony Lindgren Signed-off-by: Sam Protsenko --- arch/arm/mach-omap2/clockdomain.c | 36 ++++++++++++++++++++++++------------ arch/arm/mach-omap2/clockdomain.h | 2 ++ arch/arm/mach-omap2/cpuidle44xx.c | 2 +- arch/arm/mach-omap2/omap-smp.c | 2 +- arch/arm/mach-omap2/omap_hwmod.c | 27 ++++++++++++--------------- arch/arm/mach-omap2/pm.c | 8 +------- arch/arm/mach-omap2/powerdomain.c | 20 ++++++-------------- 7 files changed, 47 insertions(+), 50 deletions(-) -- 2.16.1 diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 2da3b5ec010c..b79b1ca9aee9 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -465,10 +465,7 @@ int clkdm_complete_init(void) return -EACCES; list_for_each_entry(clkdm, &clkdm_list, node) { - if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) - clkdm_wakeup(clkdm); - else if (clkdm->flags & CLKDM_CAN_DISABLE_AUTO) - clkdm_deny_idle(clkdm); + clkdm_deny_idle(clkdm); _resolve_clkdm_deps(clkdm, clkdm->wkdep_srcs); clkdm_clear_all_wkdeps(clkdm); @@ -925,11 +922,20 @@ void clkdm_allow_idle_nolock(struct clockdomain *clkdm) if (!clkdm) return; - if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { - pr_debug("clock: %s: automatic idle transitions cannot be enabled\n", - clkdm->name); + if (!WARN_ON(!clkdm->forcewake_count)) + clkdm->forcewake_count--; + + if (clkdm->forcewake_count) + return; + + if (!clkdm->usecount && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) + clkdm_sleep_nolock(clkdm); + + if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) + return; + + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) return; - } if (!arch_clkdm || !arch_clkdm->clkdm_allow_idle) return; @@ -974,11 +980,17 @@ void clkdm_deny_idle_nolock(struct clockdomain *clkdm) if (!clkdm) return; - if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { - pr_debug("clockdomain: %s: automatic idle transitions cannot be disabled\n", - clkdm->name); + if (clkdm->forcewake_count++) + return; + + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) + clkdm_wakeup_nolock(clkdm); + + if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) + return; + + if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) return; - } if (!arch_clkdm || !arch_clkdm->clkdm_deny_idle) return; diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 2c398ce1a0f2..24667a5a9dc0 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -114,6 +114,7 @@ struct omap_hwmod; * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact * @usecount: Usecount tracking + * @forcewake_count: Usecount for forcing the domain active * @node: list_head to link all clockdomains together * * @prcm_partition should be a macro from mach-omap2/prcm44xx.h (OMAP4 only) @@ -138,6 +139,7 @@ struct clockdomain { struct clkdm_dep *wkdep_srcs; struct clkdm_dep *sleepdep_srcs; int usecount; + int forcewake_count; struct list_head node; }; diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 4b8e9f4d59ea..fa138d4032b6 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -140,7 +140,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, mpuss_can_lose_context) gic_dist_disable(); - clkdm_wakeup(cpu_clkdm[1]); + clkdm_deny_idle(cpu_clkdm[1]); omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); clkdm_allow_idle(cpu_clkdm[1]); diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 79e1f876d1c9..a1c02193d914 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -143,7 +143,7 @@ static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle) * Ensure that CPU power state is set to ON to avoid CPU * powerdomain transition on wfi */ - clkdm_wakeup_nolock(cpu1_clkdm); + clkdm_deny_idle_nolock(cpu1_clkdm); pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON); clkdm_allow_idle_nolock(cpu1_clkdm); diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 147c90e70b2e..c1c0fda2f71e 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1678,7 +1678,6 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; int ret = -EINVAL; - int hwsup = 0; if (!oh) return -EINVAL; @@ -1696,7 +1695,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) * might not be completed. The clockdomain can be set * in HW_AUTO only when the module become ready. */ - hwsup = clkdm_in_hwsup(oh->clkdm); + clkdm_deny_idle(oh->clkdm); ret = clkdm_hwmod_enable(oh->clkdm, oh); if (ret) { WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", @@ -1723,8 +1722,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) * Set the clockdomain to HW_AUTO, assuming that the * previous state was HW_AUTO. */ - if (hwsup) - clkdm_allow_idle(oh->clkdm); + clkdm_allow_idle(oh->clkdm); clkdm_hwmod_disable(oh->clkdm, oh); } @@ -2078,7 +2076,6 @@ static int _enable_preprogram(struct omap_hwmod *oh) static int _enable(struct omap_hwmod *oh) { int r; - int hwsup = 0; pr_debug("omap_hwmod: %s: enabling\n", oh->name); @@ -2138,8 +2135,7 @@ static int _enable(struct omap_hwmod *oh) * completely the module. The clockdomain can be set * in HW_AUTO only when the module become ready. */ - hwsup = clkdm_in_hwsup(oh->clkdm) && - !clkdm_missing_idle_reporting(oh->clkdm); + clkdm_deny_idle(oh->clkdm); r = clkdm_hwmod_enable(oh->clkdm, oh); if (r) { WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", @@ -2159,14 +2155,10 @@ static int _enable(struct omap_hwmod *oh) r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : -EINVAL; - if (!r) { - /* - * Set the clockdomain to HW_AUTO only if the target is ready, - * assuming that the previous state was HW_AUTO - */ - if (oh->clkdm && hwsup) - clkdm_allow_idle(oh->clkdm); + if (oh->clkdm) + clkdm_allow_idle(oh->clkdm); + if (!r) { oh->_state = _HWMOD_STATE_ENABLED; /* Access the sysconfig only if the target is ready */ @@ -2220,6 +2212,9 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); + if (oh->clkdm) + clkdm_deny_idle(oh->clkdm); + if (oh->flags & HWMOD_BLOCK_WFI) cpu_idle_poll_ctrl(false); if (soc_ops.disable_module) @@ -2232,8 +2227,10 @@ static int _idle(struct omap_hwmod *oh) * transition to complete properly. */ _disable_clocks(oh); - if (oh->clkdm) + if (oh->clkdm) { + clkdm_allow_idle(oh->clkdm); clkdm_hwmod_disable(oh->clkdm, oh); + } /* Mux pins for device idle if populated */ if (oh->mux && oh->mux->pads_dynamic) { diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 58920bc8807b..644e0fedc8eb 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -110,13 +110,7 @@ static void __init omap2_init_processor_devices(void) int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused) { - /* XXX The usecount test is racy */ - if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) && - !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING)) - clkdm_allow_idle(clkdm); - else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && - clkdm->usecount == 0) - clkdm_sleep(clkdm); + clkdm_allow_idle(clkdm); return 0; } diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 78af6d8cf2e2..be7a9761ab3f 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -222,7 +222,6 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) * @pwrdm: struct powerdomain * to operate on * @curr_pwrst: current power state of @pwrdm * @pwrst: power state to switch to - * @hwsup: ptr to a bool to return whether the clkdm is hardware-supervised * * Determine whether the powerdomain needs to be turned on before * attempting to switch power states. Called by @@ -233,8 +232,7 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused) * "Types of sleep_switch" comment above). */ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, - u8 curr_pwrst, u8 pwrst, - bool *hwsup) + u8 curr_pwrst, u8 pwrst) { u8 sleep_switch; @@ -244,8 +242,7 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, arch_pwrdm->pwrdm_set_lowpwrstchange) { sleep_switch = LOWPOWERSTATE_SWITCH; } else { - *hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); - clkdm_wakeup_nolock(pwrdm->pwrdm_clkdms[0]); + clkdm_deny_idle_nolock(pwrdm->pwrdm_clkdms[0]); sleep_switch = FORCEWAKEUP_SWITCH; } } else { @@ -259,7 +256,6 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, * _pwrdm_restore_clkdm_state - restore the clkdm hwsup state after pwrst change * @pwrdm: struct powerdomain * to operate on * @sleep_switch: return value from _pwrdm_save_clkdm_state_and_activate() - * @hwsup: should @pwrdm's first clockdomain be set to hardware-supervised mode? * * Restore the clockdomain state perturbed by * _pwrdm_save_clkdm_state_and_activate(), and call the power state @@ -270,14 +266,11 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm, * software-supervised sleep. No return value. */ static void _pwrdm_restore_clkdm_state(struct powerdomain *pwrdm, - u8 sleep_switch, bool hwsup) + u8 sleep_switch) { switch (sleep_switch) { case FORCEWAKEUP_SWITCH: - if (hwsup) - clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]); - else - clkdm_sleep_nolock(pwrdm->pwrdm_clkdms[0]); + clkdm_allow_idle_nolock(pwrdm->pwrdm_clkdms[0]); break; case LOWPOWERSTATE_SWITCH: if (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE && @@ -1092,7 +1085,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) u8 next_pwrst, sleep_switch; int curr_pwrst; int ret = 0; - bool hwsup = false; if (!pwrdm || IS_ERR(pwrdm)) return -EINVAL; @@ -1116,14 +1108,14 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst) goto osps_out; sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst, - pwrst, &hwsup); + pwrst); ret = pwrdm_set_next_pwrst(pwrdm, pwrst); if (ret) pr_err("%s: unable to set power state of powerdomain: %s\n", __func__, pwrdm->name); - _pwrdm_restore_clkdm_state(pwrdm, sleep_switch, hwsup); + _pwrdm_restore_clkdm_state(pwrdm, sleep_switch); osps_out: pwrdm_unlock(pwrdm); From patchwork Tue Mar 20 08:00:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 132134 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp544673ljb; Tue, 20 Mar 2018 01:00:37 -0700 (PDT) X-Google-Smtp-Source: AG47ELv4GQL+BOWkczPoeltUze7eQ+TifE0d1eQKctv0JyLX4wbAtErH8eobK3Beih7wN3LfimTU X-Received: by 2002:a17:902:8d96:: with SMTP id v22-v6mr8488155plo.373.1521532837493; Tue, 20 Mar 2018 01:00:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521532837; cv=none; d=google.com; s=arc-20160816; b=kw0SixfkrPUcSOacguZkYOyE2vc3y1qLxyxZpZqxgp/fnSE7GDPYptZiQOyb9iDpWk CC/VocpQ98nzY7W+gSdxLkN8B2S4Zkh797zXL7U/HfKEQc+pX4frODVWzH/agdt7xT1k fdfeUSQI94duM3FMf/IEOvi06zBrDcgbRRjQKayIbK0upYg2fl44pwCU62ONMumhkOD+ tAS/alIn3Y5YV/3SVHowEDJmbW4ouOorY1JBMjfwIqS7Y0g4GyDeLc9+wTDuAG0e8cQY wR3AdHZCRxeyexPq50wdijFQjUw18io3pFkpcP0zg70pzTJCjdsiq5UKQcdHJcW8HV2v iYcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=hzV4I9gWFqxQKQqmwVNTsvAO/759WXRXIVI7yRnhB+8=; b=q9NpkNqihY0qPqqaKGuQh0yH3GfQN05/4CrbTOI0ymlCXAuW0vWifcoxwxHYQ8Uf5N +A3z9L3zh9J4w8XpnxV/+wjjUvUg0PDs/f2j2QSRWu15gH968JCAHH6d/rB+cZ8XL6Va V7hhdAzcvUWkrfBVT76QB6KRM2AuHcEHOAMrkMesb36eKNohDjP0/cs6/qLF8TcPG3zU haPtL+vvDgqW5hDa2vTRwwO0njcyG00dvairxAlh6Y1SOb7WSd5/wjK638uVAqUchVQ3 W2QMrLsbAJ8qjs1cjhd40AAfNJp6HIaeTIwp0QnRKeLBPtd0Kbhe6T2YjsJItgy1sW+L upJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qug8WjDy; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 31-v6si1115343pli.653.2018.03.20.01.00.37; Tue, 20 Mar 2018 01:00:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qug8WjDy; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751873AbeCTIAg (ORCPT + 11 others); Tue, 20 Mar 2018 04:00:36 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:42077 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751527AbeCTIAg (ORCPT ); Tue, 20 Mar 2018 04:00:36 -0400 Received: by mail-pl0-f68.google.com with SMTP id w15-v6so512448plq.9 for ; Tue, 20 Mar 2018 01:00:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hzV4I9gWFqxQKQqmwVNTsvAO/759WXRXIVI7yRnhB+8=; b=Qug8WjDygyXrUYXrtV9CfnrgjZlhq9blXJrutuZzSC2BsEeWKjXV3ApmSHADAsvn3b RiyI2SmF27vXb//vFGgrJ3bVdts5SYdAcWi8aGUEyVmd9nDowozt8tLLNDhUV8cyjfzm 09vNki8twXPBMtGwKyzuF9Vz80cFWtK+pCEpQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hzV4I9gWFqxQKQqmwVNTsvAO/759WXRXIVI7yRnhB+8=; b=iFxeVQVqgsa9beyxPfX7PLgUUqr3wlJruIGrc+UTnvZRcO3IFcbMZXax5GdBijFZBv ZD/REi2+oTOC0YCNoVJyRZctYbbh9RCSsLsRdRE8fAg08GOzKzzz8lMzO2IxMGRoiD4x +syH+P4rQftsLgH7ENCCaDqy1Xad3E7RC2BK0eyXRnQaLU+eoyZkwtLSyMqlSlF9ExSb ellD0lvWDR1qMjnxZj0tWw+01SBH6sIGqgHQRdVXP1LOC1XrPrPWc6PiLuzEIPqME+Qw kPTlUfaIUgzzsW4Yy8dvhHf7SBws0I8K6/HPTNtPOfolXG683bvJzxdNU/4g0fgtE8Bb zimg== X-Gm-Message-State: AElRT7FGSCQ1ZXOKi9RpREC+sq8UlFgEBt+SjXCcldPygta9Aug4453S C10cAOJQX2x3siGZoJsm54xXMoTXIws= X-Received: by 2002:a17:902:6b81:: with SMTP id p1-v6mr15674459plk.181.1521532835394; Tue, 20 Mar 2018 01:00:35 -0700 (PDT) Received: from localhost ([218.255.99.6]) by smtp.gmail.com with ESMTPSA id z85sm2329407pfd.104.2018.03.20.01.00.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Mar 2018 01:00:34 -0700 (PDT) From: Sam Protsenko To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , Praneeth Bajjuri , Sekhar Nori , Roger Quadros , Tero Kristo , Milosz Wasilewski , Dan Rue Subject: [PATCH 2/3] ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO Date: Tue, 20 Mar 2018 16:00:26 +0800 Message-Id: <20180320080027.8948-3-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180320080027.8948-1-semen.protsenko@linaro.org> References: <20180320080027.8948-1-semen.protsenko@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Roger Quadros commit 8ff42da411474893ae373d4280ea88954fa97fcc upstream. Introduce HWMOD_CLKDM_NOAUTO flag that allows the hwmod's clockdomain to be prevented from HW_AUTO while the hwmod is active. This is needed to workaround some modules which don't function correctly with HW_AUTO. e.g. DCAN on DRA7. Signed-off-by: Roger Quadros [nsekhar@ti.com: rebased to v4.9 kernel] Signed-off-by: Sekhar Nori Signed-off-by: Tony Lindgren Signed-off-by: Sam Protsenko --- arch/arm/mach-omap2/omap_hwmod.c | 9 +++++++-- arch/arm/mach-omap2/omap_hwmod.h | 5 +++++ 2 files changed, 12 insertions(+), 2 deletions(-) -- 2.16.1 diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index c1c0fda2f71e..32dcfca42fca 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -2155,7 +2155,7 @@ static int _enable(struct omap_hwmod *oh) r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : -EINVAL; - if (oh->clkdm) + if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) clkdm_allow_idle(oh->clkdm); if (!r) { @@ -2212,7 +2212,12 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - if (oh->clkdm) + /* + * If HWMOD_CLKDM_NOAUTO is set then we don't + * deny idle the clkdm again since idle was already denied + * in _enable() + */ + if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO)) clkdm_deny_idle(oh->clkdm); if (oh->flags & HWMOD_BLOCK_WFI) diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 7c7a31169475..f772f6c77125 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -527,6 +527,10 @@ struct omap_hwmod_omap4_prcm { * operate and they need to be handled at the same time as the main_clk. * HWMOD_NO_IDLE: Do not idle the hwmod at all. Useful to handle certain * IPs like CPSW on DRA7, where clocks to this module cannot be disabled. + * HWMOD_CLKDM_NOAUTO: Allows the hwmod's clockdomain to be prevented from + * entering HW_AUTO while hwmod is active. This is needed to workaround + * some modules which don't function correctly with HW_AUTO. For example, + * DCAN on DRA7x SoC needs this to workaround errata i893. */ #define HWMOD_SWSUP_SIDLE (1 << 0) #define HWMOD_SWSUP_MSTANDBY (1 << 1) @@ -544,6 +548,7 @@ struct omap_hwmod_omap4_prcm { #define HWMOD_RECONFIG_IO_CHAIN (1 << 13) #define HWMOD_OPT_CLKS_NEEDED (1 << 14) #define HWMOD_NO_IDLE (1 << 15) +#define HWMOD_CLKDM_NOAUTO (1 << 16) /* * omap_hwmod._int_flags definitions From patchwork Tue Mar 20 08:00:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 132135 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp544717ljb; Tue, 20 Mar 2018 01:00:40 -0700 (PDT) X-Google-Smtp-Source: AG47ELtpT2JYOyIpugpCCiishIoQ/rR8si9DI9c1qnwKLzOTiWs3rvNCSjlZqc/+Py1jtfou5ama X-Received: by 2002:a17:902:be14:: with SMTP id r20-v6mr15397171pls.302.1521532839992; Tue, 20 Mar 2018 01:00:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1521532839; cv=none; d=google.com; s=arc-20160816; b=qlmWFylZFhLrmzJ25jrstFW/sLrSoMriDc5DXcvs1dCwKYmMQFYOpzffQETA+tCOKz cbceL4bQrsxsgg0iF3p+yoyPsylNMN7anJ0S/e8pruo9Wgpxc/fYvUyDg6san/z/9egM YYqWPspfkRbsDVpatsu8PBE/ajld8tQhzRV1xY1lOcUNZdB98rWldBvYDTk2/gjNVsSG TQNJW3jePXo9TU+Q9a68ZWNN1Crj3SklmC4NMcMEBp8j4yYQzQliWoSCEY+qHrsrc/aY egn3ZzVkE+8suKuws99PflsOAh3uCRRuPtEyKZVDbRchoOao8r1ELwyepYYH36valE4c 8Xwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=liAoQPvWWznmFf2ow7XPd/Q8/3w9/yzAbwzzeB+q6CA=; b=0x3cPTzfMeZgdaK7CeBUxczAy7EbHII6/qeiCcX6bP07vvqYNMY6aHqF+GgcNpdSFn UxCvmmPbqqMVDZgTuqYfHgiN261M4/fe0GZ3w5d+2ev7hqIJ7ag+6WwPFWffU2giD4D9 tK9INhbKc61JyKzqDhxldpu6xNoJmOQVv0IEE2M7nbZI7fVrq8ALI5Ix5POkXIskxAAZ W+PM0VtH9VGqHnuPWbQXzoINTishK7BaSP79DHncKT/OyrjpegxPi1HfhxVr4n/v+1hB 0t+zvduiFZ978wcfSY1aJnVaj9AN6UWU100MSh176NSkyL2k8vp8K5uXrV5A4U64cJ1p dyFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VYDYjn3L; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 31-v6si1115343pli.653.2018.03.20.01.00.39; Tue, 20 Mar 2018 01:00:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VYDYjn3L; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751892AbeCTIAj (ORCPT + 11 others); Tue, 20 Mar 2018 04:00:39 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:36472 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751527AbeCTIAi (ORCPT ); Tue, 20 Mar 2018 04:00:38 -0400 Received: by mail-pl0-f67.google.com with SMTP id 61-v6so522689plf.3 for ; Tue, 20 Mar 2018 01:00:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=liAoQPvWWznmFf2ow7XPd/Q8/3w9/yzAbwzzeB+q6CA=; b=VYDYjn3Lk9iu9ppFJSn1wpCWPVlJOdJaUVp6cAnlLBq/7+bgMqWR+bBMV7gvkCTgom iCn/FVdpd0cHehReTjLRc3fZr9w+EuNXYucZ+RHZYJ05nZiQ8wJquOJK7T5cwz5xXErc 1QuAH2bGC6KYH+mJ3QHEvN8HaSc3FM2+so6TQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=liAoQPvWWznmFf2ow7XPd/Q8/3w9/yzAbwzzeB+q6CA=; b=nj5zwyOhJVoBy9tLVmfHTzFb/Hv+h1bjAeckeYb9IdZ2Be5vUcrHF/Uj9w8bPE83ON V6VWma6vXRvRjmdp3He084K7RjpowKaNowPA+k+IrpnS3mtJUt9b6fuc6xVykeiBJE32 q6n+QEWfhihR5J0w0R9XPCYME1SQCoEQKH0zK+euhykKA/jVoppgvijRKr2KnhX69VAM WSnYaqOKZk0/cmIYov7/l8ZvOgAsV6Eo42Tmzusw+XlOSDKdLsqzpc2mNW2A/1yyQht0 E5RI0GLoMOytfT+W8GBlyOCbOfX3i3RTsy5eUYJ06ArNUHgX+qaWBzYZq+YGO5tH/RUm 2PMg== X-Gm-Message-State: AElRT7FPUe6oxuXw0ZO3E6kPoFMmFVDPDnsuMuCMlsG2mlIalg5hJdA9 pGW+wo/WqXtplgOC7ZAi2ZoAaGTN7VI= X-Received: by 2002:a17:902:b18d:: with SMTP id s13-v6mr10218757plr.120.1521532837799; Tue, 20 Mar 2018 01:00:37 -0700 (PDT) Received: from localhost ([218.255.99.6]) by smtp.gmail.com with ESMTPSA id d77sm2284715pfe.20.2018.03.20.01.00.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Mar 2018 01:00:37 -0700 (PDT) From: Sam Protsenko To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , Praneeth Bajjuri , Sekhar Nori , Roger Quadros , Tero Kristo , Milosz Wasilewski , Dan Rue Subject: [PATCH 3/3] ARM: OMAP2+: omap_hwmod: provide space for more hwmod flags Date: Tue, 20 Mar 2018 16:00:27 +0800 Message-Id: <20180320080027.8948-4-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.16.1 In-Reply-To: <20180320080027.8948-1-semen.protsenko@linaro.org> References: <20180320080027.8948-1-semen.protsenko@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Sekhar Nori commit 390c06828dd22549706946113a0783cb8e2a3240 upstream. 'flags' member of omap_hwmod structure is fast running out of space with 16 different flags already defined. Make flags a 32-bit entity so as to allow for more flags. This results is a ~2.3K data section size increase with omap2plus_defconfig on v4.11-rc2. before: text data bss dec hex filename 8186930 3082444 8252992 19522366 129e33e vmlinux after: text data bss dec hex filename 8186922 3084812 8252992 19524726 129ec76 vmlinux Signed-off-by: Sekhar Nori Signed-off-by: Tony Lindgren Signed-off-by: Sam Protsenko --- arch/arm/mach-omap2/omap_hwmod.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.16.1 diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index f772f6c77125..c320bbe2ff35 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -699,7 +699,7 @@ struct omap_hwmod { struct list_head node; struct omap_hwmod_ocp_if *_mpu_port; unsigned int (*xlate_irq)(unsigned int); - u16 flags; + u32 flags; u8 mpu_rt_idx; u8 response_lat; u8 rst_lines_cnt;