From patchwork Tue Feb 16 11:17:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 383276 Delivered-To: patch@linaro.org Received: by 2002:a02:c80e:0:0:0:0:0 with SMTP id p14csp1859444jao; Tue, 16 Feb 2021 03:18:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJyrLNTe+IjEVQM8ofQSp3S3Uc/Byn4UtzMWce5lhe3cNjnI+H4zPpVk5p75NMqT1Y/7/hdL X-Received: by 2002:a17:906:d8ca:: with SMTP id re10mr20064224ejb.18.1613474296184; Tue, 16 Feb 2021 03:18:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1613474296; cv=none; d=google.com; s=arc-20160816; b=soJDBCqabKoWDAiByZvJ2QJ24tCprxaZqIEFe6ZgKpuCEueBre0Bxk/O9PGMspc4/U qwW8WszSRl1uDHfKAXlW45oV3kV5CGMTwY+o2mJW4K63+6T0onxC59OHG+3c08eD9ZyC fzDkcY5VPZSzHjHlIhvdjD0gBVMdKheCn5MvR1FJ7+epOQ1wx341WRFTs4LO6k63XRpe FkT0Tjjwga1FpWe0q64Q7qISQWjTtgmSlk+XYAConkL98rOI1FY9iaUYON8goX5tQmvW mdeDEZpeWMFW620BAb5elQEdv1Lym2ItjrfNxD7dJx4JM/iYdbnyW3cfV2LIomIHMM9F kwIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=HUX9qpMq+zLKMiJoR8Fqugmc6dBOYPaYK9KPjo68VyQ=; b=Izgb4DHy7pcbxseOQwLFUAKAjiTSe83Y27F3I6vtqFTL3d0Za73qymp3NxSE7+YpMP prmN3Ds/KK0CJyJZlVUH+Wa4XBwrm9PPJYJK2PlVtef+s5aPcsxIX25PCq/Eq0BqBtJF qMnmh0OwGj0J1lASpZxtVMlB2BqD1nnLjP0GhH6UX4HKJ8eeu8yrKt62hqRPOfpbS1id CE/5aCopzvv9oevY1Hfq20XZd1AnjLHTdzBXJVjcMQhOxkU5hfh/i+k3s36YAae/g/r+ XJxikkEB0OsMAmNsNDUxE1CIjRrfRVjMSlwmm7ykyfYC18K1ptEojA7lSoJfM6P7hCfN 8b0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mLm6BEdu; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id sb16si6305789ejb.46.2021.02.16.03.18.15; Tue, 16 Feb 2021 03:18:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=mLm6BEdu; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230153AbhBPLSJ (ORCPT + 16 others); Tue, 16 Feb 2021 06:18:09 -0500 Received: from mail.kernel.org ([198.145.29.99]:37472 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230203AbhBPLR5 (ORCPT ); Tue, 16 Feb 2021 06:17:57 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 4981564DDA; Tue, 16 Feb 2021 11:17:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1613474235; bh=4V2U/z8BogReCgHyBWSvZkjIKdtYA2RLgt81IN7Hs34=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mLm6BEduKdJUpu2Q8xrnhemcuHrH6kLhboY/IyyHrV0B+h0rr1f0ZJztS3bVQK6rm j88rc1d4gXvgPeIAJ1LAqQQwYqqXDVH208G6iwQcXRs7q3ZS61wCH+5EVi+E5HrM5P EBgs8By+R1UmF0gz4lxYDwAiuvlO1Wi6qY/GYp0eFRE/Irb7e4RPx/FlWOY8Z5CW8M 6suUETSB1wtLQHvLHcTaNIJeTjPDcsEQt93ntDku8RMP2ksRwqlTeg3BulFB1Hl8VM DfKRkzmLMaV9lkop+LFyOiXuqrLXAB9JFqxt+BPvJ3fuHzTgcVfk7r3HivTPS5k2z4 MfrZ2qlswiUtQ== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , linux-kernel@vger.kernel.org Subject: [PATCH 7/6] arm64: dts: qcom: sm8350: Add cpufreq node Date: Tue, 16 Feb 2021 16:47:03 +0530 Message-Id: <20210216111703.1838663-1-vkoul@kernel.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210212115532.1339942-8-vkoul@kernel.org> References: <20210212115532.1339942-8-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add cpufreq node and reference it for the CPUs. Signed-off-by: Vinod Koul --- - appended this to dts patch series arch/arm64/boot/dts/qcom/sm8350.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) -- 2.26.2 diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 1aa2a9e00a75..91d4cbbe38dc 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -45,6 +45,7 @@ CPU0: cpu@0 { reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&L2_0>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_0: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -60,6 +61,7 @@ CPU1: cpu@100 { reg = <0x0 0x100>; enable-method = "psci"; next-level-cache = <&L2_100>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_100: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -72,6 +74,7 @@ CPU2: cpu@200 { reg = <0x0 0x200>; enable-method = "psci"; next-level-cache = <&L2_200>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_200: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -84,6 +87,7 @@ CPU3: cpu@300 { reg = <0x0 0x300>; enable-method = "psci"; next-level-cache = <&L2_300>; + qcom,freq-domain = <&cpufreq_hw 0>; L2_300: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -96,6 +100,7 @@ CPU4: cpu@400 { reg = <0x0 0x400>; enable-method = "psci"; next-level-cache = <&L2_400>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_400: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -108,6 +113,7 @@ CPU5: cpu@500 { reg = <0x0 0x500>; enable-method = "psci"; next-level-cache = <&L2_500>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_500: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -121,6 +127,7 @@ CPU6: cpu@600 { reg = <0x0 0x600>; enable-method = "psci"; next-level-cache = <&L2_600>; + qcom,freq-domain = <&cpufreq_hw 1>; L2_600: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -133,6 +140,7 @@ CPU7: cpu@700 { reg = <0x0 0x700>; enable-method = "psci"; next-level-cache = <&L2_700>; + qcom,freq-domain = <&cpufreq_hw 2>; L2_700: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -852,6 +860,19 @@ apps_bcm_voter: bcm_voter { }; }; + cpufreq_hw: cpufreq@18591000 { + compatible = "qcom,sm8350-cpufreq-epss", "qcom,cpufreq-epss"; + reg = <0 0x18591000 0 0x1000>, + <0 0x18592000 0 0x1000>, + <0 0x18593000 0 0x1000>; + reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + + #freq-domain-cells = <1>; + }; + ufs_mem_hc: ufshc@1d84000 { compatible = "qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0";