From patchwork Fri Apr 6 14:19:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 132916 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp844550ljb; Fri, 6 Apr 2018 07:19:43 -0700 (PDT) X-Google-Smtp-Source: AIpwx4+uv6I4Hq4jJ9Vj4MXxCu4HzGGHp2QO+ljVj21FJ9Qzv0zOYHvKBRVSl7kmtaJXCLXxdqRY X-Received: by 10.98.217.88 with SMTP id s85mr20682642pfg.20.1523024383412; Fri, 06 Apr 2018 07:19:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523024383; cv=none; d=google.com; s=arc-20160816; b=ZDZk3iyC/wwhaydji8FGo5NSbTMk0dGdfYyV8VoT5y1TrqJFiU7bwgpJCBEzz0uxQ3 OstytGJauUKaxkWaWDGr/uVHTzZK7bL3XNrv5NnxXX11/bgMWyFm9X9xEgEPr3Adqzpb 7xcwVfea5GV+NfFIZ1M1t8iDgehY706dLvEi867NL/YZG3RP6dzg2V7x2rN0qE0/l9sN xISVFmLDPZLqYuldfb9+94ax/hFU/WpaC3Fg9zKD4v8HlXXl0AraTfjENBFYapc/0nhu g3E2qaeSz++YajKz17cVM0vUUekj5N/TV/aI5RwFnNmNBcGXVB4kPqZlha1HYLz/BJ8A JroA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:message-id:date:subject:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=MMFuPY/tdZPzOpxpCOLvSx3P2MnNlgH8zK9ZQRq57nA=; b=GhsIM0lyTEAbdMHLKcyi8d7rOBkYPO+CYZp4Xcy+FUrL1L0jjU+uG/cwM8882TnaL5 VNSSgq4lGntChm+Va95RDDHgsfqctee9ZM6/c4MCClPaK/sWYti7t9V0KDnrNjrj5uCr 6Wh8T80aQ6igN2j88OCPEpkzVx6cT2e//StKx8tIk2jBsmgOOPW9M+ln4blTmErV1LPg CLoeWXqe9h/MOrvTLQaXbseQRTHIn8BP82ta/zJTVtenklVq73YZ3LkycsJm7rKWJ4yb q/ajcBHE2MZ1ENw9LB536A4byoDiUeX9bg3IauYapMTvQwKZ5T2rVYN1KFqZEWnecR04 e+sQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aEl/CpdF; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id 135si8024099pfc.21.2018.04.06.07.19.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 06 Apr 2018 07:19:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aEl/CpdF; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 329876E982; Fri, 6 Apr 2018 14:19:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) by gabe.freedesktop.org (Postfix) with ESMTPS id AD5266E97D for ; Fri, 6 Apr 2018 14:19:40 +0000 (UTC) Received: by mail-lf0-x244.google.com with SMTP id v207-v6so789545lfa.10 for ; Fri, 06 Apr 2018 07:19:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=GWGXcMZ3VxKGlw93exRzahXfZSXeBONnIb/jLqpTmus=; b=aEl/CpdFkleUex3BRzpOd2CjaUYHd087chENZrLRjVRA9dmDTZqg/PGfKiE8Ye9ILr MMp+gwHk9/WdEGjLoj1zMiBm3MBKc/ov6avUKKXfZGx7OIJytrGRSg+9nZymjucG8VVP T42/n4MeXrpUTybIXmzx6CmTfpZAM/cbXmBrE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=GWGXcMZ3VxKGlw93exRzahXfZSXeBONnIb/jLqpTmus=; b=T9WDQcCCOZJ0HnOs9WaAizOir5dxztQReH0LeLcOfj2NjdhSyAFgo5o868YI8bD2w6 8Qir0vg71kfcxAUNZdvsDCN0OVJZ0QtTmFDQZrELz5gD77PBTzqwDzcxDcmkFZGTeA3i jXLym0gjRQX2Bn+3K7nvybva4eaf5t5SfHC5W4QA4IfQc+1RnbsYD6Ut7jm5XBeMxpZl WArdc1hEHLTu40Dd0150kCBR4AQbbGELYWNQ9qS1xfbD2gPiegcD6AKb5Oe8SoWN94ce 7iWdEm6UeHrl94pUELvgsAqoqK0VHqpiDoSIwJ4bpMwLSdWu/mc4Ymo0SdiPUGx7YirP zY9w== X-Gm-Message-State: ALQs6tBMKyACts9KvQhMljMnBNK+RSM4zsT8gTK4859QWrqckthKVrvM KLcaNvHb53XlKJuWwfTSXgX+qBcVT5g= X-Received: by 2002:a19:9c0d:: with SMTP id f13-v6mr16379940lfe.9.1523024378776; Fri, 06 Apr 2018 07:19:38 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id e8-v6sm2098137lfc.88.2018.04.06.07.19.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 06 Apr 2018 07:19:37 -0700 (PDT) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 1/2 v2] drm/pl111: Support the Versatile Express Date: Fri, 6 Apr 2018 16:19:34 +0200 Message-Id: <20180406141935.6801-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Pawel Moll , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Versatile Express uses a special configuration controller deeply embedded in the system motherboard FPGA to multiplex the two to three (!) CLCD instances out to the single SiI9022 bridge. Set up an extra file with the logic to probe to the FPGA mux register on the system controller bus, then parse the memory range argument to figure out what path the CLCD signal is actually taking, and set up the mux accordingly. If there is a CLCD instance on the core tile (the daughterboard with the CPUs fitted) then that CLCD instance will take precedence since it can address all memory. Scale down the Versatile Express to 16BPP so we can support a 1024x768 display despite the bus bandwidth restrictions on this platform. Cc: Liviu Dudau Cc: Pawel Moll Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes just reposting rebased on mainline changes. --- drivers/gpu/drm/pl111/Makefile | 1 + drivers/gpu/drm/pl111/pl111_drm.h | 3 +- drivers/gpu/drm/pl111/pl111_versatile.c | 48 ++++++++++++++- drivers/gpu/drm/pl111/pl111_vexpress.c | 106 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/pl111/pl111_vexpress.h | 22 +++++++ 5 files changed, 178 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/pl111/pl111_vexpress.c create mode 100644 drivers/gpu/drm/pl111/pl111_vexpress.h diff --git a/drivers/gpu/drm/pl111/Makefile b/drivers/gpu/drm/pl111/Makefile index 9c5e8dba8ac6..19a8189dc54f 100644 --- a/drivers/gpu/drm/pl111/Makefile +++ b/drivers/gpu/drm/pl111/Makefile @@ -3,6 +3,7 @@ pl111_drm-y += pl111_display.o \ pl111_versatile.o \ pl111_drv.o +pl111_drm-$(CONFIG_ARCH_VEXPRESS) += pl111_vexpress.o pl111_drm-$(CONFIG_DEBUG_FS) += pl111_debugfs.o obj-$(CONFIG_DRM_PL111) += pl111_drm.o diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 8639b2d4ddf7..916154ac733a 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -64,7 +64,8 @@ struct pl111_drm_dev_private { struct drm_bridge *bridge; struct drm_simple_display_pipe pipe; - void *regs; + void __iomem *clcd_memory; + void __iomem *regs; u32 memory_bw; u32 ienb; u32 ctrl; diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 9302f516045e..569edf02a36a 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -1,12 +1,14 @@ #include #include #include +#include #include #include #include #include #include #include "pl111_versatile.h" +#include "pl111_vexpress.h" #include "pl111_drm.h" static struct regmap *versatile_syscon_map; @@ -22,6 +24,7 @@ enum versatile_clcd { REALVIEW_CLCD_PB11MP, REALVIEW_CLCD_PBA8, REALVIEW_CLCD_PBX, + VEXPRESS_CLCD_V2M, }; static const struct of_device_id versatile_clcd_of_match[] = { @@ -53,6 +56,10 @@ static const struct of_device_id versatile_clcd_of_match[] = { .compatible = "arm,realview-pbx-syscon", .data = (void *)REALVIEW_CLCD_PBX, }, + { + .compatible = "arm,vexpress-muxfpga", + .data = (void *)VEXPRESS_CLCD_V2M, + }, {}, }; @@ -286,12 +293,26 @@ static const struct pl111_variant_data pl111_realview = { .fb_bpp = 16, }; +/* + * Versatile Express PL111 variant, again we just push the maximum + * BPP to 16 to be able to get 1024x768 without saturating the memory + * bus. The clockdivider also seems broken on the Versatile Express. + */ +static const struct pl111_variant_data pl111_vexpress = { + .name = "PL111 Versatile Express", + .formats = pl111_realview_pixel_formats, + .nformats = ARRAY_SIZE(pl111_realview_pixel_formats), + .fb_bpp = 16, + .broken_clockdivider = true, +}; + int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) { const struct of_device_id *clcd_id; enum versatile_clcd versatile_clcd_type; struct device_node *np; struct regmap *map; + int ret; np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match, &clcd_id); @@ -301,7 +322,25 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) } versatile_clcd_type = (enum versatile_clcd)clcd_id->data; - map = syscon_node_to_regmap(np); + /* Versatile Express special handling */ + if (versatile_clcd_type == VEXPRESS_CLCD_V2M) { + struct platform_device *pdev; + + /* Call into deep Vexpress configuration API */ + pdev = of_find_device_by_node(np); + if (!pdev) { + dev_err(dev, "can't find the sysreg device, deferring\n"); + return -EPROBE_DEFER; + } + map = dev_get_drvdata(&pdev->dev); + if (!map) { + dev_err(dev, "sysreg has not yet probed\n"); + return -EPROBE_DEFER; + } + } else { + map = syscon_node_to_regmap(np); + } + if (IS_ERR(map)) { dev_err(dev, "no Versatile syscon regmap\n"); return PTR_ERR(map); @@ -340,6 +379,13 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) priv->variant_display_disable = pl111_realview_clcd_disable; dev_info(dev, "set up callbacks for RealView PL111\n"); break; + case VEXPRESS_CLCD_V2M: + priv->variant = &pl111_vexpress; + dev_info(dev, "initializing Versatile Express PL111\n"); + ret = pl111_vexpress_clcd_init(dev, priv, map); + if (ret) + return ret; + break; default: dev_info(dev, "unknown Versatile system controller\n"); break; diff --git a/drivers/gpu/drm/pl111/pl111_vexpress.c b/drivers/gpu/drm/pl111/pl111_vexpress.c new file mode 100644 index 000000000000..720244f497fe --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_vexpress.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Versatile Express PL111 handling + * Copyright (C) 2018 Linus Walleij + * + * This module binds to the "arm,vexpress-muxfpga" device on the + * Versatile Express configuration bus and sets up which CLCD instance + * gets muxed out on the DVI bridge. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include "pl111_drm.h" +#include "pl111_vexpress.h" + +#define VEXPRESS_FPGAMUX_MOTHERBOARD 0x00 +#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1 0x01 +#define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2 0x02 + +static bool daughterboard_muxed = false; +static bool motherboard_muxed = false; + +int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map) +{ + struct device_node *memory; + u32 val; + int ret; + + /* + * The CLCD on the motherboard has a special memory region and + * does not make use of CMA. We differentiate between the different + * CLCD controllers using this memory region phandle. + */ + memory = of_parse_phandle(dev->of_node, "memory-region", 0); + if (!memory) { + if (motherboard_muxed) { + dev_info(dev, "motherboard CLCD muxed in\n"); + dev_info(dev, "daughterboard takes precedence\n"); + dev_info(dev, "motherboard CLCD will not be muxed out\n"); + } + dev_info(dev, + "DVI muxed to daughterboard 1 (core tile) CLCD\n"); + val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1; + daughterboard_muxed = true; + } else { + priv->clcd_memory = of_iomap(memory, 0); + if (!priv->clcd_memory) + dev_err(dev, "could not remap CLCD memory\n"); + /* Fall through and try to use CMA */ + if (daughterboard_muxed) { + dev_info(dev, "daughterboard takes precedence\n"); + dev_info(dev, "motherboard CLCD will not be muxed out\n"); + return -ENODEV; + } + dev_info(dev, "DVI muxed to motherboard CLCD\n"); + val = VEXPRESS_FPGAMUX_MOTHERBOARD; + motherboard_muxed = true; + } + + ret = regmap_write(map, 0, val); + if (ret) { + dev_err(dev, "error setting DVI muxmode\n"); + return -ENODEV; + } + + return 0; +} + +/* + * This sets up the regmap pointer that will then be retrieved by + * the detection code in pl111_versatile.c and passed in to the + * pl111_vexpress_clcd_init() function above. + */ +static int vexpress_muxfpga_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *map; + + map = devm_regmap_init_vexpress_config(&pdev->dev); + if (IS_ERR(map)) + return PTR_ERR(map); + dev_set_drvdata(dev, map); + + return 0; +} + +static const struct of_device_id vexpress_muxfpga_match[] = { + { .compatible = "arm,vexpress-muxfpga", } +}; + +static struct platform_driver vexpress_muxfpga_driver = { + .driver = { + .name = "vexpress-muxfpga", + .of_match_table = of_match_ptr(vexpress_muxfpga_match), + }, + .probe = vexpress_muxfpga_probe, +}; + +module_platform_driver(vexpress_muxfpga_driver); diff --git a/drivers/gpu/drm/pl111/pl111_vexpress.h b/drivers/gpu/drm/pl111/pl111_vexpress.h new file mode 100644 index 000000000000..49876417f7b6 --- /dev/null +++ b/drivers/gpu/drm/pl111/pl111_vexpress.h @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 + +struct device; +struct pl111_drm_dev_private; +struct regmap; + +#ifdef CONFIG_ARCH_VEXPRESS + +int pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map); + +#else + +static int inline pl111_vexpress_clcd_init(struct device *dev, + struct pl111_drm_dev_private *priv, + struct regmap *map) +{ + return -ENODEV; +} + +#endif From patchwork Fri Apr 6 14:19:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 132917 Delivered-To: patch@linaro.org Received: by 10.46.84.29 with SMTP id i29csp844631ljb; Fri, 6 Apr 2018 07:19:47 -0700 (PDT) X-Google-Smtp-Source: AIpwx49sMdC+dcB0+58VxEBg00hJaGGBc488g+b1Fj3kWM60f/FLXYqZFhSaFitLZMHYDb9xvSZO X-Received: by 2002:a17:902:8f8f:: with SMTP id z15-v6mr27010548plo.368.1523024387409; Fri, 06 Apr 2018 07:19:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1523024387; cv=none; d=google.com; s=arc-20160816; b=RDd9oF0sWzNCj0sOWG4fUgcHKWm5Qmx7JnLHMwhIXnXYdnouyEwCC6+Le5H6XVN5OB HYJww7Qi7rWsAex0TCS6YYGD5uowAAr0gyS0OmDfpXx7RjWZvrDbouTZhI0qPvHgrtIJ DtBGYtjyjq22ZOG8We50iuQ5UwEQ20lWjdYUU6FFpjhlH20lm04R6aVdNbwHNrDI5HEU iPHIYZc54bL/vygZ8fWUsc+0Mub28tPNQKZiKMM9tKoyLXr0RfMVV74yVVC25IZVgLXd 8bH9Vd/vy/rFV535n57BGBNh3bYJucqyQtYORa3yGaOpmc06ETWLzurLTnFmZIV1ZzH7 ustA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:mime-version:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=3H+a0AWwTMdHvQx5kP9o1aI9aMNUZ6KJ00ues46kMDU=; b=oC5rnbFjpEobL9bzcExKVae+J7YkgHfL+2oKSZaHq6/pBXLCbz0XDCHoqrgeqn7KJt aP3aC2Cc2fI86MmYQMQcC6h6MRC0YwLA4SB0u0x3CpGkVY+7ClEBCz9opFbr8BylA+Ee 2Zt4lWT7GfjKIDc7RwQfaec7d88NoiS3i3ek0Ihjx8LDN47nJURMKKhnd7YgAv0yTYt5 r8uWbINDNpuuHMoEBhjD4z3i0Y9ZW2NUHHORmE426gBFTPUoREHXJkjAozuUAiwke1Jt jlnlYd+6ZAJDX8A8t1Hp4lDbg15UqLoQcWrWVT6nqPuJhAQK4vvb1lqFg7hQ9HziuO++ BvXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=H5dV0PTC; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id b89-v6si10902630plb.262.2018.04.06.07.19.47 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 06 Apr 2018 07:19:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=H5dV0PTC; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 39F026E97D; Fri, 6 Apr 2018 14:19:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDD2D6E988 for ; Fri, 6 Apr 2018 14:19:42 +0000 (UTC) Received: by mail-lf0-x243.google.com with SMTP id p142-v6so792860lfd.6 for ; Fri, 06 Apr 2018 07:19:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0+zmRrO9BO89uqK08WJUwFs7r0N/cCmhTWuQadd9BYI=; b=H5dV0PTC17048nAk/ISKxdiIt+ESxOdCv2jXwO4+gkT3S5yey/5B+scZV0MzIbgMPw ORU7zkEJALQzQFhxx8kJkx+2Df2nqiU4UgHQjrYma8nAFXHuOAH9S55wSpRE3u9B30xT S3gLFazKjFoYrDMV8A7TaDqyLq/onX+teWc00= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0+zmRrO9BO89uqK08WJUwFs7r0N/cCmhTWuQadd9BYI=; b=tX2bkpqqp0QeVjy4Wi7UiiL5iXDGFcA79uMIlh4qGjoV4HkILjxiMyEdbUMEA0fkmq HfAOnNhm1uBR7iLsTsuEhD0X0DsaKcOMZklPcBPP9DsKdCu+t6+MndYr8NLZCMWeqjDL O2gED1kwAY6Ii4I/3I/dDFAKexc201PyUP8AYNuJNZ9AXyqkh8U/OipFRT/5jiNUnoI8 aF1c62lLts0KnG+99vO2mgy7WHJz3YWx4wzXc5v3RGdJ8FTe4aQElMc1w6jPujhLA1gn l+veKEHYlgnQq0ziM9KiFJ5Etn3aqfvtRVivic8h5gnMl9z/zN37BJkTaDA21F+JRopf dRGA== X-Gm-Message-State: ALQs6tD+KGh3fM8AZ+9PsPqk1Fb6ZRE1T2bb9RHxiG//YQa2AM+5hkS6 Uf/ZckkwCuCS3yCycQTUhXspsA== X-Received: by 2002:a19:6919:: with SMTP id e25-v6mr16195720lfc.52.1523024381061; Fri, 06 Apr 2018 07:19:41 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id e8-v6sm2098137lfc.88.2018.04.06.07.19.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 06 Apr 2018 07:19:40 -0700 (PDT) From: Linus Walleij To: Daniel Vetter , Jani Nikula , Sean Paul , Eric Anholt , Liviu Dudau Subject: [PATCH 2/2 v2] drm/pl111: Enable device-specific assigned memory Date: Fri, 6 Apr 2018 16:19:35 +0200 Message-Id: <20180406141935.6801-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180406141935.6801-1-linus.walleij@linaro.org> References: <20180406141935.6801-1-linus.walleij@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mali DP Maintainers , linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Versatile Express has 8 MB of dedicated video RAM (VRAM) on the motherboard, which is what we should be using for the PL111 if available. On this platform, the memory backplane is constructed so that only this memory will work properly with the CLCD on the motherboard, using any other memory region just gives random snow on the display. The CA9 Versatile Express also has a PL111 instance on its core tile. This is OK, it has been tested with the motherboard VRAM and that works just as fine as regular CMA memory. The memory is assigned to the device using the memory-region device tree property and a "shared-dma-pool" reserved memory pool like this: reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; vram: vram@48000000 { compatible = "shared-dma-pool"; reg = <0x48000000 0x00800000>; no-map; }; }; clcd@1f000 { compatible = "arm,pl111", "arm,primecell"; (...) memory-region = <&vram>; }ยท; Cc: Liviu Dudau Cc: Mali DP Maintainers Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Make sure to also call of_reserved_mem_device_release() at remove() and errorpath. --- drivers/gpu/drm/pl111/pl111_drv.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 4621259d5387..bc57c15d9fe4 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -60,6 +60,7 @@ #include #include #include +#include #include #include @@ -257,6 +258,10 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; + ret = of_reserved_mem_device_init(dev); + if (!ret) + dev_info(dev, "using device-specific reserved memory\n"); + if (of_property_read_u32(dev->of_node, "max-memory-bandwidth", &priv->memory_bw)) { dev_info(dev, "no max memory bandwidth specified, assume unlimited\n"); @@ -275,7 +280,8 @@ static int pl111_amba_probe(struct amba_device *amba_dev, priv->regs = devm_ioremap_resource(dev, &amba_dev->res); if (IS_ERR(priv->regs)) { dev_err(dev, "%s failed mmio\n", __func__); - return PTR_ERR(priv->regs); + ret = PTR_ERR(priv->regs); + goto mem_rel; } /* This may override some variant settings */ @@ -305,11 +311,15 @@ static int pl111_amba_probe(struct amba_device *amba_dev, dev_unref: drm_dev_unref(drm); +mem_rel: + of_reserved_mem_device_release(dev); + return ret; } static int pl111_amba_remove(struct amba_device *amba_dev) { + struct device *dev = &amba_dev->dev; struct drm_device *drm = amba_get_drvdata(amba_dev); struct pl111_drm_dev_private *priv = drm->dev_private; @@ -319,6 +329,7 @@ static int pl111_amba_remove(struct amba_device *amba_dev) drm_panel_bridge_remove(priv->bridge); drm_mode_config_cleanup(drm); drm_dev_unref(drm); + of_reserved_mem_device_release(dev); return 0; }