From patchwork Fri Apr 27 12:08:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 134603 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp640989lji; Fri, 27 Apr 2018 05:09:55 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrahDO2SmWj5Jq5UASddCAE6fU9EvwmBoK73HbRdEXabvvVxobFC9MkARWrfVsZFMwrGOFa X-Received: by 2002:a63:7413:: with SMTP id p19-v6mr1949658pgc.230.1524830994949; Fri, 27 Apr 2018 05:09:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524830994; cv=none; d=google.com; s=arc-20160816; b=xlVo8c/dXlbF00g2qC4xka4gfyVsKx6y5VL506H2tn17AiB7GtuQiLy9Wx/AwDGPM4 c25nKqHvIHF+xqeh3pxOYmA3pW8zlYrB9lHWUjAyjSmdTyFaw5aBCe1LMO8YwCnTofXf VNGlf7uQZnM3Z7E1r75Nivd71MyYX74U5onlsUVVLvRQ14BdPaFXiE3Qc0uZTiLv06zR c5Ns1669S0w+lsMFv7Xu2l5beOIpR+zXsqRs6yh6DThooL27mkoA4iYB2eLKRm+crI/3 zAeqRvb+qvBQBIfWtC5ScHNaQ9gSVW+fa9myWbCIVfJtxfmnfY1k8zWRh7AaLeeOFq7i hSgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=jw+2951Nred0M1f0gjagMGgPgEjwDyWAkkC2P6WqtQc=; b=ByNLhcFauj84sACLXt2IZQ4eAQYGkoz5lK0OywIZEDULtmBzoNOwXYCBbSAgYdvdyt E7ML0HkZBqLhFyTV+X3rJaYEfhl+7Z8LJk6AjSqKLP3JVWvgL1qdnQdJ0UYVO4GGNFCx z5eoYPyUDrQZkZIuOH5inVtL2/7AWmMZELZ3ElunrrMkLNrvTH2ScWkSIg1ENs9yFJm1 w4RdC8JoGL7ZRYoyVEoryUWMBnEY1AvYVFTwse70LaXKTZ8Pv5gHuaJ24ja8/EytDJEg HOOc+RV6PNlFvwpZUkxYUpe5bBTytnOBFDTJ2aGwyXUltP1VLx3I9iepVxbog4e+nkJ9 lo4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=s2l7R6s6; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x1-v6si1173801plb.8.2018.04.27.05.09.54; Fri, 27 Apr 2018 05:09:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=s2l7R6s6; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758134AbeD0MJx (ORCPT + 6 others); Fri, 27 Apr 2018 08:09:53 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:62428 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758067AbeD0MJu (ORCPT ); Fri, 27 Apr 2018 08:09:50 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w3RC9fJr005570; Fri, 27 Apr 2018 07:09:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1524830981; bh=Wy8NiGv+iD/Rdp25rm96ooqdR2C2nybpariayU3B28U=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=s2l7R6s6hm5t5fuq0/BBd7nF6ABQwQR3Zf7Nn2Mu/9YgI464SriJuUO7NaYyDZnv0 fupDODtA85x029JQOCKdj/O2ecWW2HAuTsrE7Rl9IMoA//u/zef1zL3OvNcaUZBCYR GN9ekiG8seZEyEPGgVf8nvYMloT3myw4OKpj2tUo= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3RC9fLo012868; Fri, 27 Apr 2018 07:09:41 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 27 Apr 2018 07:09:41 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 27 Apr 2018 07:09:41 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3RC9AjQ006789; Fri, 27 Apr 2018 07:09:38 -0500 From: Kishon Vijay Abraham I To: Tony Lindgren CC: Jonathan Corbet , =?utf-8?q?Beno=C3=AEt_Cousson?= , Rob Herring , Mark Rutland , , , , , , Hari Nagalla , Eyal Reizer , Sekhar Nori Subject: [PATCH v4 08/14] ARM: dts: dra72-evm-common: Add wilink8 wlan support Date: Fri, 27 Apr 2018 17:38:59 +0530 Message-ID: <20180427120905.3665-9-kishon@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180427120905.3665-1-kishon@ti.com> References: <20180427120905.3665-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Hari Nagalla Wilink8 module is a combo wireless connectivity card based on Texas Instrument's wl18xx solution. Add support for the wlan capabilities of this module by muxing the relevant mmc lines, and setting the required device-tree data. Signed-off-by: Eyal Reizer Signed-off-by: Hari Nagalla [nsekhar@ti.com: drop WLAN_EN pinmux. It should be done by bootloader. Also, some commit message adjustments] Signed-off-by: Sekhar Nori Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra72-evm-common.dtsi | 42 +++++++++++++++++++++++ arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi | 11 ++++++ 2 files changed, 53 insertions(+) -- 2.17.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 8e3b185d864b..b81214051a89 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -44,6 +44,16 @@ regulator-boot-on; }; + evm_3v6: fixedregulator-evm_3v6 { + compatible = "regulator-fixed"; + regulator-name = "evm_3v6"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + vin-supply = <&evm_5v0>; + regulator-always-on; + regulator-boot-on; + }; + vsys_3v3: fixedregulator-vsys3v3 { /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */ /* Output 2 of LM5140QRWGTQ1 on dra71-evm */ @@ -171,6 +181,15 @@ clocks = <&atl_clkin2_ck>; }; }; + + vmmcwl_fixed: fixedregulator-mmcwl { + compatible = "regulator-fixed"; + regulator-name = "vmmcwl_fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &dra7_pmx_core { @@ -398,6 +417,29 @@ max-frequency = <192000000>; }; +&mmc4 { + status = "okay"; + vmmc-supply = <&evm_3v6>; + vqmmc-supply = <&vmmcwl_fixed>; + bus-width = <4>; + cap-power-off-card; + keep-power-in-suspend; + non-removable; + pinctrl-names = "default", "hs", "sdr12", "sdr25"; + pinctrl-0 = <&mmc4_pins_default>; + pinctrl-1 = <&mmc4_pins_default>; + pinctrl-2 = <&mmc4_pins_default>; + pinctrl-3 = <&mmc4_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + wifi@2 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + }; +}; + &mac { status = "okay"; }; diff --git a/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi b/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi index 088013c6dc6e..edad87c4292c 100644 --- a/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi +++ b/arch/arm/boot/dts/dra72x-mmc-iodelay.dtsi @@ -202,6 +202,17 @@ DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ >; }; + + mmc4_pins_default: mmc4_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ + DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */ + DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */ + DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_txd.mmc4_dat1 */ + DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */ + DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */ + >; + }; }; &dra7_iodelay_core { From patchwork Fri Apr 27 12:09:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 134609 Delivered-To: patch@linaro.org Received: by 10.46.151.6 with SMTP id r6csp641756lji; Fri, 27 Apr 2018 05:10:30 -0700 (PDT) X-Google-Smtp-Source: AB8JxZrZorU8zs+W6EFFsgBzeFKx58PcU+vvtYldAyz+VQ5EmG3MctNKrwGu4Zohjl+X58AeP8Ho X-Received: by 2002:a17:902:5952:: with SMTP id e18-v6mr2099339plj.351.1524831030335; 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[209.132.180.67]) by mx.google.com with ESMTP id d124-v6si1129331pgc.6.2018.04.27.05.10.30; Fri, 27 Apr 2018 05:10:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=X0XhAmjE; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932492AbeD0MK2 (ORCPT + 6 others); Fri, 27 Apr 2018 08:10:28 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:47352 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758192AbeD0MKH (ORCPT ); Fri, 27 Apr 2018 08:10:07 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w3RC9uEw012896; Fri, 27 Apr 2018 07:09:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1524830996; bh=H2rewnUA+5V/Y72J+tlSKyl+ffYBCSrOmWN+9H1LRQw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=X0XhAmjEVszhTOjiB3J72JlTM4vktPp9UkDCNQ24NjfvNge0H0dNZ6cVpstWPq8xl z0gDH07MrJxwZqXPYKuYooFU/HhOKhgFjflUDLhXQzbqPTu3Q8gAPDncLwhwdSqhdH VgdLt88G424T4ZGN6wIz0DkCNLaR9gayIiJyMzbQ= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3RC9t2N013083; Fri, 27 Apr 2018 07:09:56 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 27 Apr 2018 07:09:55 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 27 Apr 2018 07:09:55 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3RC9AjU006789; Fri, 27 Apr 2018 07:09:52 -0500 From: Kishon Vijay Abraham I To: Tony Lindgren CC: Jonathan Corbet , =?utf-8?q?Beno=C3=AEt_Cousson?= , Rob Herring , Mark Rutland , , , , , Subject: [PATCH v4 12/14] ARM: dts: dra7: Use sdhci-omap programming model Date: Fri, 27 Apr 2018 17:39:03 +0530 Message-ID: <20180427120905.3665-13-kishon@ti.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180427120905.3665-1-kishon@ti.com> References: <20180427120905.3665-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use sdhci-omap programming model based on the generic sdhci library for programming the eMMC/SD/SDIO controller. Signed-off-by: Kishon Vijay Abraham I --- .../boot/dts/am57xx-beagle-x15-common.dtsi | 4 +-- arch/arm/boot/dts/am57xx-beagle-x15.dts | 1 + arch/arm/boot/dts/am57xx-idk-common.dtsi | 3 ++- arch/arm/boot/dts/dra7-evm.dts | 1 + arch/arm/boot/dts/dra7.dtsi | 27 +++++++------------ arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- arch/arm/boot/dts/dra76-evm.dts | 3 ++- 7 files changed, 19 insertions(+), 22 deletions(-) -- 2.17.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi index 6204a266212a..ad953113cefb 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi @@ -444,8 +444,8 @@ vmmc-supply = <&vdd_3v3>; vqmmc-supply = <&vdd_3v3>; bus-width = <8>; - ti,non-removable; - cap-mmc-dual-data-rate; + non-removable; + no-1-8-v; }; &sata { diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index c76ea6579a81..70a71c641066 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -25,6 +25,7 @@ pinctrl-1 = <&mmc1_pins_hs>; vmmc-supply = <&ldo1_reg>; + no-1-8-v; }; &mmc2 { diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi index 43a6d0590f7c..ad87f1ae904d 100644 --- a/arch/arm/boot/dts/am57xx-idk-common.dtsi +++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi @@ -412,8 +412,9 @@ vmmc-supply = <&v3_3d>; vqmmc-supply = <&v3_3d>; bus-width = <8>; - ti,non-removable; + non-removable; max-frequency = <96000000>; + no-1-8-v; }; &dcan1 { diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 704947cbef48..0894593860d6 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -377,6 +377,7 @@ vmmc-supply = <&evm_1v8_sw>; vqmmc-supply = <&evm_1v8_sw>; bus-width = <8>; + non-removable; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index f4ddd86f2c77..ae2f8dd46328 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1079,14 +1079,10 @@ }; mmc1: mmc@4809c000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x4809c000 0x400>; interrupts = ; ti,hwmods = "mmc1"; - ti,dual-volt; - ti,needs-special-reset; - dmas = <&sdma_xbar 61>, <&sdma_xbar 62>; - dma-names = "tx", "rx"; status = "disabled"; pbias-supply = <&pbias_mmc_reg>; max-frequency = <192000000>; @@ -1100,40 +1096,37 @@ }; mmc2: mmc@480b4000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480b4000 0x400>; interrupts = ; ti,hwmods = "mmc2"; - ti,needs-special-reset; - dmas = <&sdma_xbar 47>, <&sdma_xbar 48>; - dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */ + sdhci-caps-mask = <0x7 0x0>; }; mmc3: mmc@480ad000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480ad000 0x400>; interrupts = ; ti,hwmods = "mmc3"; - ti,needs-special-reset; - dmas = <&sdma_xbar 77>, <&sdma_xbar 78>; - dma-names = "tx", "rx"; status = "disabled"; /* Errata i887 limits max-frequency of MMC3 to 64 MHz */ max-frequency = <64000000>; + /* SDMA is not supported */ + sdhci-caps-mask = <0x0 0x400000>; }; mmc4: mmc@480d1000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480d1000 0x400>; interrupts = ; ti,hwmods = "mmc4"; - ti,needs-special-reset; - dmas = <&sdma_xbar 57>, <&sdma_xbar 58>; - dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + /* SDMA is not supported */ + sdhci-caps-mask = <0x0 0x400000>; }; mmu0_dsp1: mmu@40d01000 { diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index b81214051a89..df174f5c15d1 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -413,7 +413,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins_default>; bus-width = <8>; - ti,non-removable; + non-removable; max-frequency = <192000000>; }; diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts index ad154c7b0632..c07f0051844d 100644 --- a/arch/arm/boot/dts/dra76-evm.dts +++ b/arch/arm/boot/dts/dra76-evm.dts @@ -327,7 +327,7 @@ &mmc1 { status = "okay"; vmmc-supply = <&vio_3v3_sd>; - vmmc_aux-supply = <&ldo4_reg>; + vqmmc-supply = <&ldo4_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode @@ -344,6 +344,7 @@ vmmc-supply = <&vio_1v8>; vqmmc-supply = <&vio_1v8>; bus-width = <8>; + non-removable; pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_default>;