From patchwork Sat Mar 27 21:20:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 410360 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE78AC433E1 for ; Sat, 27 Mar 2021 21:24:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 95A9A61945 for ; Sat, 27 Mar 2021 21:24:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230471AbhC0VXs (ORCPT ); Sat, 27 Mar 2021 17:23:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230015AbhC0VX1 (ORCPT ); Sat, 27 Mar 2021 17:23:27 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C750C0613B1; Sat, 27 Mar 2021 14:23:26 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id b4so12830224lfi.6; Sat, 27 Mar 2021 14:23:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=58S4X7JxMmetPUnkJUn5hJXElYMwpzhg1naqTswJrNE=; b=TrAfuz8zS+s2uhKyacOPzZmAcdf9SyqCmnzlxgFhxX1yem0elFBkQH1UiVCBvjmGxL 3SJAhYTuia+6h/Vm0AOYH1w4X5kBJpvlff572OORu38shDba4FV3d2qmfH1T527k/bJ+ FFXofGea+/JQ8NSB1GG/berPS/KIEselOs0jSSuoUD0D+DVJwDiEj3yqaQiravQ4jam7 PwBs5JwddKvgXclv+zKjvjjp0m33kkMk9HjLbAbeunntwVXYwsz8UM72qK8PKwJg8p9y 7xVXEX1NeHiDAL+Kw/8/4SS2VSVO39nqOyknjAp31DLKJgqjOgQZmuEcLxFm9hyshnz3 E5jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=58S4X7JxMmetPUnkJUn5hJXElYMwpzhg1naqTswJrNE=; b=WLX7Y2SBLSXHqAj2TCo0BKT2OzNhrByQg4ulZQCr3OCNf4FD23v1y1BDS/0U89x4EU r+HU26kgVb6dGAQAwAeRPwFpK9Y4/VKpIWcloAtwyQolsLeZ4L7ttXA8w0xycwqdV3wk Jt5eodV09Wwehy36tY584wNkBg2g7tORBfT+FnUZnIAIPRq5QlQqS0XXQMwodQ0F3xMu ycWCl3oKM2x3RGDs4UB42klOi01jgpspY1/+AkXbyZrlDiZHUEZT/a1ctEGXHquowvIB kSY3KzGnVcTqmE9BqM+FESaY6IRWOndG+X42Ivmeew3AcEokBsfbGH82z8blBAUItrlJ PyLQ== X-Gm-Message-State: AOAM533RnaMzVauqUUnJyU5VoU15MPfxbCxumKBKHPPovFc6b7q9yGI0 HMOTw8EdZV5HeK1CPpYeC0E= X-Google-Smtp-Source: ABdhPJyeBHQvW6VWseVPNi6sZ4qmpW+9sf9/yy7WZw2xl9b+dzuBPKO9+1f2sv0rmlX2hb/BJakjkQ== X-Received: by 2002:a05:6512:ac6:: with SMTP id n6mr12117150lfu.471.1616880204584; Sat, 27 Mar 2021 14:23:24 -0700 (PDT) Received: from localhost.localdomain (109-252-193-66.dynamic.spd-mgts.ru. [109.252.193.66]) by smtp.gmail.com with ESMTPSA id x7sm1300626lfe.182.2021.03.27.14.23.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Mar 2021 14:23:24 -0700 (PDT) From: Dmitry Osipenko To: Jens Axboe , Thierry Reding , Jonathan Hunter , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= , David Heidelberg , Peter Geis , Ulf Hansson , Adrian Hunter , Christoph Hellwig , Ard Biesheuvel , Davidlohr Bueso , Randy Dunlap , Ion Agorria , Svyatoslav Ryhel Cc: linux-tegra@vger.kernel.org, linux-block@vger.kernel.org, linux-efi Subject: [PATCH v1 1/3] mmc: core: Add raw_boot_mult field to mmc_ext_csd Date: Sun, 28 Mar 2021 00:20:58 +0300 Message-Id: <20210327212100.3834-2-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210327212100.3834-1-digetx@gmail.com> References: <20210327212100.3834-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org Bootloader of NVIDIA Tegra devices linearizes the boot0/boot1/main partitions into a single virtual space, and thus, all partition addresses are shifted by the size of boot0 + boot1 partitions. The offset needs to be known in order to find the EFI entry on internal EMMC storage of Tegra devices. Signed-off-by: Dmitry Osipenko --- drivers/mmc/core/mmc.c | 2 ++ include/linux/mmc/card.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 8741271d3971..ed29f6076472 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -417,6 +417,8 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd) ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]; card->ext_csd.raw_hc_erase_grp_size = ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; + card->ext_csd.raw_boot_mult = + ext_csd[EXT_CSD_BOOT_MULT]; if (card->ext_csd.rev >= 3) { u8 sa_shift = ext_csd[EXT_CSD_S_A_TIMEOUT]; card->ext_csd.part_config = ext_csd[EXT_CSD_PART_CONFIG]; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f9ad35dd6012..720e2a1ac1cd 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -109,6 +109,7 @@ struct mmc_ext_csd { u8 raw_hc_erase_gap_size; /* 221 */ u8 raw_erase_timeout_mult; /* 223 */ u8 raw_hc_erase_grp_size; /* 224 */ + u8 raw_boot_mult; /* 226 */ u8 raw_sec_trim_mult; /* 229 */ u8 raw_sec_erase_mult; /* 230 */ u8 raw_sec_feature_support;/* 231 */ From patchwork Sat Mar 27 21:20:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 410685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38622C433DB for ; Sat, 27 Mar 2021 21:24:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0A34D601FD for ; Sat, 27 Mar 2021 21:24:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230449AbhC0VXq (ORCPT ); Sat, 27 Mar 2021 17:23:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52538 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230178AbhC0VX1 (ORCPT ); Sat, 27 Mar 2021 17:23:27 -0400 Received: from mail-lj1-x22c.google.com (mail-lj1-x22c.google.com [IPv6:2a00:1450:4864:20::22c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF8F6C0613B3; Sat, 27 Mar 2021 14:23:26 -0700 (PDT) Received: by mail-lj1-x22c.google.com with SMTP id s17so11457317ljc.5; Sat, 27 Mar 2021 14:23:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DYSgmhDDJeU60WZ2qkj3eYgQcVqlfr0Yv38NQkuYdoM=; b=duGQwc5aT3ZrdSRXFebNpJToMJ6rZyhUe54R3il99SAm9E3t1uc+KMSz5oaYIbHyFc lqZh/IrKc/7v//zT5KYtrsOqqmbGUQWN3fFn2GxcYt8OswzqiJlRlb3X4iDQSG7JV4fm MMya+HlqZCieqW5AICk+U3ya1/tLMgVGp2ii77GoUHAlZH7ePBj1q/8hHhIqiWE/reOq cobCTjOGYwp6Xf26VnkyDNHejskhVEW1PQKQN2ftPNPaFzDyDxhRcr9qByno9SXxOopV hJmP1PiQFjVgnEw2BPPxbwKI4Xz3OBbjLeI2vszR7K8KtPhHKE6r3Q/NVNckxXdN43JW LX4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DYSgmhDDJeU60WZ2qkj3eYgQcVqlfr0Yv38NQkuYdoM=; b=lkhyYVL7GhZcgGGIJSAsKwitlXMOiSCLLwAe32V4e2ZPZnWH1M3tYYvPDPhvawS5BC QHhT/7QoiVnGzYN35UDpRAlylu/Pi9rKW/oHff3JRB2yeAacRDlkZ98idBv+eiKpNdMM erLNDN9h4XYmMYJZPNj5RXTHDqJo0m2Cv7UIVbch6dzGFqj6KR8oVIPOtZ9GsFO+63e2 kP1hQkoQhAIVDc5r9ZiB14R3VNAaXFzUuVC6V3uvB4plefG8GN2PeneDKstjUqAc0VCL HLirjHJWePcN/+hIWRSpQ8TPN+pPEfHCxGgHSTXaTE+HNQw9UmBPS5ckQhbtN46OtDn3 xf1g== X-Gm-Message-State: AOAM5304aLQA6pX96MNmH1H3ChNV6dxzxtYR2D2zb4c1wuZS8X8/7KWO t6rAE3o2xD/hd7Un3yrONsI= X-Google-Smtp-Source: ABdhPJw9ZU8ydYvThuoMbMN2MoKDQog6WsWizag6KBMfyHXWr0dLqRTVPLUxpxD4ryCW7tRP87rdrw== X-Received: by 2002:a2e:2d02:: with SMTP id t2mr12552119ljt.488.1616880205353; Sat, 27 Mar 2021 14:23:25 -0700 (PDT) Received: from localhost.localdomain (109-252-193-66.dynamic.spd-mgts.ru. [109.252.193.66]) by smtp.gmail.com with ESMTPSA id x7sm1300626lfe.182.2021.03.27.14.23.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Mar 2021 14:23:25 -0700 (PDT) From: Dmitry Osipenko To: Jens Axboe , Thierry Reding , Jonathan Hunter , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= , David Heidelberg , Peter Geis , Ulf Hansson , Adrian Hunter , Christoph Hellwig , Ard Biesheuvel , Davidlohr Bueso , Randy Dunlap , Ion Agorria , Svyatoslav Ryhel Cc: linux-tegra@vger.kernel.org, linux-block@vger.kernel.org, linux-efi Subject: [PATCH v1 2/3] mmc: block: Add mmc_bdev_to_card() helper Date: Sun, 28 Mar 2021 00:20:59 +0300 Message-Id: <20210327212100.3834-3-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210327212100.3834-1-digetx@gmail.com> References: <20210327212100.3834-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org Add mmc_bdev_to_card() helper which is needed for finding EFI entry on EMMC of NVIDIA Tegra devices. Signed-off-by: Dmitry Osipenko --- drivers/mmc/core/block.c | 15 +++++++++++++++ include/linux/mmc/blkdev.h | 13 +++++++++++++ 2 files changed, 28 insertions(+) create mode 100644 include/linux/mmc/blkdev.h diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index fe5892d30778..666066fd6037 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -40,6 +40,7 @@ #include #include +#include #include #include #include @@ -306,6 +307,20 @@ static ssize_t force_ro_store(struct device *dev, struct device_attribute *attr, return ret; } +struct mmc_card *mmc_bdev_to_card(struct block_device *bdev) +{ + struct mmc_blk_data *md; + + if (bdev->bd_disk->major != MMC_BLOCK_MAJOR) + return NULL; + + md = mmc_blk_get(bdev->bd_disk); + if (!md) + return NULL; + + return md->queue.card; +} + static int mmc_blk_open(struct block_device *bdev, fmode_t mode) { struct mmc_blk_data *md = mmc_blk_get(bdev->bd_disk); diff --git a/include/linux/mmc/blkdev.h b/include/linux/mmc/blkdev.h new file mode 100644 index 000000000000..67608c58de70 --- /dev/null +++ b/include/linux/mmc/blkdev.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/include/linux/mmc/blkdev.h + */ +#ifndef LINUX_MMC_BLOCK_DEVICE_H +#define LINUX_MMC_BLOCK_DEVICE_H + +struct block_device; +struct mmc_card; + +struct mmc_card *mmc_bdev_to_card(struct block_device *bdev); + +#endif /* LINUX_MMC_BLOCK_DEVICE_H */ From patchwork Sat Mar 27 21:21:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 410359 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66ED5C433E8 for ; Sat, 27 Mar 2021 21:24:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 430EA601FD for ; Sat, 27 Mar 2021 21:24:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230479AbhC0VXs (ORCPT ); Sat, 27 Mar 2021 17:23:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230292AbhC0VX2 (ORCPT ); Sat, 27 Mar 2021 17:23:28 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A70D4C0613B1; Sat, 27 Mar 2021 14:23:27 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id q29so12785591lfb.4; Sat, 27 Mar 2021 14:23:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=53SGraBL7FXNKozE0lKFGp0fguTnmST9yHQfYjxpKXQ=; b=CHQieGLjBiING3mc7CQI4FtZ7Xmd9Bl0rTRpfU6GfAEHwH9PwXsx9eD5Yod8639I4l S0PeT9vVdarsBD5eSC2BW6GDzZTVXgjISvoFwyMJv8EHgnoSOgnMUb+LJlxOFZCbuvbr yt7jU116Y1kgeiyONS09gSfgJYdvJYMD4Meob3wT9Zpqg+0fcwDs2kOVXdRchMwTVBnr 4hiAs8kt7CCktGQC97gc/g4g3SCVbzhpDbzz3gjmMd24uLJy/4LwIQQ5ASM0IFvoIMAL aDGgx7c+BCUCcqMqQ91gdClr/pq1wJuRIoFTzddTm5/yU/Lj9FMN+0ppWp7i2paphT/9 Kyyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=53SGraBL7FXNKozE0lKFGp0fguTnmST9yHQfYjxpKXQ=; b=kSgQOcV7wJD2DMA1QfPvOGVz9Z5uD77JuDJ4SdGzk5zQRj/VJJtfOcZLG+PexEwi0c VtQGqL7jfL4XPZ/S5afcbJDUHJTj7gRGXbE5BvV39t2kLe3Tj+vEoqdl4QSC3WE8w4Bb XfZ/YdWxOw+4gQp9bg/Rzozzijbqy7EpOThquaiBPiA1EQvHJp+EsJL538WdzPgg4kMq k6BCK1LECukEOG3RAlXXLscx9YWv/8VkvSWQxMZL8Zv32fRz4c0fY46aq/uGNt+a/s/t Z2SnCXdumgJd9KO1eFjVo0KGBDseWlVdsMEpiSE36oFOBsQJQL0xxBN78blspU8nwhnA BeCg== X-Gm-Message-State: AOAM531JJgL49sdmoZan63GTWsd8eJ9649ow1QCuAvZJY1vfJMyTqgpy dTuC5OUhGJdu9XlpWW6YGG0= X-Google-Smtp-Source: ABdhPJzkxz1Azw2sFeuCW110BiLD2JkdgKC6kfZhjqI19A4D8tesDlXOGA9LK7LUlEjKTU/1tzuMUA== X-Received: by 2002:a19:f608:: with SMTP id x8mr11928849lfe.380.1616880206130; Sat, 27 Mar 2021 14:23:26 -0700 (PDT) Received: from localhost.localdomain (109-252-193-66.dynamic.spd-mgts.ru. [109.252.193.66]) by smtp.gmail.com with ESMTPSA id x7sm1300626lfe.182.2021.03.27.14.23.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Mar 2021 14:23:25 -0700 (PDT) From: Dmitry Osipenko To: Jens Axboe , Thierry Reding , Jonathan Hunter , =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= , David Heidelberg , Peter Geis , Ulf Hansson , Adrian Hunter , Christoph Hellwig , Ard Biesheuvel , Davidlohr Bueso , Randy Dunlap , Ion Agorria , Svyatoslav Ryhel Cc: linux-tegra@vger.kernel.org, linux-block@vger.kernel.org, linux-efi Subject: [PATCH v1 3/3] partitions/efi: Support gpt_sector parameter needed by NVIDIA Tegra devices Date: Sun, 28 Mar 2021 00:21:00 +0300 Message-Id: <20210327212100.3834-4-digetx@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210327212100.3834-1-digetx@gmail.com> References: <20210327212100.3834-1-digetx@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-efi@vger.kernel.org All NVIDIA Tegra20..124 Android devices use proprietary bootloader which supplies the gpt_sector= kernel cmdline parameter that should be used for looking up the EFI partition table on internal EMMC storage. If the kernel cmdline parameter isn't supplied, then the partition is expected to be placed around the last but one sector of EMMC. Apparently this was done in order to hide the PT from a usual userspace tools since EFI entry exists only for compatibility with a Linux kernel, while a custom proprietary partition table is what is really used by these Android devices, thus these tools may corrupt the real PT, making device unbootable and very difficult to restore. Add support for the gpt_sector cmdline parameter which will be used for finding EFI entry on internal EMMC storage of NVIDIA Tegra20+ devices. Signed-off-by: Dmitry Osipenko --- block/partitions/Kconfig | 8 +++ block/partitions/Makefile | 1 + block/partitions/check.h | 2 + block/partitions/core.c | 3 ++ block/partitions/efi.c | 18 +++++++ block/partitions/tegra.c | 108 ++++++++++++++++++++++++++++++++++++++ 6 files changed, 140 insertions(+) create mode 100644 block/partitions/tegra.c diff --git a/block/partitions/Kconfig b/block/partitions/Kconfig index 6e2a649669e5..be086916c6a6 100644 --- a/block/partitions/Kconfig +++ b/block/partitions/Kconfig @@ -268,3 +268,11 @@ config CMDLINE_PARTITION help Say Y here if you want to read the partition table from bootargs. The format for the command line is just like mtdparts. + +config TEGRA_PARTITION + bool "NVIDIA Tegra Partition support" if PARTITION_ADVANCED + default y if ARCH_TEGRA + depends on EFI_PARTITION && MMC_BLOCK && (ARCH_TEGRA || COMPILE_TEST) + help + Say Y here if you would like to be able to read the hard disk + partition table format used by NVIDIA Tegra machines. diff --git a/block/partitions/Makefile b/block/partitions/Makefile index a7f05cdb02a8..83cb70c6d08d 100644 --- a/block/partitions/Makefile +++ b/block/partitions/Makefile @@ -20,3 +20,4 @@ obj-$(CONFIG_IBM_PARTITION) += ibm.o obj-$(CONFIG_EFI_PARTITION) += efi.o obj-$(CONFIG_KARMA_PARTITION) += karma.o obj-$(CONFIG_SYSV68_PARTITION) += sysv68.o +obj-$(CONFIG_TEGRA_PARTITION) += tegra.o diff --git a/block/partitions/check.h b/block/partitions/check.h index c577e9ee67f0..5fcc85087465 100644 --- a/block/partitions/check.h +++ b/block/partitions/check.h @@ -22,6 +22,7 @@ struct parsed_partitions { int limit; bool access_beyond_eod; char *pp_buf; + sector_t force_gpt_sector; }; typedef struct { @@ -67,4 +68,5 @@ int osf_partition(struct parsed_partitions *state); int sgi_partition(struct parsed_partitions *state); int sun_partition(struct parsed_partitions *state); int sysv68_partition(struct parsed_partitions *state); +int tegra_partition_forced_gpt(struct parsed_partitions *state); int ultrix_partition(struct parsed_partitions *state); diff --git a/block/partitions/core.c b/block/partitions/core.c index 1a7558917c47..1a0247f3354c 100644 --- a/block/partitions/core.c +++ b/block/partitions/core.c @@ -82,6 +82,9 @@ static int (*check_part[])(struct parsed_partitions *) = { #endif #ifdef CONFIG_SYSV68_PARTITION sysv68_partition, +#endif +#ifdef CONFIG_TEGRA_PARTITION + tegra_partition_forced_gpt, #endif NULL }; diff --git a/block/partitions/efi.c b/block/partitions/efi.c index b64bfdd4326c..f016a7f11239 100644 --- a/block/partitions/efi.c +++ b/block/partitions/efi.c @@ -98,6 +98,15 @@ static int force_gpt; static int __init force_gpt_fn(char *str) { + /* + * This check allows to properly parse cmdline variants like + * "gpt gpt_sector=" and "gpt_sector= gpt" since + * "gpt" overlaps with the "gpt_sector=", see tegra_gpt_sector_fn(). + * The argument is absent for a boolean cmdline option. + */ + if (strlen(str)) + return 0; + force_gpt = 1; return 1; } @@ -621,6 +630,15 @@ static int find_valid_gpt(struct parsed_partitions *state, gpt_header **gpt, if (!good_agpt && force_gpt) good_agpt = is_gpt_valid(state, lastlba, &agpt, &aptes); + /* + * The force_gpt_sector is used by NVIDIA Tegra partition parser in + * order to convey a non-standard location of the GPT entry for lookup. + * By default force_gpt_sector is set to 0 and has no effect. + */ + if (!good_agpt && force_gpt && state->force_gpt_sector) + good_agpt = is_gpt_valid(state, state->force_gpt_sector, + &agpt, &aptes); + /* The obviously unsuccessful case */ if (!good_pgpt && !good_agpt) goto fail; diff --git a/block/partitions/tegra.c b/block/partitions/tegra.c new file mode 100644 index 000000000000..585a2778ecc4 --- /dev/null +++ b/block/partitions/tegra.c @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: GPL-2.0 + +#define pr_fmt(fmt) "tegra-partition: " fmt + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "check.h" + +#define TEGRA_PT_ERR(_state, fmt, ...) \ + pr_debug("%s: " fmt, \ + (_state)->bdev->bd_disk->disk_name, ##__VA_ARGS__) + +static const struct of_device_id tegra_sdhci_match[] = { + { .compatible = "nvidia,tegra20-sdhci", }, + { .compatible = "nvidia,tegra30-sdhci", }, + { .compatible = "nvidia,tegra114-sdhci", }, + { .compatible = "nvidia,tegra124-sdhci", }, + {} +}; + +static int +tegra_partition_table_emmc_boot_offset(struct parsed_partitions *state) +{ + struct mmc_card *card = mmc_bdev_to_card(state->bdev); + + /* filter out unrelated and untested boot sources */ + if (!card || card->ext_csd.rev < 3 || + !mmc_card_is_blockaddr(card) || + mmc_card_is_removable(card->host) || + bdev_logical_block_size(state->bdev) != SZ_512 || + !of_match_node(tegra_sdhci_match, card->host->parent->of_node)) { + TEGRA_PT_ERR(state, "unexpected boot source\n"); + return -1; + } + + /* + * eMMC storage has two special boot partitions in addition to the + * main one. NVIDIA's bootloader linearizes eMMC boot0->boot1->main + * accesses, this means that the partition table addresses are shifted + * by the size of boot partitions. In accordance with the eMMC + * specification, the boot partition size is calculated as follows: + * + * boot partition size = 128K byte x BOOT_SIZE_MULT + * + * This function returns number of sectors occupied by the both boot + * partitions. + */ + return card->ext_csd.raw_boot_mult * SZ_128K / + SZ_512 * MMC_NUM_BOOT_PARTITION; +} + +/* + * This allows a kernel command line option 'gpt_sector=' to + * enable GPT header lookup at a non-standard location. This option + * is provided to kernel by NVIDIA's proprietary bootloader. + */ +static sector_t tegra_gpt_sector; +static int __init tegra_gpt_sector_fn(char *str) +{ + WARN_ON(kstrtoull(str, 10, &tegra_gpt_sector) < 0); + return 1; +} +__setup("gpt_sector=", tegra_gpt_sector_fn); + +int tegra_partition_forced_gpt(struct parsed_partitions *state) +{ + int ret, boot_offset; + + if (!soc_is_tegra()) + return 0; + + boot_offset = tegra_partition_table_emmc_boot_offset(state); + if (boot_offset < 0) + return 0; + + if (tegra_gpt_sector) { + state->force_gpt_sector = tegra_gpt_sector; + } else { + /* + * Some Tegra devices do not use gpt_sector= kernel + * command line option. In this case these devices should + * have a GPT entry at the end of the block device and then + * the GPT entry address is calculated like this: + * + * gpt_sector = ext_csd.sectors_num - ext_csd.boot_sectors_num - 1 + * + * This algorithm is defined by NVIDIA and used on Android + * devices. + */ + state->force_gpt_sector = get_capacity(state->bdev->bd_disk); + state->force_gpt_sector -= boot_offset + 1; + } + + ret = efi_partition(state); + state->force_gpt_sector = 0; + + return ret; +}