From patchwork Tue Mar 30 00:23:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zev Weiss X-Patchwork-Id: 413135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E272C433DB for ; Tue, 30 Mar 2021 00:32:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E8B9D619AA for ; Tue, 30 Mar 2021 00:32:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230240AbhC3AcN (ORCPT ); Mon, 29 Mar 2021 20:32:13 -0400 Received: from thorn.bewilderbeest.net ([71.19.156.171]:38343 "EHLO thorn.bewilderbeest.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230202AbhC3Ab7 (ORCPT ); Mon, 29 Mar 2021 20:31:59 -0400 X-Greylist: delayed 424 seconds by postgrey-1.27 at vger.kernel.org; Mon, 29 Mar 2021 20:31:59 EDT Received: from hatter.bewilderbeest.net (unknown [IPv6:2600:6c44:7f:ba20::7c6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: zev) by thorn.bewilderbeest.net (Postfix) with ESMTPSA id CDBB3373; Mon, 29 Mar 2021 17:24:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bewilderbeest.net; s=thorn; t=1617063894; bh=/9ihArs2Y5nqE6CHv1WmVwDQQrPL9NzAFux7u/c08ww=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OOrxlajmImZXKgUN3fi/ETblSJLGwuBqdMn1HtNxikoj8n19rQG/xf+Hboe3gORv4 KuW1Twxqb3ZHyaUBeu9RDLXzrsncDXXqiP7d/1pwO+TyPcrALgnmc+NZf61eCKYm1i 3HjgiNvg0r9a0MWJM1/a0VyQqd35yBa/0AxhcEzc= From: Zev Weiss To: Joel Stanley Cc: openbmc@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Andrew Jeffery , Zev Weiss , Greg Kroah-Hartman , Rob Herring , Lubomir Rintel , - , linux-serial@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: serial: 8250: update for aspeed, sirq-active-high Date: Mon, 29 Mar 2021 19:23:37 -0500 Message-Id: <20210330002338.335-3-zev@bewilderbeest.net> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210330002338.335-1-zev@bewilderbeest.net> References: <20210330002338.335-1-zev@bewilderbeest.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update DT bindings documentation for the new incarnation of the aspeed,sirq-polarity-sense property. Signed-off-by: Zev Weiss --- Documentation/devicetree/bindings/serial/8250.yaml | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml index f54cae9ff7b2..0bbb7121f720 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -13,7 +13,7 @@ allOf: - $ref: /schemas/serial.yaml# - if: required: - - aspeed,sirq-polarity-sense + - aspeed,sirq-active-high then: properties: compatible: @@ -181,13 +181,11 @@ properties: rng-gpios: true dcd-gpios: true - aspeed,sirq-polarity-sense: - $ref: /schemas/types.yaml#/definitions/phandle-array + aspeed,sirq-active-high: + type: boolean description: | - Phandle to aspeed,ast2500-scu compatible syscon alongside register - offset and bit number to identify how the SIRQ polarity should be - configured. One possible data source is the LPC/eSPI mode bit. Only - applicable to aspeed,ast2500-vuart. + Set to indicate that the SIRQ polarity is active-high (default + is active-low). Only applicable to aspeed,ast2500-vuart. required: - reg @@ -227,7 +225,7 @@ examples: interrupts = <8>; clocks = <&syscon ASPEED_CLK_APB>; no-loopback-test; - aspeed,sirq-polarity-sense = <&syscon 0x70 25>; + aspeed,sirq-active-high; }; ... From patchwork Tue Mar 30 00:23:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zev Weiss X-Patchwork-Id: 411895 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB193C433E0 for ; Tue, 30 Mar 2021 00:32:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A889461985 for ; Tue, 30 Mar 2021 00:32:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230252AbhC3AcN (ORCPT ); Mon, 29 Mar 2021 20:32:13 -0400 Received: from thorn.bewilderbeest.net ([71.19.156.171]:39667 "EHLO thorn.bewilderbeest.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230204AbhC3Ab7 (ORCPT ); Mon, 29 Mar 2021 20:31:59 -0400 Received: from hatter.bewilderbeest.net (unknown [IPv6:2600:6c44:7f:ba20::7c6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: zev) by thorn.bewilderbeest.net (Postfix) with ESMTPSA id 3CD4FA8F; Mon, 29 Mar 2021 17:25:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bewilderbeest.net; s=thorn; t=1617063904; bh=w56QNwgTzFfQ20vdnp8aRrubhpSunslkOzk8MrUdZrs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MK8VEoXaqnXH7v/g8EcaqO9T/0rkLDIvncZI8E7U1Do4HtUu0GgJuIMXBG3N4lAb9 gcWlsAeiXvmTgTJOUxknhUhuOAz3SaAfUn5ACUpPJ1wD8Y3SAhhjeItdGmzhtu9rq3 D05/dvDIiWIqUZNIwjsm2lotMzG+W3NBYgxNyFSM= From: Zev Weiss To: Joel Stanley Cc: openbmc@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Andrew Jeffery , Zev Weiss , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH 3/3] ARM: dts: aspeed: add ASRock E3C246D4I BMC Date: Mon, 29 Mar 2021 19:23:38 -0500 Message-Id: <20210330002338.335-4-zev@bewilderbeest.net> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210330002338.335-1-zev@bewilderbeest.net> References: <20210330002338.335-1-zev@bewilderbeest.net> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This is a relatively low-cost AST2500-based Xeon E-2100/E-2200 series mini-ITX board that we hope can provide a decent platform for OpenBMC development. This initial device-tree provides the necessary configuration for basic BMC functionality such as host power control, serial console and KVM support, and POST code snooping. Signed-off-by: Zev Weiss Reviewed-by: Joel Stanley --- .../boot/dts/aspeed-bmc-asrock-e3c246d4i.dts | 188 ++++++++++++++++++ 1 file changed, 188 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts diff --git a/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts new file mode 100644 index 000000000000..27b34c3cf67a --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-asrock-e3c246d4i.dts @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include +#include + +/{ + model = "ASRock E3C246D4I BMC"; + compatible = "aspeed,ast2500"; + + aliases { + serial4 = &uart5; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + /* BMC_HB_LED_N */ + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + + system-fault { + /* SYSTEM_FAULT_LED_N */ + gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>; + panic-indicator; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + uid-button { + label = "uid-button"; + gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>, + <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>, + <&adc 10>, <&adc 11>, <&adc 12>; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <100000000>; /* 100 MHz */ +#include "openbmc-flash-layout.dtsi" + }; +}; + +&uart5 { + status = "okay"; +}; + +&vuart { + status = "okay"; + aspeed,sirq-active-high; +}; + +&mac0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; +}; + +&i2c1 { + status = "okay"; + + /* thermal sensor, one diode run to a disconnected header */ + w83773g@4c { + compatible = "nuvoton,w83773g"; + reg = <0x4c>; + }; +}; + +&i2c3 { + status = "okay"; + + /* FRU EEPROM */ + eeprom@57 { + compatible = "st,24c128", "atmel,24c128"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +&video { + status = "okay"; +}; + +&vhub { + status = "okay"; +}; + +&lpc_ctrl { + status = "okay"; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&gpio { + status = "okay"; + gpio-line-names = + /* A */ "BMC_MAC1_INTB", "BMC_MAC2_INTB", "NMI_BTN_N", "BMC_NMI", + "", "", "", "", + /* B */ "", "", "", "", "", "IRQ_BMC_PCH_SMI_LPC_N", "", "", + /* C */ "", "", "", "", "", "", "", "", + /* D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON", + "", "", "", "", + /* E */ "", "", "", "", "", "", "", "", + /* F */ "LOCATORLED_STATUS_N", "LOCATORBTN", "", "", + "", "", "BMC_PCH_SCI_LPC", "BMC_NCSI_MUX_CTL", + /* G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2", + "BMC_ALERT1_N_R", "BMC_ALERT2_N_R", "BMC_ALERT3_N", "SML0ALERT", + /* H */ "FM_ME_RCVR_N", "O_PWROK", "SKL_CNL_R", "D4_DIMM_EVENT_3V_N", + "MFG_MODE_N", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN", + /* I */ "", "", "", "", "", "", "", "", + /* J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "BMC_SMI", "", + "", "", "", "", + /* K */ "", "", "", "", "", "", "", "", + /* L */ "BMC_CTS1", "BMC_DCD1", "BMC_DSR1", "BMC_RI1", + "BMC_DTR1", "BMC_RTS1", "BMC_TXD1", "BMC_RXD1", + /* M */ "BMC_LAN0_DIS_N", "BMC_LAN1_DIS_N", "", "", + "", "", "", "", + /* N */ "", "", "", "", "", "", "", "", + /* O */ "", "", "", "", "", "", "", "", + /* P */ "", "", "", "", "", "", "", "", + /* Q */ "", "", "", "", + "BMC_SBM_PRESENT_1_N", "BMC_SBM_PRESENT_2_N", + "BMC_SBM_PRESENT_3_N", "BMC_PCIE_WAKE_N", + /* R */ "", "", "", "", "", "", "", "", + /* S */ "PCHHOT_BMC_N", "", "RSMRST", + "", "", "", "", "", + /* T */ "", "", "", "", "", "", "", "", + /* U */ "", "", "", "", "", "", "", "", + /* V */ "", "", "", "", "", "", "", "", + /* W */ "PS_PWROK", /* dummy always-high signal */ + "", "", "", "", "", "", "", + /* X */ "", "", "", "", "", "", "", "", + /* Y */ "SLP_S3", "SLP_S5", "", "", "", "", "", "", + /* Z */ "CPU_CATERR_BMC_PCH_N", "", "SYSTEM_FAULT_LED_N", "BMC_THROTTLE_N", + "", "", "", "", + /* AA */ "CPU1_THERMTRIP_LATCH_N", "", "CPU1_PROCHOT_N", "", + "", "", "IRQ_SMI_ACTIVE_N", "FM_BIOS_POST_CMPLT_N", + /* AB */ "", "", "ME_OVERRIDE", "BMC_DMI_MODIFY", + "", "", "", "", + /* AC */ "LAD0", "LAD1", "LAD2", "LAD3", + "CK_33M_BMC", "LFRAME", "SERIRQ", "S_PLTRST"; + + /* Assert BMC_READY so BIOS doesn't sit around waiting for it */ + bmc-ready { + gpio-hog; + gpios = ; + output-high; + }; +}; + +&adc { + status = "okay"; +}; + +&kcs3 { + status = "okay"; + aspeed,lpc-io-reg = <0xca2>; +};