From patchwork Fri May 25 10:31:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 136823 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3396527lji; Fri, 25 May 2018 03:32:33 -0700 (PDT) X-Google-Smtp-Source: AB8JxZp3Je7POjt+99OIiDS8cMZ0c6ElBImrYEd1zwjAKIfDhbPlY8xpWc3ESAGuW236QWGDE4r0 X-Received: by 2002:a17:902:3343:: with SMTP id a61-v6mr1975759plc.241.1527244353219; Fri, 25 May 2018 03:32:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527244353; cv=none; d=google.com; s=arc-20160816; b=jA4DK0w72NwTuVvZgUJh+y1AhxTSQj6AaFgscluIdtOHLrCVZ6bWBZteHmDWrHdT0P srfjzTXf5nKYA11ABmFCQNmJvECpLQAA9boMP2elgJfVaaIdRsBqRuvzRqSzP8co6h3N AnVA7j6OIDT65Eyb/kUSB/Gwy5y5HsVmsLHGwksnr5JDVUheDbHy6l3ZE40gQHVB1YmU +RFxzb0jYAueHvQOfIr7IeMKTCXzJ7l9DAsTjqzF0VlZCRfMrmGaHMNxgdWgOt6GaTZ8 h87wzccDKVyK5VHy13ROihq5p7m96KMqSHqGA1wwV53Bot+/hqwmbgpEvo/QwH+IZU0p Ic/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=zI66TbNVNMgbvGgKA9cbPEASdB0YNQZa2sfpPg3SpIw=; b=EUENn1KmisPcg7l9BAUeAgQDy9m7/l5RNDkCE1Io+sFFV0yWVUps3ROtVDVxhwC+Av eQWdyqFwIO2CkwIfJWWeAuTbag220dGqV2Xd3khOVgCadc2eCK5WTNribdx6n5k3+EuK bEY5ieNxVFvFdplboymfwL9EgK/esPn6G21yn3gMsuquf+1yed795/cUFigi5CoYZp17 DWSSWn93iJo7iU0JXQx3Ql6su1kTGOpQnysPskMk4/KHIHeiIdTX0aPx/2ux834sXp/m aDe8LlDUETQiOgR55THYnda9MUvi6Gj4JSlG3K1t/Juj1RwWHlRld0LeTBL3yi0gjF79 Vm5A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EVRp+c/Q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k193-v6si18179282pgc.520.2018.05.25.03.32.32; Fri, 25 May 2018 03:32:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EVRp+c/Q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966080AbeEYKc3 (ORCPT + 30 others); Fri, 25 May 2018 06:32:29 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:46193 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965999AbeEYKcZ (ORCPT ); Fri, 25 May 2018 06:32:25 -0400 Received: by mail-pf0-f195.google.com with SMTP id p12-v6so2387961pff.13 for ; Fri, 25 May 2018 03:32:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=zI66TbNVNMgbvGgKA9cbPEASdB0YNQZa2sfpPg3SpIw=; b=EVRp+c/QZCC0EwnyxS9TnmhyxQU+KGHr7UiIgprZXJrDmKqnZffKE/ygH1CnSSWlAr gssw73Tes/bRHDvtHFoUf+ADQYC065fJvu4zC5e1vy5BBdYSEhHElB3gxRU48KKaD8vq wQClyyJwXGJTnu3JeaeP11Edwcl3ImW3KxZjg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=zI66TbNVNMgbvGgKA9cbPEASdB0YNQZa2sfpPg3SpIw=; b=Cf7czJC6fjiAgLFoGTliLZkDh8BE/VoNMFpKZjfaFFDwu1a6pb9C5FpTVBHVpTUjbE g930SAFIPZDjcDyaq+HA9WxsDsSKxAcek9VUiVnevcD9rxppfgtfFYVS1qxbrChrP9JD DSir1oz9txUQVushj4gb5oM0HqTWFtGbuzNrQVZuQ9SlY2ylGnrmlnKUSwEU5eWUvl1A x19zvV3W9Jm0ZfCA3JnQvY8UdVtaXduHdzpiV4w4nPdK4VCIReGniC6T9nnwQ1/cMml1 RSi2ArYw6TzHJHKn389bIkWX4RDu/WXJIoxzgpWddmnzTLi8jCQkaFguO8DNAJqb73w+ uV7Q== X-Gm-Message-State: ALKqPwctdfj2TlCK2F2O/aUPkJfVDWv5EK3npAqJqZHX5N/DNC3+T7zu NLPyzNuBJi4cJPFCUKtzUsZKvg== X-Received: by 2002:a62:6795:: with SMTP id t21-v6mr1625648pfj.204.1527244345044; Fri, 25 May 2018 03:32:25 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id p71-v6sm58518066pfl.170.2018.05.25.03.32.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:24 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/15] arm: dts: ls1021a: Add missing cooling device properties for CPUs Date: Fri, 25 May 2018 16:01:48 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index c55d479971cc..f18490548c78 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -84,6 +84,7 @@ device_type = "cpu"; reg = <0xf01>; clocks = <&clockgen 1 0>; + #cooling-cells = <2>; }; }; From patchwork Fri May 25 10:31:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 136825 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3396577lji; Fri, 25 May 2018 03:32:36 -0700 (PDT) X-Google-Smtp-Source: AB8JxZocvChG8kAmm9OcSJv2oukA+8beH21tPgK4EgIUskevXO2PEQX8tWOAUpGLvdCp9F9P8S1M X-Received: by 2002:a17:902:8a8c:: with SMTP id p12-v6mr1995116plo.94.1527244356365; Fri, 25 May 2018 03:32:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527244356; cv=none; d=google.com; s=arc-20160816; b=bEHMMJp7iYFG0f3kjo71aQl6rVzy346eRNfTwDp8pl49y5gV2vkpF3cqksDH1vo1Q0 Akp/89ftr9jaltWbpzoMz0w8S/s3pHYkZsgbvzJ4JkNket+lIJk9oZzSxvPvRu08dEto R0nmhCqGNX85/MYgAr/Jd8oFhQVObJTqUqJlcXpwf70UDAWP9RNEgb5A9e2Wa26fyNWU XGPnM/UlxMD8n2AvzSKpS72Qe/iRoEFaEl3BgzmCaVw66JDxA1DS3kqlLtLfLuDhuoAg dSLFtq5R5Nt4iX7gLz2jEQeXIECd4Nd0Swqr65ux3MFB+JXrAR1ZhXPf1QBHUQoO0NzE 1MgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=V+CJBX3KvWHKeo7l89z3xy06DLgg/62TOHOYsyOLhig=; b=zSNfTeK8wWuMGO1mpSh3wvmwl2KTnVwYg5SFMBfKOhaXTlemdcyPM7o81XhNH49eI6 cXgvhqfzSPKNlnZk8Jfgi1N9oqcJH9nRpUJGU/mak+pCaerGA1dVvChdynj/RgsSXu4E lDeN31oJ3FQT5FsjH1dvw2NmYuGO8R3DH2tPJGylapyMWIk+PVesfAvCRyD3TGlf4EWZ +BgWlYNUAdX46WnisTSQNmnRxE1200gVVFNNwDcX27oHncDaWZBFt7tFcChPVt/kRHNY cgzby/5juoeH1rixTuYOORui1sRibtaP8e5sJXlyx2iNHZysULO57fE9EQIR6CE5NjEH VgYQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LBWCsEkh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t19-v6si22708780plo.287.2018.05.25.03.32.36; Fri, 25 May 2018 03:32:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LBWCsEkh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966164AbeEYKcd (ORCPT + 30 others); Fri, 25 May 2018 06:32:33 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:41918 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966081AbeEYKcb (ORCPT ); Fri, 25 May 2018 06:32:31 -0400 Received: by mail-pg0-f65.google.com with SMTP id d14-v6so2128775pgv.8 for ; Fri, 25 May 2018 03:32:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=V+CJBX3KvWHKeo7l89z3xy06DLgg/62TOHOYsyOLhig=; b=LBWCsEkhxbL761KunTXV8L+9aOXdSXQW/KJXjM1eHHahJJhxrVK/f4Vja8k6EnWmMA E/8lNwhg1NbxJN/Tr+mL4kPRtKAR2J8qC4+ZgGKKCnKseClQgwBvhsae5wcnhSAkpjXw neyjDknxvLP48K9P+Y6/6VmJP/hjJpU0y4rQ0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=V+CJBX3KvWHKeo7l89z3xy06DLgg/62TOHOYsyOLhig=; b=HQqKdbryDKp/w2WtmPBcEvRQd5hE29+lCzgTaolpXHFf/eCtZ06OZ4TOVl0tkMecjW +42ngJdb8m/8sEtfpepVlvkSdVzvDLd+BADFNN8ATMIGRx+u59LtoXgwy14T8xhpFhQJ GTlZMfSLSCwc4p1IG47LCgiemi8WgkFn5HUE5XNZbgTqStLWrjGaN9Vdlgo8pW1+esjb JkP8zOT0xQmpzz/z+YQbArpG3n2qgJslJxYZTD6KnNKGvgxkZUIhOClaP8YxFIxJmzQe oJ6UPauZvqiPkVNgYiIbRO964X4nz7m+sipDpnjlzSiP3i1fmi4Xo6YFDTy3hX5ts+ds hNHw== X-Gm-Message-State: ALKqPwcJOAd9uehKYvx83nOnnGH93AsJ0TsTjDHjhOojOqNTjAbJAZw6 bMflpipuhNjTjo6FuuxthGhRZQ== X-Received: by 2002:a65:5b4d:: with SMTP id y13-v6mr1559879pgr.152.1527244350682; Fri, 25 May 2018 03:32:30 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id y24-v6sm42160948pfn.23.2018.05.25.03.32.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:30 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Heiko Stuebner , Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 04/15] arm: dts: rk322x: Add missing cooling device properties for CPUs Date: Fri, 25 May 2018 16:01:50 +0530 Message-Id: <406021e33d541ca0318a6b15687084ca19fdd943.1527244201.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/rk322x.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index be80e9a2c9af..ef414e39bf3a 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -80,6 +80,7 @@ reg = <0xf01>; resets = <&cru SRST_CORE1>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ enable-method = "psci"; }; @@ -89,6 +90,7 @@ reg = <0xf02>; resets = <&cru SRST_CORE2>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ enable-method = "psci"; }; @@ -98,6 +100,7 @@ reg = <0xf03>; resets = <&cru SRST_CORE3>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ enable-method = "psci"; }; }; From patchwork Fri May 25 10:31:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 136831 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3397016lji; Fri, 25 May 2018 03:33:00 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoL0dYXm6Vao5UAfl01+dClBIpH4qxz2s59WRxwojwWYuSTQqWccA8RsDn3HuvvWmVaZsSf X-Received: by 2002:a62:c615:: with SMTP id m21-v6mr1970407pfg.232.1527244380392; Fri, 25 May 2018 03:33:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527244380; cv=none; d=google.com; s=arc-20160816; b=PPjaO16foDF6SagPHnq7bMs97bHs8U+4PfYae+s2OQep3t+S0ZBukxBQ7Glpxg8EyD Y7pu+uvzbu6biUIVzcJI/IvUp3i7Keg5cjYKWGrrQK/U2qTMYfQxN1AaaijDdEMD5CdR fzJa3ZdG7uIMeAXAMCmLvM6LTmKKbWVm+b2+78kOG/jk5qtvTHGtLNyE/ou5bPvP/RAk 4rDCteL5lyyVBOh8LWB4eEY4FsQfnZ3hHNYLVcSyU7X+P1YUr4dlR6xCL0BkzEvH/hUp y7/DgkqiNb62hxqCdCR/cGkGVq1TgF+jyecF0WtOTjuY6ktoFVWelUEqufyf7Kw6+EQ/ OH0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=oxDacl2OIDr7Nd409LauBugaXeD2W+E2eVDckohi0ks=; b=UGVbexzp0SHDMVWz/RVHLDgT9/SHr/BhyzugBDFBQYhU2tblY0FEqlaK/0U0BqmNOG Vd1OH9uNhhp7Tle4wP+ZaYvBevOFVtN6L5dywRWDEgOIZZHW0c5N/5P51M8f4MF3N0K+ qk2OHyHLSJxhc2EaT2sXiLteAEm+1e0g9zewDInU6RMnTJgD1lA7SLheW2wUD3K1CVxl 8musEcQlA4nJq4uYDlHMnc7jLSVvRiIOlmt2ylqfUXuTMLgNMH6nioCdbAL9LmYVY1l8 OgJsjQmWFJuOpa4TCTd5AcCZ82n8fjGapEye+2HTy46pJF/j8moYOHCeEASs1+4f24h5 nQ2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aUjijDtA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p1-v6si23701773plb.204.2018.05.25.03.33.00; Fri, 25 May 2018 03:33:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=aUjijDtA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966389AbeEYKc6 (ORCPT + 30 others); Fri, 25 May 2018 06:32:58 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:40860 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966261AbeEYKcs (ORCPT ); Fri, 25 May 2018 06:32:48 -0400 Received: by mail-pg0-f68.google.com with SMTP id l2-v6so2128668pgc.7 for ; Fri, 25 May 2018 03:32:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=oxDacl2OIDr7Nd409LauBugaXeD2W+E2eVDckohi0ks=; b=aUjijDtAWzLuCraf/W+u9hdAiXBJCGzHqYrbYBigOHcpOdOVz7d7vx5/o6SgESDQ0A jtES9fyNgy9vWG+Z5yW7OFFGWSqm1rVOePFI51XlAaWtMIkBIpkmiFERvWLksBe0DWHJ uH71VxUreFLM7ibCJrlXWJr6zSvraZzFyiMZA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=oxDacl2OIDr7Nd409LauBugaXeD2W+E2eVDckohi0ks=; b=MmPWmlISIuHvu8s2y1Xr+zPho1uSPR6GmmbIEI2iPHSsUMsgzBoYz/vYrKhdkp0RWq xHYIZ96VprznquVB7lp2v0hKQ591A3iFHIgaALzqrB/FrcNdQOpXJ8TaPCdmDLzbepEi dOcN/etO3mf1c8sUC/ryxfzg/vQOztmKNXz9udurgntSBfwmgAclLnYB0VOfxucaXqe9 muJ1ztJEZJowJRCVBUyzMc7QhEgXdVjBjEw7t7nz8vTaW0E76NRsMPzcYROoqf71S3Ul wIhVRxjWD1uxzkUa0nUYRDO89W+oxZ7YUhpUJ6aR63IGXaUOrsNRqUzWSXAlXTJ6iVFZ 8/oA== X-Gm-Message-State: ALKqPwe6L1M43PeFpEloYlIBs15ZDX6YFQ2CXXAztpjAKlyTgANVZcEd Vynikw+jJrDF3DZNCYhC69EljbBqMFQ= X-Received: by 2002:a63:7255:: with SMTP id c21-v6mr623450pgn.99.1527244368051; Fri, 25 May 2018 03:32:48 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id l23-v6sm11414149pgc.61.2018.05.25.03.32.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:47 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Heiko Stuebner , Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 10/15] arm: dts: rk3288: Add missing cooling device properties for CPUs Date: Fri, 25 May 2018 16:01:56 +0530 Message-Id: <11f16618dc965a7996976a2bca040cd87d1961d2.1527244201.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Fix other missing properties (clocks, OPP, clock latency) as well to make it all work. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/rk3288.dtsi | 54 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index d7e49d29ace5..752a892847dd 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -122,18 +122,72 @@ compatible = "arm,cortex-a12"; reg = <0x501>; resets = <&cru SRST_CORE1>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; cpu2: cpu@502 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x502>; resets = <&cru SRST_CORE2>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; cpu3: cpu@503 { device_type = "cpu"; compatible = "arm,cortex-a12"; reg = <0x503>; resets = <&cru SRST_CORE3>; + operating-points = < + /* KHz uV */ + 1608000 1350000 + 1512000 1300000 + 1416000 1200000 + 1200000 1100000 + 1008000 1050000 + 816000 1000000 + 696000 950000 + 600000 900000 + 408000 900000 + 312000 900000 + 216000 900000 + 126000 900000 + >; + #cooling-cells = <2>; /* min followed by max */ + clock-latency = <40000>; + clocks = <&cru ARMCLK>; }; }; From patchwork Fri May 25 10:31:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 136835 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3398285lji; Fri, 25 May 2018 03:34:24 -0700 (PDT) X-Google-Smtp-Source: AB8JxZovG+SHeTWFFnLQT+/xvCelSYAcoUDwKPZuGPBWsmBDzozpkThKztpA3YvvQl/zeywyn0wg X-Received: by 2002:a63:4202:: with SMTP id p2-v6mr1538975pga.137.1527244464774; Fri, 25 May 2018 03:34:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527244464; cv=none; d=google.com; s=arc-20160816; b=GIeuldVrxPdS9kqdR/j625R01avGSHPC/UY7NFOeEsg2UV9CGdYvGs4HwEVe8wmsPw bdekPfal5RgFEDF3H6OLMO976rcV5GflarBBpo59LxeexoGKFS5ufs2jUN3/Xz8e/CRV CU0r9l4bqb6JcVmYX169bHjHpTLZsrweKEib319c/kIc384OI6yTP2p6lqbYv5d7sgbf JcUTxD0qP9fS+2p2//pn5CcD8wPsgoHwdSwvpojA5TKMlrgTtcDjaoCAvs5HBoJkLE1w nEbQ1fEDvG+2hi4C4YyEojEPPLPf1JoOY5cy2Jvhtt7LWIqZF1bjGiZvQ+82Zx6uM+BA y0tQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=uP4pMZmamkJtAAzxp+d9DWsQGUwFr/33Qn2cNR6x8Fo=; b=EhodXLe4umgjJgS8xEPq7LmjBr+wvM7mlIBA4TYzZ4vFZOe8Hz1S8cPWSIIz2tb/NF UC6PVrBSYSyxA7ZVMS3Wu3m6plO8lc7FcXVvkI5JAQkfuZ8BYX6FqzvQpTF54uK7Y5+l /bLllQCSkFbJRyVHjRReeWpVEeX5SyH2TGOkyCbLD6rHg6iiSpHlyDmoxhJ7FzrBrg6p 9umZnZFvpWLowJzFDDfDMmeC0rKykf6vYCylB8TWX11vC4RwnkJwkArg91lqQpQfBWaj a41IVzzMlZjmFylbg03imbyQ/1ukK8767gJzSI7SkhLjOhf2ie5D+lfC+WMCgHrMatej YUYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IwIm0Pg6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f9-v6si9575702pgp.224.2018.05.25.03.34.24; Fri, 25 May 2018 03:34:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IwIm0Pg6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966479AbeEYKeW (ORCPT + 30 others); Fri, 25 May 2018 06:34:22 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:42845 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966302AbeEYKcy (ORCPT ); Fri, 25 May 2018 06:32:54 -0400 Received: by mail-pl0-f66.google.com with SMTP id u6-v6so2920463pls.9 for ; Fri, 25 May 2018 03:32:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=uP4pMZmamkJtAAzxp+d9DWsQGUwFr/33Qn2cNR6x8Fo=; b=IwIm0Pg6XXqiqViz2uxIpR3VXA6dHElM6tcBrZ6vq4t9HwlpfO1HQdOXKVfx72TFMr YmaQhVeVDQwK7MLyY3pvxx4s5v8Ezb+fBAslnb7vO1c264LuoydGyTqp53iJ7Ibx57ZN 5tZHCHOWqUUl1NDdA0/p7AnvoSS31D7XVHq7w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=uP4pMZmamkJtAAzxp+d9DWsQGUwFr/33Qn2cNR6x8Fo=; b=e8c20pBKUG7WI52y/TcCrjjlj0YisBlkkDlnbdjCdngnsFLsGQ47ZEu7iQHSTp5zOM Qu1n0IRWcfmtJayInPaajjh1f9ml43mP8pR1sjclw/fh4bqtJ1VlEDcSBNDu5Q4w4keO xUNd/FKwTKc/7qI/OfgduoMWPrIUKclaz9LYR9oFUGb/CDJu0ZiI8tv9QzHcOjkxFCSj RgcD1eAchbYR3lf55hBChBbKmVb/PuX3Bks2kW1aOO41kQr7HPRWZBVuwXrFVMrXL2tf T0grTFQwq6iwdUI3vvh8p6QL70nY0V5Y0YsC/YmRnDmWwJdKMiExKjwbLDalcMUAF6RS CqqQ== X-Gm-Message-State: ALKqPwcjlsw1op7Ysx6P0e1Xa2SdICMkaXvuNFxhyJKF4oRKpJ9jPcrN H/TdYjRFsBdok/cy/SY/lMW/xhknak0= X-Received: by 2002:a17:902:8a87:: with SMTP id p7-v6mr1999274plo.278.1527244373792; Fri, 25 May 2018 03:32:53 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id 76-v6sm55103277pfm.178.2018.05.25.03.32.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:53 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 12/15] arm: dts: highbank: Add missing OPP properties for CPUs Date: Fri, 25 May 2018 16:01:58 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The OPP properties, like "operating-points", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can create an OPP table. Add such missing properties. Fix other missing property (clock latency) as well to make it all work. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/highbank.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index ed14aeac0566..50278715de76 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -56,6 +56,16 @@ next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; + operating-points = < + /* kHz ignored */ + 1300000 1000000 + 1200000 1000000 + 1100000 1000000 + 800000 1000000 + 400000 1000000 + 200000 1000000 + >; + clock-latency = <100000>; }; cpu@902 { @@ -65,6 +75,16 @@ next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; + operating-points = < + /* kHz ignored */ + 1300000 1000000 + 1200000 1000000 + 1100000 1000000 + 800000 1000000 + 400000 1000000 + 200000 1000000 + >; + clock-latency = <100000>; }; cpu@903 { @@ -74,6 +94,16 @@ next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; + operating-points = < + /* kHz ignored */ + 1300000 1000000 + 1200000 1000000 + 1100000 1000000 + 800000 1000000 + 400000 1000000 + 200000 1000000 + >; + clock-latency = <100000>; }; }; From patchwork Fri May 25 10:31:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 136832 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3397130lji; Fri, 25 May 2018 03:33:08 -0700 (PDT) X-Google-Smtp-Source: AB8JxZo3PwUA2fFgU7c+/BQ1ZrM9JLYHAi5d5F0owjq8+0x5f51oYE+NeslBTeiZuyc0/U+GHGyE X-Received: by 2002:a17:902:bc4a:: with SMTP id t10-v6mr2008446plz.133.1527244387863; Fri, 25 May 2018 03:33:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527244387; cv=none; d=google.com; s=arc-20160816; b=Vnmp8bRa65Hgl2FcabNKFW+eHKMdcoHng2eoNCu/T6wmw14nxwS3qNfdFPwCV8W1v3 UDPVTmTtuVXw9YEXgcWSmUCnZL2fHrFV1JcnOSZz57sYc0tinmzGxLms4yZGnDLokpFa NL9Qqgn1Xj6K1mrVNezz1DOmOmKDB8tlTZTFELw63JGKudArWLNHZR6YdhP90vQcrO9i F9CxzJK9f1IcOVJYZCpATJuGIWbmuVpPAQYzOxrWKZM9ynOkjWtLOvZkyrFhUjeNYNJ6 NcWIoj2+Zyd5uJJchtmA7tYXiccMuVY924nAKVWS3GNGV2N8QO3VmWD8jIgXiCusUrXo Uiyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=ZTzit+RJqXhsgv9R1EzagSi8rZVUX4GmJLkh6MF+hNw=; b=Frrb2BbTkVxabMkgWdhXdGk6Nwwmr3QAsq/52BzvVL8qgwpZ4YspNFJGaIYNB45SKi infEG08Y7Nw6bijbamaWjchIN6cNj+xV3KlHxMlY645BOhDNsLHoXo26OnJ9UdprvZEw 7XCMzBJYb1aQTJHtfU5hZ9GCkR95i4dcLzcAYozXO5Q95LWJ32cSg3wQt2vJDH6nEfpq tV/YdspmWX/scOduASOs3ovgUQDgrP/FH3SLsYcYlG7ASmzV1NwpLqn/smDYZuWxs2Dv GV1pLclOZUqKdrk+0zE9gsF3wAWUUDDefw70E9KeoYyojjWOPZSZ27VcLCfqdGZEgdGX Ktdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VA4WqeZO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11-v6si739293pgn.129.2018.05.25.03.33.07; Fri, 25 May 2018 03:33:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VA4WqeZO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966425AbeEYKdD (ORCPT + 30 others); Fri, 25 May 2018 06:33:03 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:41155 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966373AbeEYKc5 (ORCPT ); Fri, 25 May 2018 06:32:57 -0400 Received: by mail-pf0-f194.google.com with SMTP id v63-v6so2391048pfk.8 for ; Fri, 25 May 2018 03:32:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=ZTzit+RJqXhsgv9R1EzagSi8rZVUX4GmJLkh6MF+hNw=; b=VA4WqeZOJ145n9PRaurI6ri9SgSRVwbncYri2Ln/ey4l6ZZfc/bvpRRhBx/AabutXy UwxfnLFGhoUO+UR4n+QSTgsltrE+Evs6Y3oJ4KamtaupxKnD5b4zIQyK8ZJGRlsL6+ma QyGzCAA5/knPuut/49nIkmMDxnUQ5HmehOl0s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=ZTzit+RJqXhsgv9R1EzagSi8rZVUX4GmJLkh6MF+hNw=; b=MWQV4D6KmLBUUTY5iWRSGx7Fgr3EVSlFl0pVLgklSvGzwLzS4ji4sZ/s5PL/GAv7xT caVU9g6hH+MsTHEfNt6Yex1v67F4LzfBDNgxtkNjhQhDQGghMrotu84xQMdikiaSEhq8 rT+nS/NTQsB+ZqGPpMSgonro0GZpRKbitaeF2mcOqP4nzBjbvcOnL5uek+pO3lqsrnZE /FDE0pTqtohO3VeGB7yhhBxTmvu2bs44CmuPlmJFtepvKmzlysEnZeIwSufPBo2z3wNg eJKVD9Gv7SaZymPvebuyeIhC9xl1IosP075d0qRWTVUHjgF5A+G3Mro4A88zQHtYQUaA oyEQ== X-Gm-Message-State: ALKqPwc8Xm1mLVwFdR/eIpRwyzt8uaGJquNuYw3be1vppIym1OsITCdD iS7X0v78BPXyQPzE2PoL6eJBpA== X-Received: by 2002:a63:714e:: with SMTP id b14-v6mr529149pgn.73.1527244376572; Fri, 25 May 2018 03:32:56 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id c87-v6sm46430454pfd.78.2018.05.25.03.32.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:56 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Simon Horman , Magnus Damm , Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 13/15] arm: dts: r8a7743: Add missing OPP properties for CPUs Date: Fri, 25 May 2018 16:01:59 +0530 Message-Id: <5821a6dbe413b5a217ca1e24ddf8ebfa63ba6ef0.1527244201.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The OPP properties, like "operating-points", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can create an OPP table. Add such missing properties. Fix other missing property (clock latency) as well to make it all work. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/r8a7743.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 142949d7066f..e4fb31c4f0ee 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -98,8 +98,17 @@ reg = <1>; clock-frequency = <1500000000>; clocks = <&cpg CPG_CORE R8A7743_CLK_Z>; + clock-latency = <300000>; /* 300 us */ power-domains = <&sysc R8A7743_PD_CA15_CPU1>; next-level-cache = <&L2_CA15>; + + /* kHz - uV - OPPs unknown yet */ + operating-points = <1500000 1000000>, + <1312500 1000000>, + <1125000 1000000>, + < 937500 1000000>, + < 750000 1000000>, + < 375000 1000000>; }; L2_CA15: cache-controller-0 { From patchwork Fri May 25 10:32:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 136833 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp3397179lji; Fri, 25 May 2018 03:33:10 -0700 (PDT) X-Google-Smtp-Source: AB8JxZo7VXYlr4KroATzF2YxLw9Ai1+zcuuqCpw9NgJzLk4Of6ihGOKuRA5Mq45cZWTmy94h1+rT X-Received: by 2002:a65:438a:: with SMTP id m10-v6mr1543361pgp.315.1527244390248; Fri, 25 May 2018 03:33:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527244390; cv=none; d=google.com; s=arc-20160816; b=RUzSFgX6myRWSm/SThKhhbZtA8JVG4TvCE8IjUt8eGYsHQN112fY5ANHcF7w8HxWch hA7S/4wc3sothMuFK80QoWOrQw1uvdHfLweSN95pk7XRoE4StkXn2IHb3NqrsUEt4td9 OhjoAIMdcg4/RIrtdAnqI2Y/TvIUeGa7AqYK5PF55GJ9vfuXe8j9aa1rUfFc6XdWA4Cc akmwOV5I859fP1zdJrmZZA6a+pPZtfFks5hQ4nmFWvW4HNZ6YmLKntPdwNQijyZ07KBD IpyCQy3KrphsUOzfArbXtH3jrPXkT/nU87Tn5px9mwaTkyxaKWODoXmWZnkMmaLDOFWk IQlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=MHvuztnncuTm520CThQq85XP/1Zrea3H9cY3BfMcbf8=; b=szZk5iUmTd4gobBo7ZBCawRQXz0A+r+WdKPFsXMJFQ9vSQwfe82oS17E1jU8eHcI+9 Lw9GtpZEYNdUrrHVEcFymOQri66/RTVLm+rCEYopYecIh8Nuc0uhQxJWpgt/Uy5wL7oG jHgDHjvbI4YokjmCTgHcmyYYMMfCELkxDpiinomcY0WrMvr7OI+kZpYNhjEIykbVMHqP BetU4HBO9w/35sbQrMQ9XlR9dn83aCsHQKeUQdRZzDyLKMPw4rvgNbX3Hvts3w4PaeUC Ffpqj4pJnMfu5+embPpGzcDBntTsoGQ6Yzf+MexC0y3kE9N7bQoAozja4TTRxdI5WK5c nv9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UzlZbYrM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11-v6si739293pgn.129.2018.05.25.03.33.09; Fri, 25 May 2018 03:33:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UzlZbYrM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966453AbeEYKdH (ORCPT + 30 others); Fri, 25 May 2018 06:33:07 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:45596 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966415AbeEYKdD (ORCPT ); Fri, 25 May 2018 06:33:03 -0400 Received: by mail-pf0-f195.google.com with SMTP id c10-v6so2389380pfi.12 for ; Fri, 25 May 2018 03:33:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=MHvuztnncuTm520CThQq85XP/1Zrea3H9cY3BfMcbf8=; b=UzlZbYrMaSM8EbFgKbPqwEx9zJ/YWJ+abi5h1zRFwCE0Pwfnqg3e3zney5BWfASr9t tzfR3OA6pwVnekxc0FU1ayz9K4eFQO0Q9sTp9Or08nOgKkgWRPPNUpupQzuRD42Pid5Q W0FPdsQHHL9/wIRstZlSieE0XakHBX7mQe/0w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=MHvuztnncuTm520CThQq85XP/1Zrea3H9cY3BfMcbf8=; b=eUWd36RKMOQGtc87wk/6hnKhgv5G7L3HtTNkHX9w5WGBdJHyFZXf5LgIyoL7s4ZgSW m3mmP+DGdqP24YZwxJqmXOM73J91ZVNUbkIw99UTOak0i5k9G8gzGLj3L+AZ0dq4D5av YKsjW8LCoK5PJcvv9FDV/0ODL+kL4P0xw+X7cL/qJqid/5Mr5EE7fbv29tAWxHjWRKvA UeV5u2m+PuNUelPVGClxM6dkzyu+YCNTc0SqU4N7xmoorYFQTj8hHP9KVCAwsf4nnBGh 4n0YpMuq7+tVrB6W0G0VKia4BJ3rCNKU82l1zeFbM3Y0+AZd5PghDLiEH/65eRiMxNNF uVyA== X-Gm-Message-State: ALKqPweDItO8pb4Ajo5QxJcNPLfdJ8OMScpJCRvCYeBGjKKL9bgKStWL Ay3YIELSR4fRkNlczsSarxkX/g== X-Received: by 2002:aa7:8354:: with SMTP id z20-v6mr1981456pfm.166.1527244382484; Fri, 25 May 2018 03:33:02 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id x2-v6sm55438900pfk.113.2018.05.25.03.33.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:33:01 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Mark Rutland Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 15/15] arm: dts: imx: Add missing OPP properties for CPUs Date: Fri, 25 May 2018 16:02:01 +0530 Message-Id: <264124e14b966a1bbc07c364fbd89fc55aa765e6.1527244201.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The OPP properties, like "operating-points", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can create an OPP table. Add such missing properties. Fix other missing properties (like clocks, supply, clock latency) as well to make it all work. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/imx6dl.dtsi | 23 ++++++++++ arch/arm/boot/dts/imx6q-cm-fx6.dts | 66 +++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6q.dtsi | 87 ++++++++++++++++++++++++++++++++++++-- arch/arm/boot/dts/imx7d.dtsi | 5 +++ 4 files changed, 178 insertions(+), 3 deletions(-) -- 2.15.0.194.g9af6a3dea062 diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index b384913c34dd..cc8ffc42d128 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -50,6 +50,29 @@ device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 996000 1250000 + 792000 1175000 + 396000 1150000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 996000 1175000 + 792000 1175000 + 396000 1175000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_STEP>, + <&clks IMX6QDL_CLK_PLL1_SW>, + <&clks IMX6QDL_CLK_PLL1_SYS>; + clock-names = "arm", "pll2_pfd2_396m", "step", + "pll1_sw", "pll1_sys"; + arm-supply = <®_arm>; + pu-supply = <®_pu>; + soc-supply = <®_soc>; }; }; diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts index 65ef4cacbc71..18ae4f3be6e3 100644 --- a/arch/arm/boot/dts/imx6q-cm-fx6.dts +++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts @@ -187,6 +187,72 @@ >; }; +&cpu1 { + /* + * Although the imx6q fuse indicates that 1.2GHz operation is possible, + * the module behaves unstable at this frequency. Hence, remove the + * 1.2GHz operation point here. + */ + operating-points = < + /* kHz uV */ + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 975000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; +}; + +&cpu2 { + /* + * Although the imx6q fuse indicates that 1.2GHz operation is possible, + * the module behaves unstable at this frequency. Hence, remove the + * 1.2GHz operation point here. + */ + operating-points = < + /* kHz uV */ + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 975000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; +}; + +&cpu3 { + /* + * Although the imx6q fuse indicates that 1.2GHz operation is possible, + * the module behaves unstable at this frequency. Hence, remove the + * 1.2GHz operation point here. + */ + operating-points = < + /* kHz uV */ + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 975000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; +}; + &ecspi1 { cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio3 19 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 70483ce72ba6..78b89bb1bfed 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -50,25 +50,106 @@ soc-supply = <®_soc>; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 975000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_STEP>, + <&clks IMX6QDL_CLK_PLL1_SW>, + <&clks IMX6QDL_CLK_PLL1_SYS>; + clock-names = "arm", "pll2_pfd2_396m", "step", + "pll1_sw", "pll1_sys"; + arm-supply = <®_arm>; + pu-supply = <®_pu>; + soc-supply = <®_soc>; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <2>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 975000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_STEP>, + <&clks IMX6QDL_CLK_PLL1_SW>, + <&clks IMX6QDL_CLK_PLL1_SYS>; + clock-names = "arm", "pll2_pfd2_396m", "step", + "pll1_sw", "pll1_sys"; + arm-supply = <®_arm>; + pu-supply = <®_pu>; + soc-supply = <®_soc>; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <3>; next-level-cache = <&L2>; + operating-points = < + /* kHz uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 975000 + >; + fsl,soc-operating-points = < + /* ARM kHz SOC-PU uV */ + 1200000 1275000 + 996000 1250000 + 852000 1250000 + 792000 1175000 + 396000 1175000 + >; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clks IMX6QDL_CLK_ARM>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_STEP>, + <&clks IMX6QDL_CLK_PLL1_SW>, + <&clks IMX6QDL_CLK_PLL1_SYS>; + clock-names = "arm", "pll2_pfd2_396m", "step", + "pll1_sw", "pll1_sys"; + arm-supply = <®_arm>; + pu-supply = <®_pu>; + soc-supply = <®_soc>; }; }; diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 4c9877ec29f2..5434a8aa5602 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -21,6 +21,11 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + operating-points = < + /* KHz uV */ + 996000 1075000 + 792000 975000 + >; clock-frequency = <996000000>; }; };