From patchwork Thu Apr 20 07:54:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 97724 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp671894qgf; Thu, 20 Apr 2017 00:57:22 -0700 (PDT) X-Received: by 10.223.139.22 with SMTP id n22mr6167425wra.38.1492675042454; Thu, 20 Apr 2017 00:57:22 -0700 (PDT) Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id c15si7850393wrb.156.2017.04.20.00.57.22; Thu, 20 Apr 2017 00:57:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 06505C21DBD; Thu, 20 Apr 2017 07:56:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 82DF9C21DAD; Thu, 20 Apr 2017 07:55:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CFADAC21C50; Thu, 20 Apr 2017 07:55:02 +0000 (UTC) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by lists.denx.de (Postfix) with ESMTPS id 9F656C21CA2 for ; Thu, 20 Apr 2017 07:55:01 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id v3K7sktG008495; Thu, 20 Apr 2017 16:54:47 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com v3K7sktG008495 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1492674887; bh=RkOld7A8cSshnl7UfCFSOexv73ZibV6JOk18VRBfMEo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gPu9gsHEkk1/IHvebpf7+ops7F4fHv7EUKrw+gY7cSCPCJ4db1CnuEADJucQ94w+v pxrligLOUBg2FZg1EMSQr990fcb7rgVfVGy2IljWDTE9DUW/9BlJ0xWFyvcsjmtdKR 8/dfqGZnQvFo2wmNDXx6AAWLoWU0yHrsJVG84mIzDdWUwuVoNcuUnlDyUpWmjYLIOK zzmCneELxiuMmZbU3paN3vD/f1D0GYoIdLfhpnf+5W7Y6VcU4JG9zSvi8NQkJm6ZZy BWemc8lRbtigFJLpRk5oFqE64HOOfyx9up/Vhk164JaN0cSgIAO4ocd7vFq+abM56v Od1kc6H1k0OIg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Thu, 20 Apr 2017 16:54:42 +0900 Message-Id: <1492674884-24795-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492674884-24795-1-git-send-email-yamada.masahiro@socionext.com> References: <1492674884-24795-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 1/3] ARM: uniphier: enable PSCI sysreset for uniphier_v8_defconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This configuration is supposed to be used with ARM Trusted Firmware, so the SYSTEM_RESET is implemented in BL31. Invoke PSCI instead of U-Boot's own reset code because we need to coordinate with SCP (System Control Processor) for the system-level power management. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/Makefile | 2 ++ configs/uniphier_v8_defconfig | 3 +++ 2 files changed, 5 insertions(+) diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 124a1c6..7a0b25a 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -16,7 +16,9 @@ obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-y += dram_init.o obj-y += board_init.o obj-$(CONFIG_BOARD_LATE_INIT) += board_late_init.o +ifndef CONFIG_SYSRESET obj-y += reset.o +endif obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc/ micro-support-card.o obj-y += pinctrl-glue.o diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index c743fab..73bdaa8 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -1,4 +1,5 @@ CONFIG_ARM=y +CONFIG_ARM_SMCCC=y CONFIG_ARCH_UNIPHIER=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 @@ -29,6 +30,8 @@ CONFIG_I2C_EEPROM=y CONFIG_MMC_UNIPHIER=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y From patchwork Thu Apr 20 07:54:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 97723 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp671533qgf; Thu, 20 Apr 2017 00:55:53 -0700 (PDT) X-Received: by 10.28.56.1 with SMTP id f1mr1948416wma.20.1492674953605; Thu, 20 Apr 2017 00:55:53 -0700 (PDT) Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id 10si8306454wmn.105.2017.04.20.00.55.53; Thu, 20 Apr 2017 00:55:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 040F3C21D83; Thu, 20 Apr 2017 07:55:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id ED47BC21D80; Thu, 20 Apr 2017 07:55:04 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AAE7FC21C76; Thu, 20 Apr 2017 07:55:02 +0000 (UTC) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by lists.denx.de (Postfix) with ESMTPS id 9201EC21C50 for ; Thu, 20 Apr 2017 07:55:01 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id v3K7sktH008495; Thu, 20 Apr 2017 16:54:47 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com v3K7sktH008495 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1492674887; bh=lrk/teCxggaKyGY86y1zTHNJBFe1+eFbQ9dgAeduZVU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wmglsz94dxEGvWUTnHT/0tMIM0CMiKHDuJe4ZI+nQQ+9qHMw+jM5tA8smtXahFApj RodNM7UcHmPNHepaCGGCBZxq0aCi3mx151Nt2OPyP4S56G/0dIhanE59TSQRDWplxm bXdVFZI/T5yYd2PK5W072bLDYTTANVAqQ57N944iLerW6YjcrX6J3zfL9GxrukyLfh qffnJWeP0JEMZqnVYPGudfLCGl/OBfVvhRQCPK83PPkPLh3AAJnvtO7FKaLbIktStk vPu+42O1VlZ801RW20JZBS+FaE7QdzU+6NL+6lXPZYYI3nEpmPM32mOzi8RmikYbNX VfS0oNR2OmxOA== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Thu, 20 Apr 2017 16:54:43 +0900 Message-Id: <1492674884-24795-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492674884-24795-1-git-send-email-yamada.masahiro@socionext.com> References: <1492674884-24795-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 2/3] ARM: uniphier: show STM (SCP) status on boot and pinmon command X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The SCP (System Control Processor) or what we call STM (Stand-by MPU) is integrated in LD4, Pro4, sLD8, LD6b, LD11, and LD20. For these SoCs, show the information if STM is enabled. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_late_init.c | 16 ++++++---- arch/arm/mach-uniphier/boot-device/boot-device.c | 38 ++++++++++++++++++++++-- arch/arm/mach-uniphier/init.h | 2 ++ 3 files changed, 48 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 92dd610..4bfa10b 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -64,27 +64,33 @@ int board_late_init(void) switch (uniphier_boot_device_raw()) { case BOOT_DEVICE_MMC1: - printf("eMMC Boot\n"); + printf("eMMC Boot"); setenv("bootmode", "emmcboot"); break; case BOOT_DEVICE_NAND: - printf("NAND Boot\n"); + printf("NAND Boot"); setenv("bootmode", "nandboot"); nand_denali_wp_disable(); break; case BOOT_DEVICE_NOR: - printf("NOR Boot\n"); + printf("NOR Boot"); setenv("bootmode", "norboot"); break; case BOOT_DEVICE_USB: - printf("USB Boot\n"); + printf("USB Boot"); setenv("bootmode", "usbboot"); break; default: - printf("Unknown\n"); + printf("Unknown"); break; } + if (uniphier_have_internal_stm()) + printf(" (STM: %s)", + uniphier_boot_from_backend() ? "OFF" : "ON"); + + printf("\n"); + if (uniphier_set_fdt_file()) printf("fdt_file environment was not set correctly\n"); diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c index 5ec0b5b..0080977 100644 --- a/arch/arm/mach-uniphier/boot-device/boot-device.c +++ b/arch/arm/mach-uniphier/boot-device/boot-device.c @@ -22,6 +22,7 @@ struct uniphier_boot_device_info { const unsigned int *boot_device_count; int (*boot_device_is_usb)(u32 pinmon); unsigned int (*boot_device_fixup)(unsigned int mode); + int have_internal_stm; }; static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { @@ -31,6 +32,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 0, .boot_device_table = uniphier_sld3_boot_device_table, .boot_device_count = &uniphier_sld3_boot_device_count, + .have_internal_stm = 0, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD4) @@ -39,6 +41,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_ld4_boot_device_table, .boot_device_count = &uniphier_ld4_boot_device_count, + .have_internal_stm = 1, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) @@ -47,6 +50,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_ld4_boot_device_table, .boot_device_count = &uniphier_ld4_boot_device_count, + .have_internal_stm = 0, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_SLD8) @@ -55,6 +59,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_ld4_boot_device_table, .boot_device_count = &uniphier_ld4_boot_device_count, + .have_internal_stm = 1, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) @@ -63,6 +68,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_sel_shift = 1, .boot_device_table = uniphier_pro5_boot_device_table, .boot_device_count = &uniphier_pro5_boot_device_count, + .have_internal_stm = 0, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_PXS2) @@ -73,6 +79,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_count = &uniphier_pxs2_boot_device_count, .boot_device_is_usb = uniphier_pxs2_boot_device_is_usb, .boot_device_fixup = uniphier_pxs2_boot_device_fixup, + .have_internal_stm = 0, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD6B) @@ -83,6 +90,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_count = &uniphier_pxs2_boot_device_count, .boot_device_is_usb = uniphier_pxs2_boot_device_is_usb, .boot_device_fixup = uniphier_pxs2_boot_device_fixup, + .have_internal_stm = 1, /* STM on A-chip */ }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD11) @@ -93,6 +101,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_count = &uniphier_ld11_boot_device_count, .boot_device_is_usb = uniphier_ld11_boot_device_is_usb, .boot_device_fixup = uniphier_ld11_boot_device_fixup, + .have_internal_stm = 1, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) @@ -103,6 +112,7 @@ static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { .boot_device_count = &uniphier_ld11_boot_device_count, .boot_device_is_usb = uniphier_ld20_boot_device_is_usb, .boot_device_fixup = uniphier_ld11_boot_device_fixup, + .have_internal_stm = 1, }, #endif }; @@ -161,6 +171,24 @@ u32 spl_boot_device(void) info->boot_device_fixup(raw_mode) : raw_mode; } +int uniphier_have_internal_stm(void) +{ + const struct uniphier_boot_device_info *info; + + info = uniphier_get_boot_device_info(); + if (!info) { + pr_err("unsupported SoC\n"); + return -ENOTSUPP; + } + + return info->have_internal_stm; +} + +int uniphier_boot_from_backend(void) +{ + return !!(readl(SG_PINMON0) & BIT(27)); +} + #ifndef CONFIG_SPL_BUILD static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -176,12 +204,16 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_FAILURE; } - printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); + if (uniphier_have_internal_stm()) + printf("STB Micon: %s\n", + uniphier_boot_from_backend() ? "OFF" : "ON"); + + printf("Boot Swap: %s\n", boot_is_swapped() ? "ON" : "OFF"); pinmon = readl(SG_PINMON0); if (info->boot_device_is_usb) - printf("USB Boot: %s\n\n", + printf("USB Boot: %s\n", info->boot_device_is_usb(pinmon) ? "ON" : "OFF"); boot_device_count = *info->boot_device_count; @@ -189,7 +221,7 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) boot_sel = pinmon >> info->boot_device_sel_shift; boot_sel &= boot_device_count - 1; - printf("Boot Mode Sel:\n"); + printf("\nBoot Mode Sel:\n"); for (i = 0; i < boot_device_count; i++) printf(" %c %02x %s\n", i == boot_sel ? '*' : ' ', i, info->boot_device_table[i].desc); diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index 5c45f2d..4803d08 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -121,6 +121,8 @@ void uniphier_ld11_clk_init(void); void uniphier_ld20_clk_init(void); unsigned int uniphier_boot_device_raw(void); +int uniphier_have_internal_stm(void); +int uniphier_boot_from_backend(void); int uniphier_pin_init(const char *pinconfig_name); void uniphier_smp_kick_all_cpus(void); void cci500_init(int nr_slaves); From patchwork Thu Apr 20 07:54:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 97722 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp671520qgf; Thu, 20 Apr 2017 00:55:51 -0700 (PDT) X-Received: by 10.28.129.65 with SMTP id c62mr1710096wmd.79.1492674951504; Thu, 20 Apr 2017 00:55:51 -0700 (PDT) Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id u4si25015922wmu.106.2017.04.20.00.55.51; Thu, 20 Apr 2017 00:55:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 03D59C21DC8; Thu, 20 Apr 2017 07:55:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B23A1C21D86; Thu, 20 Apr 2017 07:55:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C5744C21C4C; Thu, 20 Apr 2017 07:55:02 +0000 (UTC) Received: from conuserg-08.nifty.com (conuserg-08.nifty.com [210.131.2.75]) by lists.denx.de (Postfix) with ESMTPS id 84886C21C4C for ; Thu, 20 Apr 2017 07:55:01 +0000 (UTC) Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id v3K7sktI008495; Thu, 20 Apr 2017 16:54:48 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com v3K7sktI008495 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1492674888; bh=0K5EC1tfco4ugMGLHryQOpIsMuvJ7sTdnKcEM+iGa6U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T/q9fnY5+87yAfyFXJQxCXH/8iko84ajQfFVQD2ctLF2nFYcAd7ACtn/ca8hGKBd0 F+GAwli+q568r1+qGC2eqz1tGSsGLhNDDzQrS9S5cYzzc8Y5o/z6l4ErMBknVLeHWr yNxzY3DshdtXoaqUtwIgoI4PYCR1Oj7UR+eC6OBkOAuzgm9aTQWfJ09gdDxzgGtN2S a4IKPHx+q7EXoVbT4yDvZAZq18rlNA3FjNdTG5oL2z55OqGLarcbqgh8U+2kHP96mU Q7MwHCaJy6WTF8S42/9KRlV/Rrvhn9oVBBwcWrPbwJmeS96WjepWrKZTGi+qzDwkDS eAUUgeHmx7TMQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Thu, 20 Apr 2017 16:54:44 +0900 Message-Id: <1492674884-24795-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492674884-24795-1-git-send-email-yamada.masahiro@socionext.com> References: <1492674884-24795-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 3/3] ARM: dts: uniphier: sync Device Tree with Linux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" - Use - instead of @ for OPP tables - Add input-delay properties to Cadence eMMC nodes - Restore full license text because code-diff is annoying - Fix NAND compatible strings Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11.dtsi | 59 ++++++++++++++++++++++++++----- arch/arm/dts/uniphier-ld20.dtsi | 77 +++++++++++++++++++++++++++++++---------- arch/arm/dts/uniphier-pro5.dtsi | 72 ++++++++++++++++++++++++++++---------- arch/arm/dts/uniphier-pxs2.dtsi | 56 ++++++++++++++++++++++++------ 4 files changed, 209 insertions(+), 55 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 2843adb..5294a90 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -4,7 +4,43 @@ * Copyright (C) 2016 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ X11 + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /memreserve/ 0x80000000 0x00080000; @@ -53,31 +89,31 @@ compatible = "operating-points-v2"; opp-shared; - opp@245000000 { + opp-245000000 { opp-hz = /bits/ 64 <245000000>; clock-latency-ns = <300>; }; - opp@250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; clock-latency-ns = <300>; }; - opp@490000000 { + opp-490000000 { opp-hz = /bits/ 64 <490000000>; clock-latency-ns = <300>; }; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <300>; }; - opp@653334000 { + opp-653334000 { opp-hz = /bits/ 64 <653334000>; clock-latency-ns = <300>; }; - opp@666667000 { + opp-666667000 { opp-hz = /bits/ 64 <666667000>; clock-latency-ns = <300>; }; - opp@980000000 { + opp-980000000 { opp-hz = /bits/ 64 <980000000>; clock-latency-ns = <300>; }; @@ -279,6 +315,11 @@ bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-mmc-highspeed = <2>; + cdns,phy-input-delay-mmc-ddr = <3>; + cdns,phy-dll-delay-sdclk = <21>; + cdns,phy-dll-delay-sdclk-hsmmc = <21>; }; usb0: usb@5a800100 { @@ -377,7 +418,7 @@ }; nand: nand@68000000 { - compatible = "socionext,denali-nand-v5b"; + compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index d853526..2906471 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -4,7 +4,43 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ X11 + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /memreserve/ 0x80000000 0x00080000; @@ -80,35 +116,35 @@ compatible = "operating-points-v2"; opp-shared; - opp@250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; clock-latency-ns = <300>; }; - opp@275000000 { + opp-275000000 { opp-hz = /bits/ 64 <275000000>; clock-latency-ns = <300>; }; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <300>; }; - opp@550000000 { + opp-550000000 { opp-hz = /bits/ 64 <550000000>; clock-latency-ns = <300>; }; - opp@666667000 { + opp-666667000 { opp-hz = /bits/ 64 <666667000>; clock-latency-ns = <300>; }; - opp@733334000 { + opp-733334000 { opp-hz = /bits/ 64 <733334000>; clock-latency-ns = <300>; }; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; clock-latency-ns = <300>; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; clock-latency-ns = <300>; }; @@ -118,35 +154,35 @@ compatible = "operating-points-v2"; opp-shared; - opp@250000000 { + opp-250000000 { opp-hz = /bits/ 64 <250000000>; clock-latency-ns = <300>; }; - opp@275000000 { + opp-275000000 { opp-hz = /bits/ 64 <275000000>; clock-latency-ns = <300>; }; - opp@500000000 { + opp-500000000 { opp-hz = /bits/ 64 <500000000>; clock-latency-ns = <300>; }; - opp@550000000 { + opp-550000000 { opp-hz = /bits/ 64 <550000000>; clock-latency-ns = <300>; }; - opp@666667000 { + opp-666667000 { opp-hz = /bits/ 64 <666667000>; clock-latency-ns = <300>; }; - opp@733334000 { + opp-733334000 { opp-hz = /bits/ 64 <733334000>; clock-latency-ns = <300>; }; - opp@1000000000 { + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; clock-latency-ns = <300>; }; - opp@1100000000 { + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; clock-latency-ns = <300>; }; @@ -353,6 +389,11 @@ bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-mmc-highspeed = <2>; + cdns,phy-input-delay-mmc-ddr = <3>; + cdns,phy-dll-delay-sdclk = <21>; + cdns,phy-dll-delay-sdclk-hsmmc = <21>; }; sd: sdhc@5a400000 { @@ -429,7 +470,7 @@ }; nand: nand@68000000 { - compatible = "socionext,denali-nand-v5b"; + compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index de98697..2c8558c 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -4,7 +4,43 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ X11 + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ / { @@ -41,67 +77,67 @@ compatible = "operating-points-v2"; opp-shared; - opp@100000000 { + opp-100000000 { opp-hz = /bits/ 64 <100000000>; clock-latency-ns = <300>; }; - opp@116667000 { + opp-116667000 { opp-hz = /bits/ 64 <116667000>; clock-latency-ns = <300>; }; - opp@150000000 { + opp-150000000 { opp-hz = /bits/ 64 <150000000>; clock-latency-ns = <300>; }; - opp@175000000 { + opp-175000000 { opp-hz = /bits/ 64 <175000000>; clock-latency-ns = <300>; }; - opp@200000000 { + opp-200000000 { opp-hz = /bits/ 64 <200000000>; clock-latency-ns = <300>; }; - opp@233334000 { + opp-233334000 { opp-hz = /bits/ 64 <233334000>; clock-latency-ns = <300>; }; - opp@300000000 { + opp-300000000 { opp-hz = /bits/ 64 <300000000>; clock-latency-ns = <300>; }; - opp@350000000 { + opp-350000000 { opp-hz = /bits/ 64 <350000000>; clock-latency-ns = <300>; }; - opp@400000000 { + opp-400000000 { opp-hz = /bits/ 64 <400000000>; clock-latency-ns = <300>; }; - opp@466667000 { + opp-466667000 { opp-hz = /bits/ 64 <466667000>; clock-latency-ns = <300>; }; - opp@600000000 { + opp-600000000 { opp-hz = /bits/ 64 <600000000>; clock-latency-ns = <300>; }; - opp@700000000 { + opp-700000000 { opp-hz = /bits/ 64 <700000000>; clock-latency-ns = <300>; }; - opp@800000000 { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; clock-latency-ns = <300>; }; - opp@933334000 { + opp-933334000 { opp-hz = /bits/ 64 <933334000>; clock-latency-ns = <300>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; clock-latency-ns = <300>; }; - opp@1400000000 { + opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; clock-latency-ns = <300>; }; @@ -620,7 +656,7 @@ }; nand: nand@68000000 { - compatible = "socionext,denali-nand-v5b"; + compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index b0f6f94..6cd3a93 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -4,7 +4,43 @@ * Copyright (C) 2015-2016 Socionext Inc. * Author: Masahiro Yamada * - * SPDX-License-Identifier: GPL-2.0+ X11 + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ / { @@ -61,35 +97,35 @@ compatible = "operating-points-v2"; opp-shared; - opp@100000000 { + opp-100000000 { opp-hz = /bits/ 64 <100000000>; clock-latency-ns = <300>; }; - opp@150000000 { + opp-150000000 { opp-hz = /bits/ 64 <150000000>; clock-latency-ns = <300>; }; - opp@200000000 { + opp-200000000 { opp-hz = /bits/ 64 <200000000>; clock-latency-ns = <300>; }; - opp@300000000 { + opp-300000000 { opp-hz = /bits/ 64 <300000000>; clock-latency-ns = <300>; }; - opp@400000000 { + opp-400000000 { opp-hz = /bits/ 64 <400000000>; clock-latency-ns = <300>; }; - opp@600000000 { + opp-600000000 { opp-hz = /bits/ 64 <600000000>; clock-latency-ns = <300>; }; - opp@800000000 { + opp-800000000 { opp-hz = /bits/ 64 <800000000>; clock-latency-ns = <300>; }; - opp@1200000000 { + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; clock-latency-ns = <300>; }; @@ -632,7 +668,7 @@ }; nand: nand@68000000 { - compatible = "socionext,denali-nand-v5b"; + compatible = "socionext,uniphier-denali-nand-v5b"; status = "disabled"; reg-names = "nand_data", "denali_reg"; reg = <0x68000000 0x20>, <0x68100000 0x1000>;