From patchwork Thu May 31 07:42:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 137332 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6277921lji; Thu, 31 May 2018 00:43:45 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJg3jCD2r69wQr8nckz0Mlbyzzcy7MfBwHxlatwzScvwmXxYMGcycCO7xcY2TNxQTgdccHz X-Received: by 2002:a17:902:6105:: with SMTP id t5-v6mr5935058plj.138.1527752625845; Thu, 31 May 2018 00:43:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527752625; cv=none; d=google.com; s=arc-20160816; b=qXOTmLBllDlBwbp7YCPFpfKUOSXe0SQdyGYn7QsxPj77RYqFgp9mVDENb6eQ1vEqvx tIgvSfwXZIw0BepooiOP5oK8ZgqqJ3g9pqWIBAgJD6FLGJLmVcNYkcvZlMJoYaVbD6Q+ Jbzhkq0WoSYRUWCsRKVjfMt9kLXky+Lvkk37YinliAfJY2HHlxQNogd4N5exCoPep+Uc KPFcU35xjqlavi5gPHg8bylOuIw7Cvbr8bKYM6XeWkx4IyZD1vSLmZsRgUAO0Mo3t+My iUkYi67dGReggtCZsocwRMxuNgQtq3Vq2a0YGZ07jEY4Se0Yz6eHo88yNT61tOdRgqg1 JKdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=DhIJxDvVYqgWRfF+5N7sVy+QXj/OINQFPHHAsLxNLQA=; b=NfQgleHhflGzp6u9N1GtFoxgc8m/nKsCPyqfJMPaa1O1vofH+u5HmL6TaOcwBITCi7 JY8NiiGIIxnlhyckMzwv8EbXG+grVbXysLeT0XfBu1ploTHS9Vj0LRlZSeI83evXFNei waXRA2EXimtIWrkG/TQPKwfVG0uKvWLikA+D5B+pKTbpbi/u1RH9mBNUkfVB0+VSf/VK J2ZyIe/Kl+OA6r+SiEjCkUO/3hLdQLPxQCHQJVS2TKetE1zvAeWW73uZ6srBxWpbq4pI sMTFgE8eej8/Gqq4uyLN8wUkLd+nc+iT20UHHQ+jCXHPcXkUzCdxQmUtifjBwV75TlAR +IjQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11-v6si11664355pgn.129.2018.05.31.00.43.45; Thu, 31 May 2018 00:43:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753934AbeEaHno (ORCPT + 13 others); Thu, 31 May 2018 03:43:44 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:48942 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754037AbeEaHnm (ORCPT ); Thu, 31 May 2018 03:43:42 -0400 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id F3D9C422843BF; Thu, 31 May 2018 15:43:37 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.382.0; Thu, 31 May 2018 15:43:31 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Matthias Brugger , Rob Clark , Joerg Roedel , linux-mediatek , linux-arm-msm , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , Hanjun Guo , Libin , Guozhu Li , "Xinwei Hu" Subject: [PATCH 1/7] iommu/dma: fix trival coding style mistake Date: Thu, 31 May 2018 15:42:43 +0800 Message-ID: <1527752569-18020-2-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> References: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The static function iova_reserve_iommu_regions is only called by function iommu_dma_init_domain, and the 'if (!dev)' check in iommu_dma_init_domain affect it only, so we can safely move the check into it. I think it looks more natural. In addition, the local variable 'ret' is only assigned in the branch of 'if (region->type == IOMMU_RESV_MSI)', so the 'if (ret)' should also only take effect in the branch, add a brace to enclose it. No functional changes. Signed-off-by: Zhen Lei --- drivers/iommu/dma-iommu.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index ddcbbdb..4e885f7 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -231,6 +231,9 @@ static int iova_reserve_iommu_regions(struct device *dev, LIST_HEAD(resv_regions); int ret = 0; + if (!dev) + return 0; + if (dev_is_pci(dev)) iova_reserve_pci_windows(to_pci_dev(dev), iovad); @@ -246,11 +249,12 @@ static int iova_reserve_iommu_regions(struct device *dev, hi = iova_pfn(iovad, region->start + region->length - 1); reserve_iova(iovad, lo, hi); - if (region->type == IOMMU_RESV_MSI) + if (region->type == IOMMU_RESV_MSI) { ret = cookie_init_hw_msi_region(cookie, region->start, region->start + region->length); - if (ret) - break; + if (ret) + break; + } } iommu_put_resv_regions(dev, &resv_regions); @@ -308,8 +312,6 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, } init_iova_domain(iovad, 1UL << order, base_pfn); - if (!dev) - return 0; return iova_reserve_iommu_regions(dev, domain); } From patchwork Thu May 31 07:42:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 137331 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6277902lji; Thu, 31 May 2018 00:43:43 -0700 (PDT) X-Google-Smtp-Source: ADUXVKICll/cz8YjtxInavmHqvpb0FO6eqmikLe16D3YpEX3Y2LAgy3jy5U92IioqZrrjqA45bTk X-Received: by 2002:a63:42c4:: with SMTP id p187-v6mr4735670pga.345.1527752623611; Thu, 31 May 2018 00:43:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527752623; cv=none; d=google.com; s=arc-20160816; b=Vm1JxrwQ74RbPC5BTmXDcofYoAB4DjpgXs3ffFv8xJ/IDp9JVTWeZD6ThL5g7KuR5B 0wObyeIDXFec8GiaOFeNImr4QqCLBh2AjaojmHgTcft4qvp9N/0GhNeLd78HJcmx6y+Q a5yrY03RS3CS0gSXxvTT56++Jn3/0ZWCYmfy6utkch9/oymoQ6limjRIWpzKbG+ckcaD YPZsEFrZtbBcWjTjrSl8PyLBnaATcHTD0E7xbcdbNSb5YsQB4J6lY6hHReCpbedbHDn3 1WP5EK+IXkR9fidNZqgYz/C7xzYCe8pRPqNWJ3eNc8JQs4DF7x3oggXnBfkY5ctucKSZ sU0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=r9IzxVWukjndYuflYvyJBvumueEB1gjXAdN83W5DIms=; b=eWadxWbMKOqjuAsOb493dW1dQCTaTnHN+UFlH43GoU4TzQPpF+g0PWRI89w5zZ7/3J PEdOc+3t6fu62ihNBUULzH5+80CqRA9FcfeDpwpr929IMvfuzwmhe3kyISMN2/50sNMD W49GUlxN69cMNsAhXRJJsfY8F+axshbyCnAQApO75oRRR6z/GRAuVg11TNf3HntepojR CptQIti4MrlxFC5L83gYgFSfQVedKYL/ZtKOZa2WJbeVONeSJuRo7rziylV+k/8aeSly nqjIX54LTiyGLfmPgoyjqGW88O4ri3TrIeWjOP9XdvoDplnxFBrFUMA4Cs6gP4JXWpts /zLQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j11-v6si11664355pgn.129.2018.05.31.00.43.43; Thu, 31 May 2018 00:43:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754039AbeEaHnm (ORCPT + 13 others); Thu, 31 May 2018 03:43:42 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:50135 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1753934AbeEaHnk (ORCPT ); Thu, 31 May 2018 03:43:40 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id E572AACA537E2; Thu, 31 May 2018 15:43:36 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.382.0; Thu, 31 May 2018 15:43:32 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Matthias Brugger , Rob Clark , Joerg Roedel , linux-mediatek , linux-arm-msm , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , Hanjun Guo , Libin , Guozhu Li , "Xinwei Hu" Subject: [PATCH 2/7] iommu/arm-smmu-v3: fix the implementation of flush_iotlb_all hook Date: Thu, 31 May 2018 15:42:44 +0800 Message-ID: <1527752569-18020-3-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> References: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org .flush_iotlb_all can not just wait for previous tlbi operations to be completed, but should also invalid all TLBs of the related domain. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 1d64710..4402187 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1770,6 +1770,14 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, return ops->unmap(ops, iova, size); } +static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain) +{ + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); + + if (smmu_domain->smmu) + arm_smmu_tlb_inv_context(smmu_domain); +} + static void arm_smmu_iotlb_sync(struct iommu_domain *domain) { struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; @@ -1998,7 +2006,7 @@ static void arm_smmu_put_resv_regions(struct device *dev, .map = arm_smmu_map, .unmap = arm_smmu_unmap, .map_sg = default_iommu_map_sg, - .flush_iotlb_all = arm_smmu_iotlb_sync, + .flush_iotlb_all = arm_smmu_flush_iotlb_all, .iotlb_sync = arm_smmu_iotlb_sync, .iova_to_phys = arm_smmu_iova_to_phys, .add_device = arm_smmu_add_device, From patchwork Thu May 31 07:42:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 137338 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6278914lji; Thu, 31 May 2018 00:45:06 -0700 (PDT) X-Google-Smtp-Source: ADUXVKImTHnD5+sB6WaWhBXNd4jxv+xdwJOeIs6GjyjYM01eyyHrZqupwzEVmDjL4m2oa6ow6mOR X-Received: by 2002:a17:902:b416:: with SMTP id x22-v6mr6021613plr.267.1527752706270; Thu, 31 May 2018 00:45:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527752706; cv=none; d=google.com; s=arc-20160816; b=qET0o9rpxSwFwBEOTIh7QWsrOGVmMzGOSOSHVGo+ARauqj7Q0dDpCPiUg+273TBL06 +nlHsUqSNpMbgCrdaXAGNbbC1Zv9kNYWNp9ksb1d5OHx/dsjujeTauMlkNnicUE1FTRJ i3ZVMmUX4T3HVlTdyiy/ZsIFzkrj3Sk0l3CuhoDKJ184s+T//phPWmfxkRzloHKxXHPa oliidYRFDGOIrn32QxUfdGLu8hdjdBMm/Ujx15KIID5eMFXLX+ntG1AFAMUDG6mjjIbf wgpJNVvQEpX3vNWqHLkzwpXULTxiLJ/3SA7jozdAuvNupPOFp4i/dHTn8l5l9FrlHceO AXfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=TsF4NR6WCiMh0uTNadi1UdzgdgIs8AqTz2Qw6YhUBsM=; b=as1pvj/nPe//gDrqYSr7g7ozOnmPw09emvQBqomCW8fQqsb4qsGHBZLvf7KSi9ITd7 /RZ+PN++kdHf48u2Xf1Tvt8xvk1a8aTA4dRt3ayFmRu/u3tgHW0OlMgcqiEisodGNsoh YOHXTe4OlrYDK7wBkoJRHr2Gvs59pVJO/K2y7xnPut1brDNYIuDipOczvrIWhsI3m/4n 1nDN+GUDWsgnNG1AmXjsSRYrR6k8p222neZKr0AVlpVUn46Y9KOIBcL4l0ZXeY9pikSD tyCMWWgEPIMzu/tmqIPK1am9rMEfwbkGLsTCN7X86eZeUt/I8n4S0dwHXRPK3Dv0gU6s S04Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m64-v6si36941378pfm.0.2018.05.31.00.45.06; Thu, 31 May 2018 00:45:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753997AbeEaHpD (ORCPT + 13 others); Thu, 31 May 2018 03:45:03 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:48984 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754068AbeEaHnr (ORCPT ); Thu, 31 May 2018 03:43:47 -0400 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 9A005D875DB6; Thu, 31 May 2018 15:43:41 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.382.0; Thu, 31 May 2018 15:43:33 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Matthias Brugger , Rob Clark , Joerg Roedel , linux-mediatek , linux-arm-msm , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , Hanjun Guo , Libin , Guozhu Li , "Xinwei Hu" Subject: [PATCH 3/7] iommu: prepare for the non-strict mode support Date: Thu, 31 May 2018 15:42:45 +0800 Message-ID: <1527752569-18020-4-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> References: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In common, a IOMMU unmap operation follow the below steps: 1. remove the mapping in page table of the specified iova range 2. execute tlbi command to invalid the mapping which is cached in TLB 3. wait for the above tlbi operation to be finished 4. free the IOVA resource 5. free the physical memory resource This maybe a problem when unmap is very frequently, the combination of tlbi and wait operation will consume a lot of time. A feasible method is put off tlbi and iova-free operation, when accumulating to a certain number or reaching a specified time, execute only one tlbi_all command to clean up TLB, then free the backup IOVAs. Mark as non-strict mode. But it must be noted that, although the mapping has already been removed in the page table, it maybe still exist in TLB. And the freed physical memory may also be reused for others. So a attacker can persistent access to memory based on the just freed IOVA, to obtain sensible data or corrupt memory. So the VFIO should always choose the strict mode. This patch just add a new parameter for the unmap operation, to help the upper functions capable choose which mode to be applied. No functional changes. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 2 +- drivers/iommu/arm-smmu.c | 2 +- drivers/iommu/io-pgtable-arm-v7s.c | 6 +++--- drivers/iommu/io-pgtable-arm.c | 6 +++--- drivers/iommu/io-pgtable.h | 2 +- drivers/iommu/ipmmu-vmsa.c | 2 +- drivers/iommu/msm_iommu.c | 2 +- drivers/iommu/mtk_iommu.c | 2 +- drivers/iommu/qcom_iommu.c | 2 +- include/linux/iommu.h | 2 ++ 10 files changed, 15 insertions(+), 13 deletions(-) -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4402187..59b3387 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1767,7 +1767,7 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, if (!ops) return 0; - return ops->unmap(ops, iova, size); + return ops->unmap(ops, iova, size, IOMMU_STRICT); } static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 69e7c60..253e807 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1249,7 +1249,7 @@ static size_t arm_smmu_unmap(struct iommu_domain *domain, unsigned long iova, if (!ops) return 0; - return ops->unmap(ops, iova, size); + return ops->unmap(ops, iova, size, IOMMU_STRICT); } static void arm_smmu_iotlb_sync(struct iommu_domain *domain) diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c index 10e4a3d..799eced 100644 --- a/drivers/iommu/io-pgtable-arm-v7s.c +++ b/drivers/iommu/io-pgtable-arm-v7s.c @@ -658,7 +658,7 @@ static size_t __arm_v7s_unmap(struct arm_v7s_io_pgtable *data, } static size_t arm_v7s_unmap(struct io_pgtable_ops *ops, unsigned long iova, - size_t size) + size_t size, int strict) { struct arm_v7s_io_pgtable *data = io_pgtable_ops_to_data(ops); @@ -883,7 +883,7 @@ static int __init arm_v7s_do_selftests(void) size = 1UL << __ffs(cfg.pgsize_bitmap); while (i < loopnr) { iova_start = i * SZ_16M; - if (ops->unmap(ops, iova_start + size, size) != size) + if (ops->unmap(ops, iova_start + size, size, IOMMU_STRICT) != size) return __FAIL(ops); /* Remap of partial unmap */ @@ -902,7 +902,7 @@ static int __init arm_v7s_do_selftests(void) while (i != BITS_PER_LONG) { size = 1UL << i; - if (ops->unmap(ops, iova, size) != size) + if (ops->unmap(ops, iova, size, IOMMU_STRICT) != size) return __FAIL(ops); if (ops->iova_to_phys(ops, iova + 42)) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 39c2a05..e0f52db 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -624,7 +624,7 @@ static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, } static size_t arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova, - size_t size) + size_t size, int strict) { struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops); arm_lpae_iopte *ptep = data->pgd; @@ -1108,7 +1108,7 @@ static int __init arm_lpae_run_tests(struct io_pgtable_cfg *cfg) /* Partial unmap */ size = 1UL << __ffs(cfg->pgsize_bitmap); - if (ops->unmap(ops, SZ_1G + size, size) != size) + if (ops->unmap(ops, SZ_1G + size, size, IOMMU_STRICT) != size) return __FAIL(ops, i); /* Remap of partial unmap */ @@ -1124,7 +1124,7 @@ static int __init arm_lpae_run_tests(struct io_pgtable_cfg *cfg) while (j != BITS_PER_LONG) { size = 1UL << j; - if (ops->unmap(ops, iova, size) != size) + if (ops->unmap(ops, iova, size, IOMMU_STRICT) != size) return __FAIL(ops, i); if (ops->iova_to_phys(ops, iova + 42)) diff --git a/drivers/iommu/io-pgtable.h b/drivers/iommu/io-pgtable.h index 2df7909..2908806 100644 --- a/drivers/iommu/io-pgtable.h +++ b/drivers/iommu/io-pgtable.h @@ -120,7 +120,7 @@ struct io_pgtable_ops { int (*map)(struct io_pgtable_ops *ops, unsigned long iova, phys_addr_t paddr, size_t size, int prot); size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova, - size_t size); + size_t size, int strict); phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, unsigned long iova); }; diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c index 40ae6e8..e6d9e11 100644 --- a/drivers/iommu/ipmmu-vmsa.c +++ b/drivers/iommu/ipmmu-vmsa.c @@ -716,7 +716,7 @@ static size_t ipmmu_unmap(struct iommu_domain *io_domain, unsigned long iova, { struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain); - return domain->iop->unmap(domain->iop, iova, size); + return domain->iop->unmap(domain->iop, iova, size, IOMMU_STRICT); } static void ipmmu_iotlb_sync(struct iommu_domain *io_domain) diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index 0d33504..180fa3d 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -532,7 +532,7 @@ static size_t msm_iommu_unmap(struct iommu_domain *domain, unsigned long iova, unsigned long flags; spin_lock_irqsave(&priv->pgtlock, flags); - len = priv->iop->unmap(priv->iop, iova, len); + len = priv->iop->unmap(priv->iop, iova, len, IOMMU_STRICT); spin_unlock_irqrestore(&priv->pgtlock, flags); return len; diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index f2832a1..54661ed 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -386,7 +386,7 @@ static size_t mtk_iommu_unmap(struct iommu_domain *domain, size_t unmapsz; spin_lock_irqsave(&dom->pgtlock, flags); - unmapsz = dom->iop->unmap(dom->iop, iova, size); + unmapsz = dom->iop->unmap(dom->iop, iova, size, IOMMU_STRICT); spin_unlock_irqrestore(&dom->pgtlock, flags); return unmapsz; diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c index 65b9c99..90abde1 100644 --- a/drivers/iommu/qcom_iommu.c +++ b/drivers/iommu/qcom_iommu.c @@ -444,7 +444,7 @@ static size_t qcom_iommu_unmap(struct iommu_domain *domain, unsigned long iova, */ pm_runtime_get_sync(qcom_domain->iommu->dev); spin_lock_irqsave(&qcom_domain->pgtbl_lock, flags); - ret = ops->unmap(ops, iova, size); + ret = ops->unmap(ops, iova, size, IOMMU_STRICT); spin_unlock_irqrestore(&qcom_domain->pgtbl_lock, flags); pm_runtime_put_sync(qcom_domain->iommu->dev); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 19938ee..39b3150 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -86,6 +86,8 @@ struct iommu_domain_geometry { #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API) +#define IOMMU_STRICT 1 + struct iommu_domain { unsigned type; const struct iommu_ops *ops; From patchwork Thu May 31 07:42:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 137333 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6278009lji; Thu, 31 May 2018 00:43:52 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLhwVMG5p+Te4a30uXcTWToe6YdkA3JaK/NvsoIOizZRm97crnANSynxgoVZwliyXgeYxjo X-Received: by 2002:a17:902:164:: with SMTP id 91-v6mr6000348plb.134.1527752632060; Thu, 31 May 2018 00:43:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527752632; cv=none; d=google.com; s=arc-20160816; b=rmP/JoV4L8S41Ekt/xGKoVWxxddXEhWAeRx+gm8bwRtycoAMn0zwZQpVQEcmpjQi3J tEKZ6+5XRzpOdCprHckg4+UtJjRrb1sVIfWsaIVIafk1Qt9U0+UiPuVFUMWKAvOtcwFi fayYbFSzePTjUdN5Rfq+J/ukHzps9dSeGM5Ba+ykJUZzEGQ0iA3Nra+ChrDz9H0Ulv2P J4Y35YBhEvsT40/9Yw5l0ltkCoZHeTSQbZX2cwsENZGeXKE5nJVf9gExwV9kWXPDp+Q+ JhD5MHN/UmEnwmz0jn4Mlsu1OtBUg+zOrRGALy8cMYo7SzCUHCr3RrvD1bL/krU51VQa 2nqA== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id bf1-v6si20566115plb.484.2018.05.31.00.43.51; Thu, 31 May 2018 00:43:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754037AbeEaHnt (ORCPT + 13 others); Thu, 31 May 2018 03:43:49 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:49010 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754076AbeEaHnq (ORCPT ); Thu, 31 May 2018 03:43:46 -0400 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id D0D58D03BD0C; Thu, 31 May 2018 15:43:42 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.382.0; Thu, 31 May 2018 15:43:34 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Matthias Brugger , Rob Clark , Joerg Roedel , linux-mediatek , linux-arm-msm , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , Hanjun Guo , Libin , Guozhu Li , "Xinwei Hu" Subject: [PATCH 4/7] iommu/amd: make sure TLB to be flushed before IOVA freed Date: Thu, 31 May 2018 15:42:46 +0800 Message-ID: <1527752569-18020-5-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> References: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Although the mapping has already been removed in the page table, it maybe still exist in TLB. Suppose the freed IOVAs is reused by others before the flush operation completed, the new user can not correctly access to its meomory. Signed-off-by: Zhen Lei --- drivers/iommu/amd_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 8fb8c73..93aa389 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -2402,9 +2402,9 @@ static void __unmap_single(struct dma_ops_domain *dma_dom, } if (amd_iommu_unmap_flush) { - dma_ops_free_iova(dma_dom, dma_addr, pages); domain_flush_tlb(&dma_dom->domain); domain_flush_complete(&dma_dom->domain); + dma_ops_free_iova(dma_dom, dma_addr, pages); } else { pages = __roundup_pow_of_two(pages); queue_iova(&dma_dom->iovad, dma_addr >> PAGE_SHIFT, pages, 0); From patchwork Thu May 31 07:42:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 137337 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6278693lji; Thu, 31 May 2018 00:44:46 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKjad2mfnDlVGAM0S5Vw0ofCWZbGqBAYvwc7vl1Rjje9zxGDCUX9nRpyGhG+GzSn5wo7isP X-Received: by 2002:a17:902:b58e:: with SMTP id a14-v6mr5988437pls.261.1527752686165; Thu, 31 May 2018 00:44:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527752686; cv=none; d=google.com; s=arc-20160816; b=dAlrl5srGbplwVQrUw/c2jbIY6VZrAsuHPwF6tDZOp0+5r6bij2jnZxDGhKVT05KM1 3WnFhDbhpoPAYqshqJEjDT+qUF5Dy0igpgarxARUJyarPVmoRpn/RK0lD50T0IZIAWOG qykHUFDOWQLqhnqEXyxvS7BTjM1oQ9jtYoiU7GctJY7KEtVMXMmtYFKD5HpZDWVDeQcB dae6puF/ZGavPyiMByDoEOUOk7uDo6f/u7p/A/dE2wfDHTZhD/U+bZ7Vai4QAZUbsd+n xSu0u84vf8Npdd0+yfpZouqKqXT1GE32LUFiMo9dReTtgTxRM1+Fh+ausdX5hp1DCWx+ fL0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=iSJ5wPf2KUJIB8VG1yfRsRDXPLkt3f8fDqShO52ArIs=; b=EgEY8CVNAqTKMZf5y/FxkPdSVMyIjAgBnfSfRk+yYgkwTM2Iw0+M/2uQuVaS6pC5xL CB1lM+0kdBpOd17N/+OOQH+oXeMM7oSX/ruYGlMn4dy+PjQjS8+LaIfZ3+Wyyk2gx3qD GdeFcbPQQp8Ola9SOrS9D/0IXUxoP/svOsdecHy+oRi5c1zqHCsZY7zy6VcJN+5D1jPt KAqrM96Gq0vMs4jwRaYU5F/F8BPW03x1+HMq58/MsAP1LhCNDZi5tX8Q/rDTS9hcPskC YR1kOQH5aPx3J4pwT6LXuV55xSyP0k9mYYHGFIcQNA50PkLA3cYH63KtaTwK0DIrPPEd 4CeQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 8-v6si37259303plc.444.2018.05.31.00.44.45; Thu, 31 May 2018 00:44:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753740AbeEaHoo (ORCPT + 13 others); Thu, 31 May 2018 03:44:44 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:48997 "EHLO huawei.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754035AbeEaHns (ORCPT ); Thu, 31 May 2018 03:43:48 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id ABA3D78B9027E; Thu, 31 May 2018 15:43:42 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.382.0; Thu, 31 May 2018 15:43:35 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Matthias Brugger , Rob Clark , Joerg Roedel , linux-mediatek , linux-arm-msm , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , Hanjun Guo , Libin , Guozhu Li , "Xinwei Hu" Subject: [PATCH 5/7] iommu/dma: add support for non-strict mode Date: Thu, 31 May 2018 15:42:47 +0800 Message-ID: <1527752569-18020-6-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> References: <1527752569-18020-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org 1. Save the related domain pointer in struct iommu_dma_cookie, make iovad capable call domain->ops->flush_iotlb_all to flush TLB. 2. Define a new iommu capable: IOMMU_CAP_NON_STRICT, which used to indicate that the iommu domain support non-strict mode. 3. During the iommu domain initialization phase, call capable() to check whether it support non-strcit mode. If so, call init_iova_flush_queue to register iovad->flush_cb callback. 4. All unmap(contains iova-free) APIs will finally invoke __iommu_dma_unmap -->iommu_dma_free_iova. Use iovad->flush_cb to check whether its related iommu support non-strict mode or not, and call IOMMU_DOMAIN_IS_STRICT to make sure the IOMMU_DOMAIN_UNMANAGED domain always follow strict mode. Signed-off-by: Zhen Lei --- drivers/iommu/dma-iommu.c | 29 ++++++++++++++++++++++++++--- include/linux/iommu.h | 3 +++ 2 files changed, 29 insertions(+), 3 deletions(-) -- 1.8.3 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 4e885f7..2e116d9 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -55,6 +55,7 @@ struct iommu_dma_cookie { }; struct list_head msi_page_list; spinlock_t msi_lock; + struct iommu_domain *domain; }; static inline size_t cookie_msi_granule(struct iommu_dma_cookie *cookie) @@ -64,7 +65,8 @@ static inline size_t cookie_msi_granule(struct iommu_dma_cookie *cookie) return PAGE_SIZE; } -static struct iommu_dma_cookie *cookie_alloc(enum iommu_dma_cookie_type type) +static struct iommu_dma_cookie *cookie_alloc(struct iommu_domain *domain, + enum iommu_dma_cookie_type type) { struct iommu_dma_cookie *cookie; @@ -73,6 +75,7 @@ static struct iommu_dma_cookie *cookie_alloc(enum iommu_dma_cookie_type type) spin_lock_init(&cookie->msi_lock); INIT_LIST_HEAD(&cookie->msi_page_list); cookie->type = type; + cookie->domain = domain; } return cookie; } @@ -94,7 +97,7 @@ int iommu_get_dma_cookie(struct iommu_domain *domain) if (domain->iova_cookie) return -EEXIST; - domain->iova_cookie = cookie_alloc(IOMMU_DMA_IOVA_COOKIE); + domain->iova_cookie = cookie_alloc(domain, IOMMU_DMA_IOVA_COOKIE); if (!domain->iova_cookie) return -ENOMEM; @@ -124,7 +127,7 @@ int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base) if (domain->iova_cookie) return -EEXIST; - cookie = cookie_alloc(IOMMU_DMA_MSI_COOKIE); + cookie = cookie_alloc(domain, IOMMU_DMA_MSI_COOKIE); if (!cookie) return -ENOMEM; @@ -261,6 +264,17 @@ static int iova_reserve_iommu_regions(struct device *dev, return ret; } +static void iova_flush_iotlb_all(struct iova_domain *iovad) +{ + struct iommu_dma_cookie *cookie; + struct iommu_domain *domain; + + cookie = container_of(iovad, struct iommu_dma_cookie, iovad); + domain = cookie->domain; + + domain->ops->flush_iotlb_all(domain); +} + /** * iommu_dma_init_domain - Initialise a DMA mapping domain * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() @@ -276,6 +290,7 @@ static int iova_reserve_iommu_regions(struct device *dev, int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, u64 size, struct device *dev) { + const struct iommu_ops *ops = domain->ops; struct iommu_dma_cookie *cookie = domain->iova_cookie; struct iova_domain *iovad = &cookie->iovad; unsigned long order, base_pfn, end_pfn; @@ -313,6 +328,11 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, init_iova_domain(iovad, 1UL << order, base_pfn); + if (ops->capable && ops->capable(IOMMU_CAP_NON_STRICT)) { + BUG_ON(!ops->flush_iotlb_all); + init_iova_flush_queue(iovad, iova_flush_iotlb_all, NULL); + } + return iova_reserve_iommu_regions(dev, domain); } EXPORT_SYMBOL(iommu_dma_init_domain); @@ -392,6 +412,9 @@ static void iommu_dma_free_iova(struct iommu_dma_cookie *cookie, /* The MSI case is only ever cleaning up its most recent allocation */ if (cookie->type == IOMMU_DMA_MSI_COOKIE) cookie->msi_iova -= size; + else if (!IOMMU_DOMAIN_IS_STRICT(cookie->domain) && iovad->flush_cb) + queue_iova(iovad, iova_pfn(iovad, iova), + size >> iova_shift(iovad), 0); else free_iova_fast(iovad, iova_pfn(iovad, iova), size >> iova_shift(iovad)); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 39b3150..01ff569 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -87,6 +87,8 @@ struct iommu_domain_geometry { __IOMMU_DOMAIN_DMA_API) #define IOMMU_STRICT 1 +#define IOMMU_DOMAIN_IS_STRICT(domain) \ + (domain->type == IOMMU_DOMAIN_UNMANAGED) struct iommu_domain { unsigned type; @@ -103,6 +105,7 @@ enum iommu_cap { transactions */ IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ + IOMMU_CAP_NON_STRICT, /* IOMMU supports non-strict mode */ }; /*