From patchwork Thu May 31 12:41:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 137371 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6549243lji; Thu, 31 May 2018 05:41:39 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLPwQvp+7bimt3hStFgXF6zCRE9r3YKlelSl0HsOR3Nv/5oWLi+OEMTlEMqUJhH4YusLMz2 X-Received: by 2002:a63:18c:: with SMTP id 134-v6mr5400014pgb.138.1527770498953; Thu, 31 May 2018 05:41:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527770498; cv=none; d=google.com; s=arc-20160816; b=gx6Ky+rm1OTwSbuq7CV5ut2uS0UNFxMeUDwpp9U73V+uVRf+/W6OEWgy1SLXOozgF1 1zXnMVgmVqXraf5fZiUVTIA3VnKxxTf5NJeOdUsI+rWpG8pyblh4r31ceTScgBI3wtij 7Ui6zCAuqROok4SGKdDyOimfIcM8vheg29rqehaoQcwFtnGYIzxIUA9SKoD2t7YXy+LK Y9g+dglXWIug1qUJHjqIrP5dzv6UW9O0Cnc3kTWwEF5Ttve7dfKxjiR1b20p7yuR6cFO q171EaEEZPGSMVo7Y2sbeRb/w9gCW2yQ0K/tZShFejRL5jVztZw1kUkYhMavrTgGRAbn wreQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=9hnn7TWGMiUijpEZTzwQO3XeSLc07YLlEOsN2g4YuuQ=; b=ByE0jGJt3t51/2N/VDQec2KWTMX5O1e1veus9TfT5ZWURA5V3FZ7zCY7rNCyqsTgN+ j5CSFfPkwOEQU1+3pgUQNSCP9QeKt+15quAuTuFBjyn5PVsEAIi75ql/3qjmiqCcIKKQ zWBY1FuW+KJhd2flIR+sJT2/UqfgtYx9XVQgFyRU1hdmdDbpLlbHH0xzPPrQlA9sROWN uxnKTOe/gNg3qNFIo5Ngqk7guvuhCz10ml4UDzycTzdYAYfJTnq+ST4ApAD7yNLkxRfr jlRobhCw4e4Lc0A4EEO4u77H7lQWVltSQji7b2ZJssjg8MF2wY+50LyX6VElJVhJ/l50 0jJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=L0ij4cZ0; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 7-v6si38961584pff.154.2018.05.31.05.41.38; Thu, 31 May 2018 05:41:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=L0ij4cZ0; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755044AbeEaMlh (ORCPT + 5 others); Thu, 31 May 2018 08:41:37 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:60740 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755036AbeEaMlg (ORCPT ); Thu, 31 May 2018 08:41:36 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4VCfWb5017445; Thu, 31 May 2018 07:41:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527770492; bh=7/y4Zubj7DP1LN+E2w3/bV2ETRkcfEJtw5nQy9ZBrtw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=L0ij4cZ08aN/mFVBb4Jwt6bb94fJkoOgy2Q1Cz7Hi3gDCKvdvFoyOR8vh02mkrHNl z4+w/qnMRJb1USsbepzx0TD+5cfPfvIOIwyFNqji2WWkwEB4X0oPKweKRDW4WxbJKB CyUvpnVu9XFOBA/moxk7tpSDud6BI3uQkEPWd69M= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4VCfWJV006557; Thu, 31 May 2018 07:41:32 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 31 May 2018 07:41:32 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 31 May 2018 07:41:32 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4VCfQS3002799; Thu, 31 May 2018 07:41:30 -0500 From: Tomi Valkeinen To: , , Laurent Pinchart , Peter Ujfalusi , Jyri Sarha , Benoit Parrot CC: Tomi Valkeinen , Subject: [RFC PATCH 2/6] dt-bindings: display/ti: add k2g-dss bindings Date: Thu, 31 May 2018 15:41:05 +0300 Message-ID: <20180531124109.3209-3-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180531124109.3209-1-tomi.valkeinen@ti.com> References: <20180531124109.3209-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT bindings for Texas Instruments K2G SoC Display Subsystem. The DSS is quite simple, with a single plane and a single output. Signed-off-by: Tomi Valkeinen Cc: devicetree@vger.kernel.org --- .../devicetree/bindings/display/ti/ti,k2g-dss.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt new file mode 100644 index 000000000000..1af11425eda3 --- /dev/null +++ b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt @@ -0,0 +1,15 @@ +Texas Instruments K2G Display Subsystem +======================================= + +Required properties: +- compatible: "ti,k2g-dss" +- reg: address and length of the register spaces for DSS submodules +- reg-names: "cfg", "common", "vid1", "ovr1", "vp1" +- clocks: phandle to fclk and vp1 clocks +- clock-names: "fck", "vp1" +- interrupts: phandle to the DISPC interrupt + +The DSS outputs are described using the device graphs as documented in +Documentation/devicetree/bindings/graph.txt. K2G DSS has a single DPI output as +port 0. + From patchwork Thu May 31 12:41:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 137375 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6549447lji; Thu, 31 May 2018 05:41:47 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJuuzqhqXItbbaxMLXIxjs2qYQpp9+3umjd+11XQoDys6tQrtE4xPm+ZkHXyysgVS92IpEu X-Received: by 2002:a17:902:4545:: with SMTP id m63-v6mr6999015pld.268.1527770507009; Thu, 31 May 2018 05:41:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527770507; cv=none; d=google.com; s=arc-20160816; b=b/Mu/Aptl7pslTrOy5UQk3sCCeeZYagzAy1/uhQxhDZuQ8iZsmz0TD4hp94KdtFPU2 V3BqbzhbBzv/tfWuWgiqAwf0f36RyqDZaWwNw23/ZNdnNVaZKtjHEYj9OtlbmKDXdFjX szwnS9gNvNJz0+5QHGyRn/CbUMU3oFoxpcWBYkTcAQvqvKG88Tp23j0v2VV8l+Sf/7Cn GX5b+r1U8sp6aGS9V1uoQ1NwYM2FAQT0WMV73ql3CIpzhtl/e5ds5/8APt76hqyyMNvz K1WjxeKeRuvvl0e+QaQyvy9krxaXgeQW+s5oSIHSQkC/egxZjFUur/pNYR8VsT4kZn+w HzPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=ezC9XEl6Jgmox7pv+GZzrsR8+rsvzfeKozhzg3NIp2o=; b=F+deN9NhvXiWwBLlB5zm8tHPmYvqFbuZVJ8rNeRc3Wv4njCyE0IQq69xH2p3qn4uNv 87AoKVH6Qnb+FO8T8SPW0a7IMTuVqCjFtQbp8lMXVMPclm9X1VuLaZGqOO7KPbe3yTcG OVvcVU+oDB21SqBUP7auYhHErR0KUku8Yk3OyFQxFq+y0OrVQB6+6R/sM8Y/LegmN63N 1S6umKS5YHasbHKDl1rS39Byo0OVD+fTYA/vfBqxs4KIlhQ2jvK6oHXbIwNDHUUth1l9 osro/cx8U42C9jBwbESZdF9SxRbVn/89Ajx+jwEDNtqqA8ZZhYI41HqKiwZ3kivqFB7j owsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=FUJZuH+C; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 7-v6si38961584pff.154.2018.05.31.05.41.46; Thu, 31 May 2018 05:41:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=FUJZuH+C; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755065AbeEaMlq (ORCPT + 5 others); Thu, 31 May 2018 08:41:46 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:10867 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755063AbeEaMlp (ORCPT ); Thu, 31 May 2018 08:41:45 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4VCffad015479; Thu, 31 May 2018 07:41:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527770501; bh=EtPuvhH5goIJPlixFC8vVzvsIuwQnYNpubXk394FKQE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FUJZuH+Cs+gFWPapIyCAaOqkZjWSff+ejiGrJ3bERAxfdLmmWyhGcMLypgxy/22nE l4RyRzavDLGBeYh8nV1G9cRRyys6Z2IlEi0fMc3qTBDFNqfq4xWhEHSTP34pngI/w7 e3YArK0OjcRuh0V4/nDk1ZhWTM8gbfhs54pPjrLE= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4VCffE9012449; Thu, 31 May 2018 07:41:41 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 31 May 2018 07:41:41 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 31 May 2018 07:41:41 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4VCfQS7002799; Thu, 31 May 2018 07:41:39 -0500 From: Tomi Valkeinen To: , , Laurent Pinchart , Peter Ujfalusi , Jyri Sarha , Benoit Parrot CC: Tomi Valkeinen , Subject: [RFC PATCH 6/6] ARM: dts: keystone-k2g-evm: add LCD and HDMI displays Date: Thu, 31 May 2018 15:41:09 +0300 Message-ID: <20180531124109.3209-7-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180531124109.3209-1-tomi.valkeinen@ti.com> References: <20180531124109.3209-1-tomi.valkeinen@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org K2G EVM has an SiI902x HDMI encoder on the board, and a separately purchasable LCD which can be attached to the board. Only one of these displays can be used at a time, and two dip-switches need to be changed when switching to another display. The HDMI support is added to the base k2g-evm.dts file, and the LCD support is added as a separate k2g-evm-lcd.dts file. The user must choose one of the dtbs, depending on which display he wants to use. Signed-off-by: Tomi Valkeinen Cc: devicetree@vger.kernel.org --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/keystone-k2g-evm-lcd.dts | 80 +++++++++++++++++++ arch/arm/boot/dts/keystone-k2g-evm.dts | 91 ++++++++++++++++++++++ 3 files changed, 172 insertions(+) create mode 100644 arch/arm/boot/dts/keystone-k2g-evm-lcd.dts -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7e2424957809..11bb3ba22bdf 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -222,6 +222,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \ keystone-k2l-evm.dtb \ keystone-k2e-evm.dtb \ keystone-k2g-evm.dtb \ + keystone-k2g-evm-lcd.dtb \ keystone-k2g-ice.dtb dtb-$(CONFIG_MACH_KIRKWOOD) += \ kirkwood-b3.dtb \ diff --git a/arch/arm/boot/dts/keystone-k2g-evm-lcd.dts b/arch/arm/boot/dts/keystone-k2g-evm-lcd.dts new file mode 100644 index 000000000000..be0498010e71 --- /dev/null +++ b/arch/arm/boot/dts/keystone-k2g-evm-lcd.dts @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for K2G EVM with LCD Display + * + * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + */ + +#include "keystone-k2g-evm.dts" +#include + +/ { + lcd0: display { + compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; + label = "lcd"; + + backlight = <&lcd_bl>; + + panel-timing { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <2>; + hback-porch = <2>; + hsync-len = <41>; + vfront-porch = <2>; + vback-porch = <2>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + + port { + lcd_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + }; + + lcd_bl: backlight { + compatible = "pwm-backlight"; + pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 32 64 96 128 160 192 224 255>; + default-brightness-level = <8>; + }; +}; + +&i2c1 { + edt-ft5306@38 { + status = "okay"; + compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; + reg = <0x38>; + + pinctrl-names = "default"; + pinctrl-0 = <&edt_ft5306_ts_pins>; + + interrupt-parent = <&gpio1>; + interrupts = <42 IRQ_TYPE_EDGE_FALLING>; + + touchscreen-size-x = <480>; + touchscreen-size-y = <272>; + }; +}; + +&k2g_pinctrl { + edt_ft5306_ts_pins: edt_ft5306_ts_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1364) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE3) /* pr1_pru1_gpo16.gpio1_42 */ + >; + }; +}; + +&dpi_out { + remote-endpoint = <&lcd_in>; +}; + +&sii9022 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts index 6a4657799b99..e94be4a1bbd3 100644 --- a/arch/arm/boot/dts/keystone-k2g-evm.dts +++ b/arch/arm/boot/dts/keystone-k2g-evm.dts @@ -81,6 +81,13 @@ >; }; + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; + ecap0_pins: ecap0_pins { pinctrl-single,pins = < K2G_CORE_IOPAD(0x1374) (BUFFER_CLASS_B | MUX_MODE4) /* pr1_mdio_data.ecap0_in_apwm0_out */ @@ -114,6 +121,46 @@ K2G_CORE_IOPAD(0x11f0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart2_txd.uart2_txd */ >; }; + + vout_pins: pinmux_vout_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata23.dssdata23 */ + K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata22.dssdata22 */ + K2G_CORE_IOPAD(0x1080) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata21.dssdata21 */ + K2G_CORE_IOPAD(0x1084) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata20.dssdata20 */ + K2G_CORE_IOPAD(0x1088) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata19.dssdata19 */ + K2G_CORE_IOPAD(0x108c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata18.dssdata18 */ + K2G_CORE_IOPAD(0x1090) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata17.dssdata17 */ + K2G_CORE_IOPAD(0x1094) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata16.dssdata16 */ + K2G_CORE_IOPAD(0x1098) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata15.dssdata15 */ + K2G_CORE_IOPAD(0x109c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata14.dssdata14 */ + K2G_CORE_IOPAD(0x10a0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata13.dssdata13 */ + K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata12.dssdata12 */ + K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata11.dssdata11 */ + K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata10.dssdata10 */ + K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata9.dssdata9 */ + K2G_CORE_IOPAD(0x10b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata8.dssdata8 */ + K2G_CORE_IOPAD(0x10b8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata7.dssdata7 */ + K2G_CORE_IOPAD(0x10bc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata6.dssdata6 */ + K2G_CORE_IOPAD(0x10c0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata5.dssdata5 */ + K2G_CORE_IOPAD(0x10c4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata4.dssdata4 */ + K2G_CORE_IOPAD(0x10c8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata3.dssdata3 */ + K2G_CORE_IOPAD(0x10cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata2.dssdata2 */ + K2G_CORE_IOPAD(0x10d0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata1.dssdata1 */ + K2G_CORE_IOPAD(0x10d4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata0.dssdata0 */ + K2G_CORE_IOPAD(0x10d8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssvsync.dssvsync */ + K2G_CORE_IOPAD(0x10dc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsshsync.dsshsync */ + K2G_CORE_IOPAD(0x10e0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsspclk.dsspclk */ + K2G_CORE_IOPAD(0x10e4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssde.dssde */ + K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */ + >; + }; + + sii9022_pins: sii9022_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1338) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE3) /* pr1_pru1_gpo5.gpio1_31 */ + >; + }; }; &uart0 { @@ -268,3 +315,47 @@ pinctrl-0 = <&uart2_pins>; status = "okay"; }; + +&dss { + pinctrl-names = "default"; + pinctrl-0 = <&vout_pins>; + status = "ok"; + + port { + dpi_out: endpoint { + remote-endpoint = <&sii9022_in>; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + clock-frequency = <400000>; + + sii9022: sii9022@3b { + compatible = "sil,sii9022"; + reg = <0x3b>; + + pinctrl-names = "default"; + pinctrl-0 = <&sii9022_pins>; + + /* Should be IRQ_TYPE_LEVEL_LOW, but k2g does not support it */ + interrupt-parent = <&gpio1>; + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + sii9022_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + }; + }; +};