From patchwork Fri Apr 9 20:40:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 418193 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1882256jai; Fri, 9 Apr 2021 13:40:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwEqGKEE8+2jbGhyVp8irl34HfrKwwA1jKlTRK0LP1EZjkmMzsyGmehuwK3AeGuO3PefWyD X-Received: by 2002:aa7:cccd:: with SMTP id y13mr19115808edt.163.1618000837218; Fri, 09 Apr 2021 13:40:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618000837; cv=none; d=google.com; s=arc-20160816; b=rjBJqoqeQlx9H9FSfasMVb+jqxPHRx+ZNOBEuwRIpIERvvbL3/43lkbxI42Qzuqz/A 5Fj0xxbg5mTFtBL8t4RGZ+52/obfrPTXyHRL9lcpcYMwgwxmQR3x9kySeeg7N9lfilgJ gQ0pGhXmhVXEmW4u0gMIr3uAiuPjjZSDSIvkPkBBLBfQe1wc8dUVsZVg3s0Fgw05aXeS +CftsZkkxTwS6jX5kJb7KUrT8T7LWIHsXewhnglS7LoczHa2vDuhlt06yHhg6OM8QDwP USpVZyaDHJR/spS2QT/QJJKGWwaRsQ5XI448pYrTHAtPA2+2/D6fS5ASa7/Be1dJs4Xj TsNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eqErB1BGtSYLSRcvCx/61ODE5QLSgu/K7kbGZ07zxxc=; b=OGX2zug/TunF6tQNTZR1Btq9O6QyEHdfbyFHqbPtA6bWLkWDe2g0jAaYGSMksuqURY KfYQZyuIBJBZsrmmUKghxUF+F6+3KMeSTSEsVnItghmyQWJc0+6A4bkVwfhyNuh+NQHT xbUKxuLzOf2AnV+KaA+juM3Tzl970ETtTx+ffKkM+lGX4RWFUUS3EmQZSMpHl/cAAGcF 13WUpBwicNgztwep3afARoUjfP2ME8wbDENs8apUZTVHoF9d48vGaKVlx6qBXHDS8R7I Ineqqe5VJxISxt/kVKgmcThT//wju0piO1sQPZA3MFsCZMqWa1blfuPAK2GYQjW4Junf TCyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CRP2+XeE; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z3si2913247edq.418.2021.04.09.13.40.37; Fri, 09 Apr 2021 13:40:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CRP2+XeE; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234407AbhDIUkn (ORCPT + 16 others); Fri, 9 Apr 2021 16:40:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53734 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234377AbhDIUkm (ORCPT ); Fri, 9 Apr 2021 16:40:42 -0400 Received: from mail-il1-x12d.google.com (mail-il1-x12d.google.com [IPv6:2607:f8b0:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4634BC061762 for ; Fri, 9 Apr 2021 13:40:29 -0700 (PDT) Received: by mail-il1-x12d.google.com with SMTP id n4so5754713ili.8 for ; Fri, 09 Apr 2021 13:40:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eqErB1BGtSYLSRcvCx/61ODE5QLSgu/K7kbGZ07zxxc=; b=CRP2+XeE0cWPtKGLK3vM3qpEMrFVKcT+k05Mf0QBcCsNPy7LTFx7Mg82oqg6PRNP6+ x6X+IDRmR8IL/2tQ9LQNkKT5HUYb76npzAr41tmCCN+3llZc6+lG9SiIVqh5Xsgi1aaC oygNusjXjaa5DSMOu1coNLxXicgNcz2Oe2jeqS34X2SwTKso+RWG8ONQ6b2GoArBz8w5 d7GjvBOiFfTu2aKLtSF5SEXXbGIAdrhuxRNQzrNFC3u5RBn3UiHnHUo3hrDOw4tux92l jBT08vMEGB2UMoPiqafFt8kgzdOeUrVJu5++RtQ6Km9eJEOWa8xP7WBhqqwlDHoZl7NM A/qA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eqErB1BGtSYLSRcvCx/61ODE5QLSgu/K7kbGZ07zxxc=; b=p6gG6acNwcT5AAe5sBrKsEoKbgMYwsw3ys8jYndr5wD8ipZlEby52OfYdI9bPAI3cM 6VRAnUmnAayMnDYqGaMChmuRBXa/l82DP+scBB5WTdNjzPR7RScbZ2gdnaURMY4qB1jd 4BelV7TrELGvidVr8iDh398xLlqeiBbaw2dA4zgJRNESSc7TzGkcr/laR6MY6d4y+Ml6 98SZpNk+/I4wSoyNiJlpj0Yhg2GuFNA3WtydN2L2tr/W4Aw0qq1pqMx0saL51UICu3z9 Z0ZSqD6S0LQVnIj0qaEmALcEWtsjLKOAxr393nvjfDc/J7TmqWJyarF45tHw3kbT7vtJ ZBWg== X-Gm-Message-State: AOAM5309dmgX4eZP7Q58LcWwDuaAQxQfcud7eA4B/yDyxchJR0zyDNuo ASKqd9pT/JhxA8AxD6L5D1Hy5g== X-Received: by 2002:a92:c26e:: with SMTP id h14mr12449414ild.33.1618000828764; Fri, 09 Apr 2021 13:40:28 -0700 (PDT) Received: from presto.localdomain (c-73-185-129-58.hsd1.mn.comcast.net. [73.185.129.58]) by smtp.gmail.com with ESMTPSA id b9sm1667212ilc.28.2021.04.09.13.40.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 13:40:28 -0700 (PDT) From: Alex Elder To: robh+dt@kernel.org, davem@davemloft.net, kuba@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/4] dt-bindings: net: qcom, ipa: add some compatible strings Date: Fri, 9 Apr 2021 15:40:21 -0500 Message-Id: <20210409204024.1255938-2-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210409204024.1255938-1-elder@linaro.org> References: <20210409204024.1255938-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add existing supported platform "qcom,sc7180-ipa" to the set of IPA compatible strings. Also add newly-supported "qcom,sdx55-ipa", "qcom,sc7280-ipa". Signed-off-by: Alex Elder --- Documentation/devicetree/bindings/net/qcom,ipa.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 2.27.0 diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml index 8f86084bf12e9..2645a02cf19bf 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -43,7 +43,11 @@ description: properties: compatible: - const: "qcom,sdm845-ipa" + oneOf: + - const: "qcom,sc7180-ipa" + - const: "qcom,sc7280-ipa" + - const: "qcom,sdm845-ipa" + - const: "qcom,sdx55-ipa" reg: items: From patchwork Fri Apr 9 20:40:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 418194 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1882356jai; Fri, 9 Apr 2021 13:40:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxVTyqr2CJqgRTn9m1IciURJU1BBN8vWrer1vScIYZbTUt97JbFEVqQp/GJegaNVCaEqwfN X-Received: by 2002:a17:907:2cf1:: with SMTP id hz17mr11514892ejc.319.1618000845641; Fri, 09 Apr 2021 13:40:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618000845; cv=none; d=google.com; s=arc-20160816; b=o9hkOm/wNIQtuUOr3C/yWZ3rnBYs5OdOoHoN5Mdww84DzNkVNsC2nQbVgvF9bnY7pn i+2smechSsuJFOzNi+Sb4cf/dKcJxoDRLKAfU4IaPAg5am8uXABpJ+X1uH+50oyvDxy/ BJ9Y609al6WdP/1MjcLmgJUGsW6jXUdKO++KWBfPc9JKTgIm8Rgg2p3EErVwCSDzlonb oyyYeT+gGtQp4r6H63bzXkwpqm5jlo/ImJkm7dmCRKdtKjZHy3ciYSvUCg+gRdobE04v 6uO/PlmC22DDKkMW8+4y7YXIwWOatuub2zV4YC1B4Bm9EKf/8jmEnpr64ZV6A/UdVrly wVyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PtMi89g+xngw9+GYstbnUlBVQc42Sqo+fMvxApUU36w=; b=LpKW7mHTvvxtmmR3XVQmu2leOTbmeHICxdTxvq6H5oHpF4nSSR/Vt6HlhzXPDmBrhy NbIS/c/QMnctlKCJd7lWPMfgTUKjrIs2k/lGMX/gA3xAMm2lgFf6gvYtLdCuPEwzhfz+ R6qAItjPmbecI8UKnJApLXvUWr47dFCRndcsmz0s9wPJHibZm7eJM2R3w0ZHQyMuYjAg oesg6ZgH0KL7JNktm4LEBbHhFIRWzaib71zFI3NxQzsoY75LM5b1mxHbpXmvMdNJ2kfz 6MWHGtcbybaillZMj5g37zi2lh22huJEfN3Oz/BfdF+lzZYYIA8+8/OlAN3XDCE+uKLO y3wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=g+PzZ2ea; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u16si2976179eje.499.2021.04.09.13.40.45; Fri, 09 Apr 2021 13:40:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=g+PzZ2ea; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234183AbhDIUkv (ORCPT + 16 others); Fri, 9 Apr 2021 16:40:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234424AbhDIUkp (ORCPT ); Fri, 9 Apr 2021 16:40:45 -0400 Received: from mail-il1-x131.google.com (mail-il1-x131.google.com [IPv6:2607:f8b0:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4ED5DC0613DA for ; Fri, 9 Apr 2021 13:40:30 -0700 (PDT) Received: by mail-il1-x131.google.com with SMTP id w2so5748059ilj.12 for ; Fri, 09 Apr 2021 13:40:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PtMi89g+xngw9+GYstbnUlBVQc42Sqo+fMvxApUU36w=; b=g+PzZ2eaK5rlXbrgp7vKf8PLQB0+8T+R/TGOz5WG53mjkALkAO4JQDNomj48bhLX7m qf0f39UXufIDbgtbkvuhZG0n0keMfX1SoQXz0D3ohgTuVZx5Y/+rIyqj6iuK45pSollw rWZFyW76hO+ItcLNUH2FB9BU82ptb0mfHFAPChbDHfqIpv9mWdpJ8wxXEmQuoBEPdf8D y1mTlRq7FN7WltTE96XINxAOW6Aj4eI3drWYDV0EJZd1bb1eMSpbW8dP7dFqWavAOA/p sjrLJP8T+WBKMxQARfZmatVwXFluzeveYDeEvecPPbtxqXCtjbexPyEjpMMkTCRQlIwj v1LA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PtMi89g+xngw9+GYstbnUlBVQc42Sqo+fMvxApUU36w=; b=PHB2NlEozmA9zDUwN7Yb71WmFZbPYFwrP+PBWXEXR1xWza99MPpWCDrOvQqpLDn3m0 NbjO4GBlwQRbYD03fkDRJVKBV+vIVKNhFDJzNt7GCK5tFW4w5mF4TurIMPI3AUebMSL/ o9TrbUCf2k0XApuW7wduOgNKeAEnQrwaUeJR2RZse/vaOP+xi9LzFZwCkFyMlhgamYUD aGln6Oog03rWTHuZV1xn9B3C6nQuEUiuM7aFfty1QA+Rau5BisnVRE1ThXHjcUmnpORN XYPtqOMl+6cHsy25eqP0ve/IRN3TaQAWIHgIBYM2USGGiVImWQm4s8Yij2fD7uq4YeZV dRiA== X-Gm-Message-State: AOAM53246jabRiUClZxAcilFaThv7Suvo0CHkEwcikaDrdF9Mnf4I5hZ o02+a4Bel0/mdlQimB8OxC6dLw== X-Received: by 2002:a05:6e02:b2e:: with SMTP id e14mr12609797ilu.186.1618000829745; Fri, 09 Apr 2021 13:40:29 -0700 (PDT) Received: from presto.localdomain (c-73-185-129-58.hsd1.mn.comcast.net. [73.185.129.58]) by smtp.gmail.com with ESMTPSA id b9sm1667212ilc.28.2021.04.09.13.40.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 13:40:29 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/4] net: ipa: disable checksum offload for IPA v4.5+ Date: Fri, 9 Apr 2021 15:40:22 -0500 Message-Id: <20210409204024.1255938-3-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210409204024.1255938-1-elder@linaro.org> References: <20210409204024.1255938-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Checksum offload for IPA v4.5+ is implemented differently, using "inline" offload (which uses a common header format for both upload and download offload). The IPA hardware must be programmed to enable MAP checksum offload, but the RMNet driver is responsible for interpreting checksum metadata supplied with messages. Currently, the RMNet driver does not support inline checksum offload. This support is imminent, but until it is available, do not allow newer versions of IPA to specify checksum offload for endpoints. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_endpoint.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.27.0 diff --git a/drivers/net/ipa/ipa_endpoint.c b/drivers/net/ipa/ipa_endpoint.c index dd24179383c1c..5d8b8c68438a5 100644 --- a/drivers/net/ipa/ipa_endpoint.c +++ b/drivers/net/ipa/ipa_endpoint.c @@ -88,6 +88,11 @@ static bool ipa_endpoint_data_valid_one(struct ipa *ipa, u32 count, if (ipa_gsi_endpoint_data_empty(data)) return true; + /* IPA v4.5+ uses checksum offload, not yet supported by RMNet */ + if (ipa->version >= IPA_VERSION_4_5) + if (data->endpoint.config.checksum) + return false; + if (!data->toward_ipa) { if (data->endpoint.filter_support) { dev_err(dev, "filtering not supported for " @@ -230,6 +235,17 @@ static bool ipa_endpoint_data_valid(struct ipa *ipa, u32 count, static bool ipa_endpoint_data_valid(struct ipa *ipa, u32 count, const struct ipa_gsi_endpoint_data *data) { + const struct ipa_gsi_endpoint_data *dp = data; + enum ipa_endpoint_name name; + + if (ipa->version < IPA_VERSION_4_5) + return true; + + /* IPA v4.5+ uses checksum offload, not yet supported by RMNet */ + for (name = 0; name < count; name++, dp++) + if (data->endpoint.config.checksum) + return false; + return true; } From patchwork Fri Apr 9 20:40:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 418195 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1882373jai; Fri, 9 Apr 2021 13:40:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzxynX04NmEulbH6vdO592fL/bCwLFHbXB4GZf9u0s/W6Ma80rrQ6v36q83CI73nHnpxmXH X-Received: by 2002:a17:907:2069:: with SMTP id qp9mr18176500ejb.175.1618000846453; Fri, 09 Apr 2021 13:40:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618000846; cv=none; d=google.com; s=arc-20160816; b=iU9vWmJrz5no3aR4FVR3Q1PmJQlVAkvgboqGlKsQDfpKrKcFDLLzeiTxxwGVjmNknY VJ/Zg2XKYQ9jZAMSEzzRSNfPbsLcDTxZ8hipYZ++XC0+rv+I2s2W0A0cKATyKQU8wJol hzzAwVsPQ1mWei2Sdsmf0fhwi8RUya3oGy1zH+K20+c43s+133rlsUqZ55iZwfIZXo0B PAmL6D4+UagBEc8iqx5yx7OT/Zn0pTNV8Ok8t8lWQl/JGTCg54JrpA0fxY3PvRnrk+fF a19wOT5Ie6XmNVE4oDdPCwFlYDIXK8nUq1aVizZ8frE5HZQUonpcwUhWyEntROvF+c+D 4Dng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Wk9T4KvvZdm3GpSfmWAgyvpP3nYfC5QTXghRHx/+Shs=; b=UDs2HKmkFzb4w+Q3U1TfcQ4jAe89e1Z6C+Jxstco5WJcJMQgsSa8tTIqk1Oi0W9aqG I/FSLy9OlKmTkO3j+XMswRFZ965qbIWm4AXoKqdQMsICaQIgJNo8+L+vWpwIOQ97mCfj uV7wwVB3jUWZpe73LY+CD2w7NcWM0Xo9EB6tv0Rd4xSpQdg9xloKj95UeiD9Aw1cuqE9 ujSUEp51nZgZOHttmyTWbrhBxd9zsySDIdRF9TZWVh9uAuG6hkvqjbXWJknAR6B3gTlc ShH+Be5leg76QobyNfqz9+3zcxSD9Gwn5GlS1JGiE1BK8Nm/F54iOjEC9771GJWNWW6C jTfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oEaCmV4L; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u16si2976179eje.499.2021.04.09.13.40.46; Fri, 09 Apr 2021 13:40:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oEaCmV4L; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234409AbhDIUkw (ORCPT + 16 others); Fri, 9 Apr 2021 16:40:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53744 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234433AbhDIUkp (ORCPT ); Fri, 9 Apr 2021 16:40:45 -0400 Received: from mail-io1-xd33.google.com (mail-io1-xd33.google.com [IPv6:2607:f8b0:4864:20::d33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B628C061764 for ; Fri, 9 Apr 2021 13:40:31 -0700 (PDT) Received: by mail-io1-xd33.google.com with SMTP id x17so7236160iog.2 for ; Fri, 09 Apr 2021 13:40:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Wk9T4KvvZdm3GpSfmWAgyvpP3nYfC5QTXghRHx/+Shs=; b=oEaCmV4LqGd4RLLQKouEay2ce2x9CThcg42oyfB/PHK7cvpg4FEhtEPn5gjLLMYWdP JbKv5XEfipQcMeX+NvNxq77Nh8AoOZ9sxrIlsHBbcHTU1lBpXGTGSQCAjX7N5pmjt7wZ AjTEl54NOiukJEFA4H5VO5KphwhEbIpe2moYHbpIuHrh0DrnbJbjijKEFCScNobj0iAv 9JBAEGsa35v9DIMu9ynZpsKqAe2k8dDscoobP6qCjUuSjvoEfUCeNZWdiMtrR9114LJF bjNO3Skn0rtnNQXKI6Dq2J56gqL5YGJG4uBbpYHPJzzIOxP3InkzU9wjTwhub79TLnCa ewgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Wk9T4KvvZdm3GpSfmWAgyvpP3nYfC5QTXghRHx/+Shs=; b=mZ+FJqrINPMkIZofqKlf9/v92m7Ze9nmc3rA1kpkRo97mDZwjIyiccaKLBbroZGMTg qS8w4WAad2aL580oseeqoQLoo0gaIrwcNTRkgnxuA3oPYUanbWgyRUXSE2HtMLgQ2lCe uG5es1V3wMLnCwZf4/xdIdn4aoGFQYx4BEUjVfVO5upguL0shjW1NPxkkD5PDPgLaZVV V+pI9NSeYVZxykf6TJal5uECzmmHNqGImWTb4ak0z/16eQ61zmZI1bSdOGzjJJ4aa5J0 8EwnBb4zs4tSnG/q5I3fY9dvmQl1OYM9FqMQf4S8Vsq79zE5iKkd9VZMHeNj94rmrZXW 19Ww== X-Gm-Message-State: AOAM533N7+UknF+39Pxpl9Cua3ykG2dqc5bTButwcKn2xPynziqLchiM xHOUxU5emExI9J3ceZ7TPsfy2A== X-Received: by 2002:a02:a807:: with SMTP id f7mr14610243jaj.54.1618000830796; Fri, 09 Apr 2021 13:40:30 -0700 (PDT) Received: from presto.localdomain (c-73-185-129-58.hsd1.mn.comcast.net. [73.185.129.58]) by smtp.gmail.com with ESMTPSA id b9sm1667212ilc.28.2021.04.09.13.40.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 13:40:30 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/4] net: ipa: add IPA v4.5 configuration data Date: Fri, 9 Apr 2021 15:40:23 -0500 Message-Id: <20210409204024.1255938-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210409204024.1255938-1-elder@linaro.org> References: <20210409204024.1255938-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for the SDX55 SoC, which includes IPA version 4.5. Starting with IPA v4.5, a few of the memory regions have a different number of "canary" values; update comments in the where the region identifers are defined to accurately reflect that. I'll note three differences in SDX55 versus the other two existing platforms (SDM845 and SC7180): - SDX55 uses a 32-bit Linux kernel - SDX55 has four interconnects rather than three - SDX55 uses IPA v4.5, which uses inline checksum offload Signed-off-by: Alex Elder --- drivers/net/ipa/Makefile | 3 +- drivers/net/ipa/ipa_data-v4.5.c | 437 ++++++++++++++++++++++++++++++++ drivers/net/ipa/ipa_data.h | 1 + drivers/net/ipa/ipa_main.c | 4 + drivers/net/ipa/ipa_mem.h | 6 +- 5 files changed, 447 insertions(+), 4 deletions(-) create mode 100644 drivers/net/ipa/ipa_data-v4.5.c -- 2.27.0 diff --git a/drivers/net/ipa/Makefile b/drivers/net/ipa/Makefile index 6abd1db9fe330..ccc4924881ac4 100644 --- a/drivers/net/ipa/Makefile +++ b/drivers/net/ipa/Makefile @@ -9,4 +9,5 @@ ipa-y := ipa_main.o ipa_clock.o ipa_reg.o ipa_mem.o \ ipa_endpoint.o ipa_cmd.o ipa_modem.o \ ipa_resource.o ipa_qmi.o ipa_qmi_msg.o -ipa-y += ipa_data-v3.5.1.o ipa_data-v4.2.o +ipa-y += ipa_data-v3.5.1.o ipa_data-v4.2.o \ + ipa_data-v4.5.o diff --git a/drivers/net/ipa/ipa_data-v4.5.c b/drivers/net/ipa/ipa_data-v4.5.c new file mode 100644 index 0000000000000..5f67a3a909ee0 --- /dev/null +++ b/drivers/net/ipa/ipa_data-v4.5.c @@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* Copyright (C) 2021 Linaro Ltd. */ + +#include + +#include "gsi.h" +#include "ipa_data.h" +#include "ipa_endpoint.h" +#include "ipa_mem.h" + +/** enum ipa_resource_type - IPA resource types for an SoC having IPA v4.5 */ +enum ipa_resource_type { + /* Source resource types; first must have value 0 */ + IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0, + IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS, + IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF, + IPA_RESOURCE_TYPE_SRC_HPS_DMARS, + IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES, + + /* Destination resource types; first must have value 0 */ + IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0, + IPA_RESOURCE_TYPE_DST_DPS_DMARS, +}; + +/* Resource groups used for an SoC having IPA v4.5 */ +enum ipa_rsrc_group_id { + /* Source resource group identifiers */ + IPA_RSRC_GROUP_SRC_UNUSED_0 = 0, + IPA_RSRC_GROUP_SRC_UL_DL, + IPA_RSRC_GROUP_SRC_UNUSED_2, + IPA_RSRC_GROUP_SRC_UNUSED_3, + IPA_RSRC_GROUP_SRC_UC_RX_Q, + IPA_RSRC_GROUP_SRC_COUNT, /* Last in set; not a source group */ + + /* Destination resource group identifiers */ + IPA_RSRC_GROUP_DST_UNUSED_0 = 0, + IPA_RSRC_GROUP_DST_UL_DL_DPL, + IPA_RSRC_GROUP_DST_UNUSED_2, + IPA_RSRC_GROUP_DST_UNUSED_3, + IPA_RSRC_GROUP_DST_UC, + IPA_RSRC_GROUP_DST_COUNT, /* Last; not a destination group */ +}; + +/* QSB configuration data for an SoC having IPA v4.5 */ +static const struct ipa_qsb_data ipa_qsb_data[] = { + [IPA_QSB_MASTER_DDR] = { + .max_writes = 8, + .max_reads = 0, /* no limit (hardware max) */ + .max_reads_beats = 120, + }, + [IPA_QSB_MASTER_PCIE] = { + .max_writes = 8, + .max_reads = 12, + /* no outstanding read byte (beat) limit */ + }, +}; + +/* Endpoint configuration data for an SoC having IPA v4.5 */ +static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = { + [IPA_ENDPOINT_AP_COMMAND_TX] = { + .ee_id = GSI_EE_AP, + .channel_id = 9, + .endpoint_id = 7, + .toward_ipa = true, + .channel = { + .tre_count = 256, + .event_count = 256, + .tlv_count = 20, + }, + .endpoint = { + .config = { + .resource_group = IPA_RSRC_GROUP_SRC_UL_DL, + .dma_mode = true, + .dma_endpoint = IPA_ENDPOINT_AP_LAN_RX, + .tx = { + .seq_type = IPA_SEQ_DMA, + }, + }, + }, + }, + [IPA_ENDPOINT_AP_LAN_RX] = { + .ee_id = GSI_EE_AP, + .channel_id = 10, + .endpoint_id = 16, + .toward_ipa = false, + .channel = { + .tre_count = 256, + .event_count = 256, + .tlv_count = 9, + }, + .endpoint = { + .config = { + .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL, + .aggregation = true, + .status_enable = true, + .rx = { + .pad_align = ilog2(sizeof(u32)), + }, + }, + }, + }, + [IPA_ENDPOINT_AP_MODEM_TX] = { + .ee_id = GSI_EE_AP, + .channel_id = 7, + .endpoint_id = 2, + .toward_ipa = true, + .channel = { + .tre_count = 512, + .event_count = 512, + .tlv_count = 16, + }, + .endpoint = { + .filter_support = true, + .config = { + .resource_group = IPA_RSRC_GROUP_SRC_UL_DL, + .qmap = true, + .status_enable = true, + .tx = { + .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC, + .status_endpoint = + IPA_ENDPOINT_MODEM_AP_RX, + }, + }, + }, + }, + [IPA_ENDPOINT_AP_MODEM_RX] = { + .ee_id = GSI_EE_AP, + .channel_id = 1, + .endpoint_id = 14, + .toward_ipa = false, + .channel = { + .tre_count = 256, + .event_count = 256, + .tlv_count = 9, + }, + .endpoint = { + .config = { + .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL, + .qmap = true, + .aggregation = true, + .rx = { + .aggr_close_eof = true, + }, + }, + }, + }, + [IPA_ENDPOINT_MODEM_AP_TX] = { + .ee_id = GSI_EE_MODEM, + .channel_id = 0, + .endpoint_id = 5, + .toward_ipa = true, + .endpoint = { + .filter_support = true, + }, + }, + [IPA_ENDPOINT_MODEM_AP_RX] = { + .ee_id = GSI_EE_MODEM, + .channel_id = 7, + .endpoint_id = 21, + .toward_ipa = false, + }, + [IPA_ENDPOINT_MODEM_DL_NLO_TX] = { + .ee_id = GSI_EE_MODEM, + .channel_id = 2, + .endpoint_id = 8, + .toward_ipa = true, + .endpoint = { + .filter_support = true, + }, + }, +}; + +/* Source resource configuration data for an SoC having IPA v4.5 */ +static const struct ipa_resource ipa_resource_src[] = { + [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 1, .max = 11, + }, + .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = { + .min = 1, .max = 63, + }, + }, + [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 14, .max = 14, + }, + .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = { + .min = 3, .max = 3, + }, + }, + [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 18, .max = 18, + }, + .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = { + .min = 8, .max = 8, + }, + }, + [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = { + .limits[IPA_RSRC_GROUP_SRC_UNUSED_0] = { + .min = 0, .max = 63, + }, + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 0, .max = 63, + }, + .limits[IPA_RSRC_GROUP_SRC_UNUSED_2] = { + .min = 0, .max = 63, + }, + .limits[IPA_RSRC_GROUP_SRC_UNUSED_3] = { + .min = 0, .max = 63, + }, + .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = { + .min = 0, .max = 63, + }, + }, + [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 24, .max = 24, + }, + .limits[IPA_RSRC_GROUP_SRC_UC_RX_Q] = { + .min = 8, .max = 8, + }, + }, +}; + +/* Destination resource configuration data for an SoC having IPA v4.5 */ +static const struct ipa_resource ipa_resource_dst[] = { + [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = { + .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = { + .min = 16, .max = 16, + }, + .limits[IPA_RSRC_GROUP_DST_UNUSED_2] = { + .min = 2, .max = 2, + }, + .limits[IPA_RSRC_GROUP_DST_UNUSED_3] = { + .min = 2, .max = 2, + }, + }, + [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = { + .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = { + .min = 2, .max = 63, + }, + .limits[IPA_RSRC_GROUP_DST_UNUSED_2] = { + .min = 1, .max = 2, + }, + .limits[IPA_RSRC_GROUP_DST_UNUSED_3] = { + .min = 1, .max = 2, + }, + .limits[IPA_RSRC_GROUP_DST_UC] = { + .min = 0, .max = 2, + }, + }, +}; + +/* Resource configuration data for an SoC having IPA v4.5 */ +static const struct ipa_resource_data ipa_resource_data = { + .rsrc_group_src_count = IPA_RSRC_GROUP_SRC_COUNT, + .rsrc_group_dst_count = IPA_RSRC_GROUP_DST_COUNT, + .resource_src_count = ARRAY_SIZE(ipa_resource_src), + .resource_src = ipa_resource_src, + .resource_dst_count = ARRAY_SIZE(ipa_resource_dst), + .resource_dst = ipa_resource_dst, +}; + +/* IPA-resident memory region data for an SoC having IPA v4.5 */ +static const struct ipa_mem ipa_mem_local_data[] = { + [IPA_MEM_UC_SHARED] = { + .offset = 0x0000, + .size = 0x0080, + .canary_count = 0, + }, + [IPA_MEM_UC_INFO] = { + .offset = 0x0080, + .size = 0x0200, + .canary_count = 0, + }, + [IPA_MEM_V4_FILTER_HASHED] = { + .offset = 0x0288, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V4_FILTER] = { + .offset = 0x0308, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_FILTER_HASHED] = { + .offset = 0x0388, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_FILTER] = { + .offset = 0x0408, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V4_ROUTE_HASHED] = { + .offset = 0x0488, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V4_ROUTE] = { + .offset = 0x0508, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_ROUTE_HASHED] = { + .offset = 0x0588, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_ROUTE] = { + .offset = 0x0608, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_MODEM_HEADER] = { + .offset = 0x0688, + .size = 0x0240, + .canary_count = 2, + }, + [IPA_MEM_AP_HEADER] = { + .offset = 0x08c8, + .size = 0x0200, + .canary_count = 0, + }, + [IPA_MEM_MODEM_PROC_CTX] = { + .offset = 0x0ad0, + .size = 0x0b20, + .canary_count = 2, + }, + [IPA_MEM_AP_PROC_CTX] = { + .offset = 0x15f0, + .size = 0x0200, + .canary_count = 0, + }, + [IPA_MEM_NAT_TABLE] = { + .offset = 0x1800, + .size = 0x0d00, + .canary_count = 4, + }, + [IPA_MEM_STATS_QUOTA_MODEM] = { + .offset = 0x2510, + .size = 0x0030, + .canary_count = 4, + }, + [IPA_MEM_STATS_QUOTA_AP] = { + .offset = 0x2540, + .size = 0x0048, + .canary_count = 0, + }, + [IPA_MEM_STATS_TETHERING] = { + .offset = 0x2588, + .size = 0x0238, + .canary_count = 0, + }, + [IPA_MEM_STATS_FILTER_ROUTE] = { + .offset = 0x27c0, + .size = 0x0800, + .canary_count = 0, + }, + [IPA_MEM_STATS_DROP] = { + .offset = 0x2fc0, + .size = 0x0020, + .canary_count = 0, + }, + [IPA_MEM_MODEM] = { + .offset = 0x2fe8, + .size = 0x0800, + .canary_count = 2, + }, + [IPA_MEM_UC_EVENT_RING] = { + .offset = 0x3800, + .size = 0x1000, + .canary_count = 1, + }, + [IPA_MEM_PDN_CONFIG] = { + .offset = 0x4800, + .size = 0x0050, + .canary_count = 0, + }, +}; + +/* Memory configuration data for an SoC having IPA v4.5 */ +static const struct ipa_mem_data ipa_mem_data = { + .local_count = ARRAY_SIZE(ipa_mem_local_data), + .local = ipa_mem_local_data, + .imem_addr = 0x14688000, + .imem_size = 0x00003000, + .smem_id = 497, + .smem_size = 0x00009000, +}; + +/* Interconnect rates are in 1000 byte/second units */ +static const struct ipa_interconnect_data ipa_interconnect_data[] = { + { + .name = "memory-a", + .peak_bandwidth = 600000, /* 600 MBps */ + .average_bandwidth = 150000, /* 150 MBps */ + }, + { + .name = "memory-b", + .peak_bandwidth = 1804000, /* 1.804 GBps */ + .average_bandwidth = 150000, /* 150 MBps */ + }, + /* Average rate is unused for the next two interconnects */ + { + .name = "imem", + .peak_bandwidth = 450000, /* 450 MBps */ + .average_bandwidth = 75000, /* 75 MBps (unused?) */ + }, + { + .name = "config", + .peak_bandwidth = 171400, /* 171.4 MBps */ + .average_bandwidth = 0, /* unused */ + }, +}; + +/* Clock and interconnect configuration data for an SoC having IPA v4.5 */ +static const struct ipa_clock_data ipa_clock_data = { + .core_clock_rate = 150 * 1000 * 1000, /* Hz (150? 60?) */ + .interconnect_count = ARRAY_SIZE(ipa_interconnect_data), + .interconnect_data = ipa_interconnect_data, +}; + +/* Configuration data for an SoC having IPA v4.5 */ +const struct ipa_data ipa_data_v4_5 = { + .version = IPA_VERSION_4_5, + .qsb_count = ARRAY_SIZE(ipa_qsb_data), + .qsb_data = ipa_qsb_data, + .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data), + .endpoint_data = ipa_gsi_endpoint_data, + .resource_data = &ipa_resource_data, + .mem_data = &ipa_mem_data, + .clock_data = &ipa_clock_data, +}; diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h index 769f68923527f..4bbb978fefdb7 100644 --- a/drivers/net/ipa/ipa_data.h +++ b/drivers/net/ipa/ipa_data.h @@ -302,5 +302,6 @@ struct ipa_data { extern const struct ipa_data ipa_data_v3_5_1; extern const struct ipa_data ipa_data_v4_2; +extern const struct ipa_data ipa_data_v4_5; #endif /* _IPA_DATA_H_ */ diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index a970d10e650ef..b3ee79e07309e 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -584,6 +584,10 @@ static const struct of_device_id ipa_match[] = { .compatible = "qcom,sc7180-ipa", .data = &ipa_data_v4_2, }, + { + .compatible = "qcom,sdx55-ipa", + .data = &ipa_data_v4_5, + }, { }, }; MODULE_DEVICE_TABLE(of, ipa_match); diff --git a/drivers/net/ipa/ipa_mem.h b/drivers/net/ipa/ipa_mem.h index df61ef48df365..a6abe0866c7ad 100644 --- a/drivers/net/ipa/ipa_mem.h +++ b/drivers/net/ipa/ipa_mem.h @@ -58,8 +58,8 @@ enum ipa_mem_id { IPA_MEM_MODEM_PROC_CTX, /* 2 canaries */ IPA_MEM_AP_PROC_CTX, /* 0 canaries */ IPA_MEM_NAT_TABLE, /* 4 canaries (IPA v4.5 and above) */ - IPA_MEM_PDN_CONFIG, /* 2 canaries (IPA v4.0 and above) */ - IPA_MEM_STATS_QUOTA_MODEM, /* 2 canaries (IPA v4.0 and above) */ + IPA_MEM_PDN_CONFIG, /* 0/2 canaries (IPA v4.0 and above) */ + IPA_MEM_STATS_QUOTA_MODEM, /* 2/4 canaries (IPA v4.0 and above) */ IPA_MEM_STATS_QUOTA_AP, /* 0 canaries (IPA v4.0 and above) */ IPA_MEM_STATS_TETHERING, /* 0 canaries (IPA v4.0 and above) */ IPA_MEM_STATS_V4_FILTER, /* 0 canaries (IPA v4.0-v4.2) */ @@ -68,7 +68,7 @@ enum ipa_mem_id { IPA_MEM_STATS_V6_ROUTE, /* 0 canaries (IPA v4.0-v4.2) */ IPA_MEM_STATS_FILTER_ROUTE, /* 0 canaries (IPA v4.5 and above) */ IPA_MEM_STATS_DROP, /* 0 canaries (IPA v4.0 and above) */ - IPA_MEM_MODEM, /* 0 canaries */ + IPA_MEM_MODEM, /* 0/2 canaries */ IPA_MEM_UC_EVENT_RING, /* 1 canary */ IPA_MEM_COUNT, /* Number of regions (not an index) */ }; From patchwork Fri Apr 9 20:40:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 418248 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C55CC433ED for ; Fri, 9 Apr 2021 20:40:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 165C1611F0 for ; Fri, 9 Apr 2021 20:40:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234482AbhDIUkz (ORCPT ); Fri, 9 Apr 2021 16:40:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234467AbhDIUks (ORCPT ); Fri, 9 Apr 2021 16:40:48 -0400 Received: from mail-il1-x12e.google.com (mail-il1-x12e.google.com [IPv6:2607:f8b0:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 64DE4C0613DE for ; Fri, 9 Apr 2021 13:40:32 -0700 (PDT) Received: by mail-il1-x12e.google.com with SMTP id b17so5786978ilh.6 for ; Fri, 09 Apr 2021 13:40:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=723madM6cGUIJGLXv2eiXMsIvXPwvxMgC8wjV9wuXRw=; b=N3aX/qMJ1NE/6EGhebtHNpZRMaXGY92GtBJgvapas+e9Oy9FcTCBXZ2MI3zzqki6Pd J5TxLJXtjEnzAN47m54jPrk9IhNpFXQOshhBE3qozE3mJHS6Cbl79QcPQGYRioZcwpbP Ye8sY+o7jrCFKdrote9ACU0vfZ6TOwFs7qs7ZrcdGoY0bzLoNzc8uMRaZ6u9r7D4ODGs zz7y9ksAG96QvejFkxRtpcZxa5bhkcrvFUN1pSccpNYl49nh+WTtum15Y0IdrheVZpQe iEzjGd/rHzPx3qGLcJEeBu8F1hyKbVJiZcWd5A5ubSRQywZ6B6w+R+unPDOnJ+whCfST zgiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=723madM6cGUIJGLXv2eiXMsIvXPwvxMgC8wjV9wuXRw=; b=k4EHF3s1KQI/9cqSUh7bmcQMNrZZXKqprLwi3JklYPcjPXL5WMpTi5U+4HWGX7TMHq WW3ImDEtzAzteQVOuIx5gvppCbYx3EuSfhLJ+UwCeLR4yCHkX09aorg1ThbpD6+Ilc9+ 5c3B6NgMV+phcw3N2lgH/4mRRK3vJuScrZHOvWUvA0rUP0Vm8DfdLhVF41VMahbGKmVh uOab4fI+YPO4Lj2lJxWOTljdKvmydJruI1ahrxgOU74CkeZN5VDzG+jvFOFt8f1IgeKA bgrkbX0pejRf7y2QtyY63MsdoUVSR3G9/YrplPQ4/OjlrIYcth1z9d8Q2hYXUyWEmfV8 Iypg== X-Gm-Message-State: AOAM531W2Z8LsPpKyWsz5J4EcU59uGk2OTaYo3a1Qq3r3b822HX20all BlR+f5SDY36jVwhdfYPzwlBJAg== X-Google-Smtp-Source: ABdhPJwOXVYQPE+9LJ3JcpcNMA4X/YcJRf6I9ImHBSMZuZcz6lJ+rm7VNez25jJk3WXsvkY0szHO8g== X-Received: by 2002:a92:d712:: with SMTP id m18mr13235588iln.127.1618000831832; Fri, 09 Apr 2021 13:40:31 -0700 (PDT) Received: from presto.localdomain (c-73-185-129-58.hsd1.mn.comcast.net. [73.185.129.58]) by smtp.gmail.com with ESMTPSA id b9sm1667212ilc.28.2021.04.09.13.40.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 13:40:31 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 4/4] net: ipa: add IPA v4.11 configuration data Date: Fri, 9 Apr 2021 15:40:24 -0500 Message-Id: <20210409204024.1255938-5-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210409204024.1255938-1-elder@linaro.org> References: <20210409204024.1255938-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for the SC7280 SoC, which includes IPA version 4.11. Signed-off-by: Alex Elder --- drivers/net/ipa/Makefile | 2 +- drivers/net/ipa/ipa_data-v4.11.c | 382 +++++++++++++++++++++++++++++++ drivers/net/ipa/ipa_data.h | 1 + drivers/net/ipa/ipa_main.c | 4 + 4 files changed, 388 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ipa/ipa_data-v4.11.c diff --git a/drivers/net/ipa/Makefile b/drivers/net/ipa/Makefile index ccc4924881ac4..8c0ac87903549 100644 --- a/drivers/net/ipa/Makefile +++ b/drivers/net/ipa/Makefile @@ -10,4 +10,4 @@ ipa-y := ipa_main.o ipa_clock.o ipa_reg.o ipa_mem.o \ ipa_resource.o ipa_qmi.o ipa_qmi_msg.o ipa-y += ipa_data-v3.5.1.o ipa_data-v4.2.o \ - ipa_data-v4.5.o + ipa_data-v4.5.o ipa_data-v4.11.o diff --git a/drivers/net/ipa/ipa_data-v4.11.c b/drivers/net/ipa/ipa_data-v4.11.c new file mode 100644 index 0000000000000..05806ceae8b54 --- /dev/null +++ b/drivers/net/ipa/ipa_data-v4.11.c @@ -0,0 +1,382 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* Copyright (C) 2021 Linaro Ltd. */ + +#include + +#include "gsi.h" +#include "ipa_data.h" +#include "ipa_endpoint.h" +#include "ipa_mem.h" + +/** enum ipa_resource_type - IPA resource types for an SoC having IPA v4.11 */ +enum ipa_resource_type { + /* Source resource types; first must have value 0 */ + IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS = 0, + IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS, + IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF, + IPA_RESOURCE_TYPE_SRC_HPS_DMARS, + IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES, + + /* Destination resource types; first must have value 0 */ + IPA_RESOURCE_TYPE_DST_DATA_SECTORS = 0, + IPA_RESOURCE_TYPE_DST_DPS_DMARS, +}; + +/* Resource groups used for an SoC having IPA v4.11 */ +enum ipa_rsrc_group_id { + /* Source resource group identifiers */ + IPA_RSRC_GROUP_SRC_UL_DL = 0, + IPA_RSRC_GROUP_SRC_UC_RX_Q, + IPA_RSRC_GROUP_SRC_UNUSED_2, + IPA_RSRC_GROUP_SRC_COUNT, /* Last in set; not a source group */ + + /* Destination resource group identifiers */ + IPA_RSRC_GROUP_DST_UL_DL_DPL = 0, + IPA_RSRC_GROUP_DST_UNUSED_1, + IPA_RSRC_GROUP_DST_DRB_IP, + IPA_RSRC_GROUP_DST_COUNT, /* Last; not a destination group */ +}; + +/* QSB configuration data for an SoC having IPA v4.11 */ +static const struct ipa_qsb_data ipa_qsb_data[] = { + [IPA_QSB_MASTER_DDR] = { + .max_writes = 12, + .max_reads = 13, + .max_reads_beats = 120, + }, +}; + +/* Endpoint configuration data for an SoC having IPA v4.11 */ +static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = { + [IPA_ENDPOINT_AP_COMMAND_TX] = { + .ee_id = GSI_EE_AP, + .channel_id = 5, + .endpoint_id = 7, + .toward_ipa = true, + .channel = { + .tre_count = 256, + .event_count = 256, + .tlv_count = 20, + }, + .endpoint = { + .config = { + .resource_group = IPA_RSRC_GROUP_SRC_UL_DL, + .dma_mode = true, + .dma_endpoint = IPA_ENDPOINT_AP_LAN_RX, + .tx = { + .seq_type = IPA_SEQ_DMA, + }, + }, + }, + }, + [IPA_ENDPOINT_AP_LAN_RX] = { + .ee_id = GSI_EE_AP, + .channel_id = 14, + .endpoint_id = 9, + .toward_ipa = false, + .channel = { + .tre_count = 256, + .event_count = 256, + .tlv_count = 9, + }, + .endpoint = { + .config = { + .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL, + .aggregation = true, + .status_enable = true, + .rx = { + .pad_align = ilog2(sizeof(u32)), + }, + }, + }, + }, + [IPA_ENDPOINT_AP_MODEM_TX] = { + .ee_id = GSI_EE_AP, + .channel_id = 2, + .endpoint_id = 2, + .toward_ipa = true, + .channel = { + .tre_count = 512, + .event_count = 512, + .tlv_count = 16, + }, + .endpoint = { + .filter_support = true, + .config = { + .resource_group = IPA_RSRC_GROUP_SRC_UL_DL, + .qmap = true, + .status_enable = true, + .tx = { + .seq_type = IPA_SEQ_2_PASS_SKIP_LAST_UC, + .status_endpoint = + IPA_ENDPOINT_MODEM_AP_RX, + }, + }, + }, + }, + [IPA_ENDPOINT_AP_MODEM_RX] = { + .ee_id = GSI_EE_AP, + .channel_id = 7, + .endpoint_id = 16, + .toward_ipa = false, + .channel = { + .tre_count = 256, + .event_count = 256, + .tlv_count = 9, + }, + .endpoint = { + .config = { + .resource_group = IPA_RSRC_GROUP_DST_UL_DL_DPL, + .qmap = true, + .aggregation = true, + .rx = { + .aggr_close_eof = true, + }, + }, + }, + }, + [IPA_ENDPOINT_MODEM_AP_TX] = { + .ee_id = GSI_EE_MODEM, + .channel_id = 0, + .endpoint_id = 5, + .toward_ipa = true, + .endpoint = { + .filter_support = true, + }, + }, + [IPA_ENDPOINT_MODEM_AP_RX] = { + .ee_id = GSI_EE_MODEM, + .channel_id = 7, + .endpoint_id = 14, + .toward_ipa = false, + }, + [IPA_ENDPOINT_MODEM_DL_NLO_TX] = { + .ee_id = GSI_EE_MODEM, + .channel_id = 2, + .endpoint_id = 8, + .toward_ipa = true, + .endpoint = { + .filter_support = true, + }, + }, +}; + +/* Source resource configuration data for an SoC having IPA v4.11 */ +static const struct ipa_resource ipa_resource_src[] = { + [IPA_RESOURCE_TYPE_SRC_PKT_CONTEXTS] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 6, .max = 6, + }, + }, + [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_LISTS] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 8, .max = 8, + }, + }, + [IPA_RESOURCE_TYPE_SRC_DESCRIPTOR_BUFF] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 18, .max = 18, + }, + }, + [IPA_RESOURCE_TYPE_SRC_HPS_DMARS] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 2, .max = 2, + }, + }, + [IPA_RESOURCE_TYPE_SRC_ACK_ENTRIES] = { + .limits[IPA_RSRC_GROUP_SRC_UL_DL] = { + .min = 15, .max = 15, + }, + }, +}; + +/* Destination resource configuration data for an SoC having IPA v4.11 */ +static const struct ipa_resource ipa_resource_dst[] = { + [IPA_RESOURCE_TYPE_DST_DATA_SECTORS] = { + .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = { + .min = 3, .max = 3, + }, + .limits[IPA_RSRC_GROUP_DST_DRB_IP] = { + .min = 25, .max = 25, + }, + }, + [IPA_RESOURCE_TYPE_DST_DPS_DMARS] = { + .limits[IPA_RSRC_GROUP_DST_UL_DL_DPL] = { + .min = 2, .max = 2, + }, + }, +}; + +/* Resource configuration data for an SoC having IPA v4.11 */ +static const struct ipa_resource_data ipa_resource_data = { + .rsrc_group_src_count = IPA_RSRC_GROUP_SRC_COUNT, + .rsrc_group_dst_count = IPA_RSRC_GROUP_DST_COUNT, + .resource_src_count = ARRAY_SIZE(ipa_resource_src), + .resource_src = ipa_resource_src, + .resource_dst_count = ARRAY_SIZE(ipa_resource_dst), + .resource_dst = ipa_resource_dst, +}; + +/* IPA-resident memory region data for an SoC having IPA v4.11 */ +static const struct ipa_mem ipa_mem_local_data[] = { + [IPA_MEM_UC_SHARED] = { + .offset = 0x0000, + .size = 0x0080, + .canary_count = 0, + }, + [IPA_MEM_UC_INFO] = { + .offset = 0x0080, + .size = 0x0200, + .canary_count = 0, + }, + [IPA_MEM_V4_FILTER_HASHED] = { + .offset = 0x0288, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V4_FILTER] = { + .offset = 0x0308, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_FILTER_HASHED] = { + .offset = 0x0388, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_FILTER] = { + .offset = 0x0408, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V4_ROUTE_HASHED] = { + .offset = 0x0488, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V4_ROUTE] = { + .offset = 0x0508, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_ROUTE_HASHED] = { + .offset = 0x0588, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_V6_ROUTE] = { + .offset = 0x0608, + .size = 0x0078, + .canary_count = 2, + }, + [IPA_MEM_MODEM_HEADER] = { + .offset = 0x0688, + .size = 0x0240, + .canary_count = 2, + }, + [IPA_MEM_AP_HEADER] = { + .offset = 0x08c8, + .size = 0x0200, + .canary_count = 0, + }, + [IPA_MEM_MODEM_PROC_CTX] = { + .offset = 0x0ad0, + .size = 0x0200, + .canary_count = 2, + }, + [IPA_MEM_AP_PROC_CTX] = { + .offset = 0x0cd0, + .size = 0x0200, + .canary_count = 0, + }, + [IPA_MEM_NAT_TABLE] = { + .offset = 0x0ee0, + .size = 0x0d00, + .canary_count = 4, + }, + [IPA_MEM_PDN_CONFIG] = { + .offset = 0x1be8, + .size = 0x0050, + .canary_count = 0, + }, + [IPA_MEM_STATS_QUOTA_MODEM] = { + .offset = 0x1c40, + .size = 0x0030, + .canary_count = 4, + }, + [IPA_MEM_STATS_QUOTA_AP] = { + .offset = 0x1c70, + .size = 0x0048, + .canary_count = 0, + }, + [IPA_MEM_STATS_TETHERING] = { + .offset = 0x1cb8, + .size = 0x0238, + .canary_count = 0, + }, + [IPA_MEM_STATS_DROP] = { + .offset = 0x1ef0, + .size = 0x0020, + .canary_count = 0, + }, + [IPA_MEM_MODEM] = { + .offset = 0x1f18, + .size = 0x100c, + .canary_count = 2, + }, + [IPA_MEM_UC_EVENT_RING] = { + .offset = 0x3000, + .size = 0x0000, + .canary_count = 1, + }, +}; + +/* Memory configuration data for an SoC having IPA v4.11 */ +static const struct ipa_mem_data ipa_mem_data = { + .local_count = ARRAY_SIZE(ipa_mem_local_data), + .local = ipa_mem_local_data, + .imem_addr = 0x146a8000, + .imem_size = 0x00002000, + .smem_id = 497, + .smem_size = 0x00009000, +}; + +/* Interconnect rates are in 1000 byte/second units */ +static const struct ipa_interconnect_data ipa_interconnect_data[] = { + { + .name = "memory", + .peak_bandwidth = 465000, /* 465 MBps */ + .average_bandwidth = 80000, /* 80 MBps */ + }, + /* Average rate is unused for the next two interconnects */ + { + .name = "imem", + .peak_bandwidth = 68570, /* 68.57 MBps */ + .average_bandwidth = 80000, /* 80 MBps (unused?) */ + }, + { + .name = "config", + .peak_bandwidth = 30000, /* 30 MBps */ + .average_bandwidth = 0, /* unused */ + }, +}; + +/* Clock and interconnect configuration data for an SoC having IPA v4.11 */ +static const struct ipa_clock_data ipa_clock_data = { + .core_clock_rate = 60 * 1000 * 1000, /* Hz */ + .interconnect_count = ARRAY_SIZE(ipa_interconnect_data), + .interconnect_data = ipa_interconnect_data, +}; + +/* Configuration data for an SoC having IPA v4.11 */ +const struct ipa_data ipa_data_v4_11 = { + .version = IPA_VERSION_4_11, + .qsb_count = ARRAY_SIZE(ipa_qsb_data), + .qsb_data = ipa_qsb_data, + .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data), + .endpoint_data = ipa_gsi_endpoint_data, + .resource_data = &ipa_resource_data, + .mem_data = &ipa_mem_data, + .clock_data = &ipa_clock_data, +}; diff --git a/drivers/net/ipa/ipa_data.h b/drivers/net/ipa/ipa_data.h index 4bbb978fefdb7..e3212ea9e3bce 100644 --- a/drivers/net/ipa/ipa_data.h +++ b/drivers/net/ipa/ipa_data.h @@ -303,5 +303,6 @@ struct ipa_data { extern const struct ipa_data ipa_data_v3_5_1; extern const struct ipa_data ipa_data_v4_2; extern const struct ipa_data ipa_data_v4_5; +extern const struct ipa_data ipa_data_v4_11; #endif /* _IPA_DATA_H_ */ diff --git a/drivers/net/ipa/ipa_main.c b/drivers/net/ipa/ipa_main.c index b3ee79e07309e..d0325804ceef6 100644 --- a/drivers/net/ipa/ipa_main.c +++ b/drivers/net/ipa/ipa_main.c @@ -588,6 +588,10 @@ static const struct of_device_id ipa_match[] = { .compatible = "qcom,sdx55-ipa", .data = &ipa_data_v4_5, }, + { + .compatible = "qcom,sc7280-ipa", + .data = &ipa_data_v4_11, + }, { }, }; MODULE_DEVICE_TABLE(of, ipa_match);