From patchwork Mon Jun 4 08:48:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 137620 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1245373lji; Mon, 4 Jun 2018 01:49:00 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKg5SGLj7S75z4G72TWTCdQSkyKbHwtyNhCS2NJdQvzhkrGphAg6FiFYfAO6H8ILGf2PIzY X-Received: by 2002:a63:88c3:: with SMTP id l186-v6mr16679418pgd.226.1528102139993; Mon, 04 Jun 2018 01:48:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528102139; cv=none; d=google.com; s=arc-20160816; b=DYi8/AnX/Q+sfQsZKA7JMRuaIzre2W75B9DSmbv84zJSWJCPeaNoKyHmlStNUN7nMf apSjjnHV+fwTk7Y4AfDN5BQ7YbfZS5uDC71935enIEIrwTnssIsuq0V3VzNEKDJDmMJe vmvOesoTEEpHGoIntP/cEKkKWdJCzZHS4CNIq2FoAF/ZdgqN3hvXvm+XmwlCuiqmE+Hc O4TSOUHtOTrye4vz8D470jrMHjyNjmQ/FUegvknONMlhpUFV2YCwnmbq03Zktu32LFq4 XHDRnxKA69ulky1UTmV6UgNOndNqdpTvLnrhwhjQFTax1c+ylpJG/a2KNfD2AUuVzu0v KLBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:date:message-id:openpgp:subject:from:to :delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature:arc-authentication-results; bh=o/R6wyI1F2mgQjnUTX6mMN5mzH77QtV+HKMXA4jf2+o=; b=lJxpR3tYrc+8FVKX1Chpw7lk8mReGJwUIubRYLL2YI2mr8QuOr/iCY6kesw8VY6PlL dyg84rn2oR8L6i2cJA/9lAZb1EQDGyv35X6wnaFGnUMcGc7+z1/VHfxVl6IezFerVxQO D05PKPTmetKnoeAqglBkHPN6FXsJ/flKkCwtGxV9x95BOB/IvK592brccGaEQXbYwqDL naAKlwnzHyBY4Wp9otahUmDKfqZedyykaiZC623I0EdJLwN1pV51tgUH8k40hzAFMBuh FfBNxltFjASPXDu7j5Dp7tHxyERiKs/XsPjnw/8A1W4lVf/dqIfjhTcKW6nr3y37p5YR NcbQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=oAvFj2mL; spf=pass (google.com: domain of gcc-patches-return-478995-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-478995-patch=linaro.org@gcc.gnu.org Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id t5-v6si45880967plo.113.2018.06.04.01.48.59 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jun 2018 01:48:59 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-478995-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=oAvFj2mL; spf=pass (google.com: domain of gcc-patches-return-478995-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-478995-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=JC5OBEsr7d6FpyEeZqrkyvnl7xcKmNHdn6KbsRAdrGVJaGedLy gdnDKbw0gGe4R/UNxe5/ZWr6vxvuaDvAJiPaJG9OJeG68WtFvnG10KsZB366d9/d fZMc4DWCUrbuqD9rcfGXPS+7NtGyQvhG0eLGo8OezOuKkyQzrTTIfHMfA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=g5EhBzQDGdI6Ft1J2kktm5snLlk=; b=oAvFj2mL7yG7I5Q3gIZM QezqF6rGFwutT8s4ULw1/BcoQJ71oL+zpCKZvLBBXYGl1Jy//7eGWR3kOY6fcgXL zPqlcrQkoQTfUE74e8Un6ZBBf1at2VyzYUBsgSP6/gc+4Xnwuwzw8sbG34/EPZMA gDScxrTFBQfQt0S4A3AJ7eA= Received: (qmail 52615 invoked by alias); 4 Jun 2018 08:48:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 52586 invoked by uid 89); 4 Jun 2018 08:48:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.2 spammy=Architecture X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 04 Jun 2018 08:48:38 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5248E1529; Mon, 4 Jun 2018 01:48:35 -0700 (PDT) Received: from e120077-lin.cambridge.arm.com (e120077-lin.cambridge.arm.com [10.2.206.221]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C69E33F25D; Mon, 4 Jun 2018 01:48:34 -0700 (PDT) To: gcc-patches From: "Richard Earnshaw (lists)" Subject: [arm] PR target/86003 build failures with --with-cpu=xscale Openpgp: preference=signencrypt Message-ID: <6c5695c2-8265-f16d-9653-602ce263288e@arm.com> Date: Mon, 4 Jun 2018 09:48:33 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 The XScale cpu configuration in GCC has always been somewhat non-conforming. Although XScale isn't an architecture (it's simply an implementation of ARMv5te), we do by tradition emit a specific pre-define for it. We achieve this effect by adding an additional feature bit to the xscale CPU definition that isn't part of the base architecture. When I restructured the options last year I overlooked this oddity and the result, of course, is that this configuration now fails to build as intended. What happens is that the driver (correctly) constructs an architecture for the xscale cpu name (as armv5te) and passes it in addition to the CPU name. The backend code, on finding both a cpu and an architecture specifies attempts to correlate the two and finds a difference due to the additional feature bit and reports an inconsistency (fatally if -werror is specified). I think the best fix to this is to treat the xscale feature bit using the same mechanism that we use for other 'quirks' in CPU implementations and simply filter it out before comparing the capabilities. It has the additional benefit that it's also the simplest fix. PR target/86003 * config/arm/arm-cpus.in (ALL_QUIRKS): Add xscale feature to the list of bits to ignore when comparing architectures. Committed to trunk and gcc-8 branch diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 96972a0..545321b 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -268,7 +268,9 @@ define fgroup DOTPROD NEON dotprod # List of all quirk bits to strip out when comparing CPU features with # architectures. -define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd +# xscale isn't really a 'quirk', but it isn't an architecture either and we +# need to ignore it for matching purposes. +define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd xscale # Architecture entries # format: