From patchwork Sun Apr 11 23:08:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitali Borkar X-Patchwork-Id: 419744 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F3CBC433B4 for ; Sun, 11 Apr 2021 23:08:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 63CFB611F2 for ; Sun, 11 Apr 2021 23:08:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235992AbhDKXJG (ORCPT ); Sun, 11 Apr 2021 19:09:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235005AbhDKXJF (ORCPT ); Sun, 11 Apr 2021 19:09:05 -0400 Received: from mail-pl1-x634.google.com (mail-pl1-x634.google.com [IPv6:2607:f8b0:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 94E61C061574; Sun, 11 Apr 2021 16:08:48 -0700 (PDT) Received: by mail-pl1-x634.google.com with SMTP id d8so5358580plh.11; Sun, 11 Apr 2021 16:08:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=wN/TG9G/h1Rib/nM5b3cCiO0QpW84CE6hHGXQNR8cI0=; b=rh5pqaiUmiUpVeJmVx6En6u1S+YgKkamKuYzF1MdTixXIWLDhlRmTVtpCOIX5Q7as0 poQUBDJlojAtg+++Tooe8Bte60VpCwP+Cq0aQuF9yilyVKcWcohNjbbhw1/eu09+JKhQ /CjW8PE5GV7x84QmOjDY93Z9liw2KdpQdaTW/NsXID7CGmQa5khJxEp+I6L+VwNA6AzP ZyNjVAIAsZc+vGKjZgY2vaDXjDpKjXQIKuCzc7NBuiKxEZLI0HyyT+6Bs9VsXmGKmuGe WQwO4Wwn7o43QiiX1Oo2ZeEYKGVOIfSH29lsB99BKT0k7fzDlfWpDqGgDueJf88hev2T qjAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=wN/TG9G/h1Rib/nM5b3cCiO0QpW84CE6hHGXQNR8cI0=; b=Lk8f/FuGRN58BAnUdZq8JpAWFiOwZQ3wbWlzI/W2T4lGOs9ZsWjy75CCLbXIMccTNJ CLe+xD3Vb4qu3kGH0MvO9gXk6hUVLtr6Fp6h+7fUzyrmqbggSjPUN+IODXUqVRXjrCch NgcT4M7VsMteN/8wkMaXtrPRxda55yuyiYuMF3j31h4DTOdOUJM6/pKFectaGDuuE+hE gylAUDF3erKEw6hQTM98FtVeLI4JPujmIOw9PBjBO4pwJovBPLGM8tP/GhP5e6w3Itx6 T/DsyEfPnKti4GQh0geUBr+YLb87mo3IDlOc3IYA42EXg48G7/0uAIei+Zc172XPoLBQ uwww== X-Gm-Message-State: AOAM530gRsJdudmY/wojOJUF65n9UbkRtFzCpX+igICzkS6IRYfMm8gF VrjihMo82lcPYibcSsrFCLU= X-Google-Smtp-Source: ABdhPJymHis/Y9hX7OvrhmoCVjkGyW3QqZgye8+yR6XE+Rg1pXiFfxHn7aXzUpmPNwBilOwAOTea7Q== X-Received: by 2002:a17:902:c407:b029:e7:2272:d12e with SMTP id k7-20020a170902c407b02900e72272d12emr23168759plk.52.1618182528052; Sun, 11 Apr 2021 16:08:48 -0700 (PDT) Received: from kali ([103.141.87.253]) by smtp.gmail.com with ESMTPSA id v11sm9287352pgg.68.2021.04.11.16.08.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Apr 2021 16:08:47 -0700 (PDT) Date: Mon, 12 Apr 2021 04:38:39 +0530 From: Mitali Borkar To: sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in Subject: [PATCH 1/6] staging: media: intel-ipu3: replace bit shifts with BIT() macro Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Added #include and replaced bit shifts by BIT() macro. This BIT() macro from linux/bitops.h is used to define IPU3_UAPI_GRID_Y_START_EN and IPU3_UAPI_AWB_RGBS_THR_B_* bitmask. Use of macro is better and neater. It maintains consistency. Reported by checkpatch. Signed-off-by: Mitali Borkar --- drivers/staging/media/ipu3/include/intel-ipu3.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index edd8edda0647..589d5ccee3a7 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -5,6 +5,7 @@ #define __IPU3_UAPI_H #include +#include /* from /drivers/staging/media/ipu3/include/videodev2.h */ @@ -22,11 +23,11 @@ #define IPU3_UAPI_MAX_BUBBLE_SIZE 10 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1) -#define IPU3_UAPI_GRID_Y_START_EN (1 << 15) +#define IPU3_UAPI_GRID_Y_START_EN BIT(15) /* controls generation of meta_data (like FF enable/disable) */ -#define IPU3_UAPI_AWB_RGBS_THR_B_EN (1 << 14) -#define IPU3_UAPI_AWB_RGBS_THR_B_INCL_SAT (1 << 15) +#define IPU3_UAPI_AWB_RGBS_THR_B_EN BIT(14) +#define IPU3_UAPI_AWB_RGBS_THR_B_INCL_SAT BIT(15) /** * struct ipu3_uapi_grid_config - Grid plane config From patchwork Sun Apr 11 23:08:59 2021 Content-Type: text/plain; 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Sun, 11 Apr 2021 16:09:08 -0700 (PDT) Date: Mon, 12 Apr 2021 04:38:59 +0530 From: Mitali Borkar To: sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in Subject: [PATCH 2/6] staging: media: intel-ipu3: preferred __aligned(size) over __attribute__aligned(size) Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org This patch fixes the warning identified by checkpatch.pl by replacing __attribute__aligned(size) with __aligned(size) Signed-off-by: Mitali Borkar --- .../staging/media/ipu3/include/intel-ipu3.h | 74 +++++++++---------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index 589d5ccee3a7..d95ca9ebfafb 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -84,7 +84,7 @@ struct ipu3_uapi_grid_config { */ struct ipu3_uapi_awb_raw_buffer { __u8 meta_data[IPU3_UAPI_AWB_MAX_BUFFER_SIZE] - __attribute__((aligned(32))); + __aligned(32); } __packed; /** @@ -105,7 +105,7 @@ struct ipu3_uapi_awb_config_s { __u16 rgbs_thr_gb; __u16 rgbs_thr_b; struct ipu3_uapi_grid_config grid; -} __attribute__((aligned(32))) __packed; +} __aligned(32) __packed; /** * struct ipu3_uapi_awb_config - AWB config wrapper @@ -113,7 +113,7 @@ struct ipu3_uapi_awb_config_s { * @config: config for auto white balance as defined by &ipu3_uapi_awb_config_s */ struct ipu3_uapi_awb_config { - struct ipu3_uapi_awb_config_s config __attribute__((aligned(32))); + struct ipu3_uapi_awb_config_s config __aligned(32); } __packed; #define IPU3_UAPI_AE_COLORS 4 /* R, G, B, Y */ @@ -138,7 +138,7 @@ struct ipu3_uapi_ae_raw_buffer { * @buff: &ipu3_uapi_ae_raw_buffer to hold full frame meta data. */ struct ipu3_uapi_ae_raw_buffer_aligned { - struct ipu3_uapi_ae_raw_buffer buff __attribute__((aligned(32))); + struct ipu3_uapi_ae_raw_buffer buff __aligned(32); } __packed; /** @@ -244,10 +244,10 @@ struct ipu3_uapi_ae_ccm { * Calculate AE grid from image resolution, resample ae weights. */ struct ipu3_uapi_ae_config { - struct ipu3_uapi_ae_grid_config grid_cfg __attribute__((aligned(32))); + struct ipu3_uapi_ae_grid_config grid_cfg __aligned(32); struct ipu3_uapi_ae_weight_elem weights[ - IPU3_UAPI_AE_WEIGHTS] __attribute__((aligned(32))); - struct ipu3_uapi_ae_ccm ae_ccm __attribute__((aligned(32))); + IPU3_UAPI_AE_WEIGHTS] __aligned(32); + struct ipu3_uapi_ae_ccm ae_ccm __aligned(32); } __packed; /** @@ -389,7 +389,7 @@ struct ipu3_uapi_af_filter_config { * each cell. */ struct ipu3_uapi_af_raw_buffer { - __u8 y_table[IPU3_UAPI_AF_Y_TABLE_MAX_SIZE] __attribute__((aligned(32))); + __u8 y_table[IPU3_UAPI_AF_Y_TABLE_MAX_SIZE] __aligned(32); } __packed; /** @@ -402,9 +402,9 @@ struct ipu3_uapi_af_raw_buffer { * grid size for large image and vice versa. */ struct ipu3_uapi_af_config_s { - struct ipu3_uapi_af_filter_config filter_config __attribute__((aligned(32))); + struct ipu3_uapi_af_filter_config filter_config __aligned(32); __u8 padding[4]; - struct ipu3_uapi_grid_config grid_cfg __attribute__((aligned(32))); + struct ipu3_uapi_grid_config grid_cfg __aligned(32); } __packed; #define IPU3_UAPI_AWB_FR_MAX_SETS 24 @@ -425,7 +425,7 @@ struct ipu3_uapi_af_config_s { */ struct ipu3_uapi_awb_fr_raw_buffer { __u8 meta_data[IPU3_UAPI_AWB_FR_BAYER_TABLE_MAX_SIZE] - __attribute__((aligned(32))); + __aligned(32); } __packed; /** @@ -463,12 +463,12 @@ struct ipu3_uapi_awb_fr_config_s { * @awb_fr_config: &ipu3_uapi_awb_fr_config_s, default resolution 16x16 */ struct ipu3_uapi_4a_config { - struct ipu3_uapi_awb_config_s awb_config __attribute__((aligned(32))); + struct ipu3_uapi_awb_config_s awb_config __aligned(32); struct ipu3_uapi_ae_grid_config ae_grd_config; __u8 padding[20]; struct ipu3_uapi_af_config_s af_config; struct ipu3_uapi_awb_fr_config_s awb_fr_config - __attribute__((aligned(32))); + __aligned(32); } __packed; /** @@ -487,7 +487,7 @@ struct ipu3_uapi_4a_config { * @padding3: padding bytes. */ struct ipu3_uapi_bubble_info { - __u32 num_of_stripes __attribute__((aligned(32))); + __u32 num_of_stripes __aligned(32); __u8 padding[28]; __u32 num_sets; __u8 padding1[28]; @@ -519,7 +519,7 @@ struct ipu3_uapi_stats_3a_bubble_info_per_stripe { * @padding3: padding config */ struct ipu3_uapi_ff_status { - __u32 awb_en __attribute__((aligned(32))); + __u32 awb_en __aligned(32); __u8 padding[28]; __u32 ae_en; __u8 padding1[28]; @@ -992,8 +992,8 @@ struct ipu3_uapi_gamma_corr_lut { * @gc_lut: lookup table of gamma correction &ipu3_uapi_gamma_corr_lut */ struct ipu3_uapi_gamma_config { - struct ipu3_uapi_gamma_corr_ctrl gc_ctrl __attribute__((aligned(32))); - struct ipu3_uapi_gamma_corr_lut gc_lut __attribute__((aligned(32))); + struct ipu3_uapi_gamma_corr_ctrl gc_ctrl __aligned(32); + struct ipu3_uapi_gamma_corr_lut gc_lut __aligned(32); } __packed; /** @@ -1196,8 +1196,8 @@ struct ipu3_uapi_shd_lut { * @shd_lut: shading lookup table &ipu3_uapi_shd_lut */ struct ipu3_uapi_shd_config { - struct ipu3_uapi_shd_config_static shd __attribute__((aligned(32))); - struct ipu3_uapi_shd_lut shd_lut __attribute__((aligned(32))); + struct ipu3_uapi_shd_config_static shd __aligned(32); + struct ipu3_uapi_shd_lut shd_lut __aligned(32); } __packed; /* Image Enhancement Filter directed */ @@ -2421,8 +2421,8 @@ struct ipu3_uapi_anr_stitch_config { * @stitch: create 4x4 patch from 4 surrounding 8x8 patches. */ struct ipu3_uapi_anr_config { - struct ipu3_uapi_anr_transform_config transform __attribute__((aligned(32))); - struct ipu3_uapi_anr_stitch_config stitch __attribute__((aligned(32))); + struct ipu3_uapi_anr_transform_config transform __aligned(32); + struct ipu3_uapi_anr_stitch_config stitch __aligned(32); } __packed; /** @@ -2463,21 +2463,21 @@ struct ipu3_uapi_anr_config { struct ipu3_uapi_acc_param { struct ipu3_uapi_bnr_static_config bnr; struct ipu3_uapi_bnr_static_config_green_disparity - green_disparity __attribute__((aligned(32))); - struct ipu3_uapi_dm_config dm __attribute__((aligned(32))); - struct ipu3_uapi_ccm_mat_config ccm __attribute__((aligned(32))); - struct ipu3_uapi_gamma_config gamma __attribute__((aligned(32))); - struct ipu3_uapi_csc_mat_config csc __attribute__((aligned(32))); - struct ipu3_uapi_cds_params cds __attribute__((aligned(32))); - struct ipu3_uapi_shd_config shd __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_iefd_config iefd __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_yds_config yds_c0 __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_chnr_config chnr_c0 __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_y_ee_nr_config y_ee_nr __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_yds_config yds __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_chnr_config chnr __attribute__((aligned(32))); - struct ipu3_uapi_yuvp1_yds_config yds2 __attribute__((aligned(32))); - struct ipu3_uapi_yuvp2_tcc_static_config tcc __attribute__((aligned(32))); + green_disparity __aligned(32); + struct ipu3_uapi_dm_config dm __aligned(32); + struct ipu3_uapi_ccm_mat_config ccm __aligned(32); + struct ipu3_uapi_gamma_config gamma __aligned(32); + struct ipu3_uapi_csc_mat_config csc __aligned(32); + struct ipu3_uapi_cds_params cds __aligned(32); + struct ipu3_uapi_shd_config shd __aligned(32); + struct ipu3_uapi_yuvp1_iefd_config iefd __aligned(32); + struct ipu3_uapi_yuvp1_yds_config yds_c0 __aligned(32); + struct ipu3_uapi_yuvp1_chnr_config chnr_c0 __aligned(32); + struct ipu3_uapi_yuvp1_y_ee_nr_config y_ee_nr __aligned(32); + struct ipu3_uapi_yuvp1_yds_config yds __aligned(32); + struct ipu3_uapi_yuvp1_chnr_config chnr __aligned(32); + struct ipu3_uapi_yuvp1_yds_config yds2 __aligned(32); + struct ipu3_uapi_yuvp2_tcc_static_config tcc __aligned(32); struct ipu3_uapi_anr_config anr; struct ipu3_uapi_awb_fr_config_s awb_fr; struct ipu3_uapi_ae_config ae; @@ -2765,7 +2765,7 @@ struct ipu3_uapi_flags { */ struct ipu3_uapi_params { /* Flags which of the settings below are to be applied */ - struct ipu3_uapi_flags use __attribute__((aligned(32))); + struct ipu3_uapi_flags use __aligned(32); /* Accelerator cluster parameters */ struct ipu3_uapi_acc_param acc_param; From patchwork Sun Apr 11 23:09:19 2021 Content-Type: text/plain; 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Sun, 11 Apr 2021 16:09:27 -0700 (PDT) Date: Mon, 12 Apr 2021 04:39:19 +0530 From: Mitali Borkar To: sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in Subject: [PATCH 3/6] staging: media: intel-ipu3: remove unnecessary blank line Message-ID: <79b543d96fa0bd613090984b98c5665344b4dddf.1618180660.git.mitaliborkar810@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Removed an unnecessary blank line to meet linux kernel coding style. Reported by checkpatch.pl Signed-off-by: Mitali Borkar --- drivers/staging/media/ipu3/include/intel-ipu3.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index d95ca9ebfafb..335522e7fc08 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -75,7 +75,6 @@ struct ipu3_uapi_grid_config { (IPU3_UAPI_AWB_MAX_SETS * \ (IPU3_UAPI_AWB_SET_SIZE + IPU3_UAPI_AWB_SPARE_FOR_BUBBLES)) - /** * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer * From patchwork Sun Apr 11 23:09:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitali Borkar X-Patchwork-Id: 419401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 495B3C433ED for ; Sun, 11 Apr 2021 23:09:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2662461206 for ; Sun, 11 Apr 2021 23:09:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236095AbhDKXKF (ORCPT ); Sun, 11 Apr 2021 19:10:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235005AbhDKXKE (ORCPT ); Sun, 11 Apr 2021 19:10:04 -0400 Received: from mail-pg1-x531.google.com (mail-pg1-x531.google.com [IPv6:2607:f8b0:4864:20::531]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A288C061574; Sun, 11 Apr 2021 16:09:48 -0700 (PDT) Received: by mail-pg1-x531.google.com with SMTP id b17so7944210pgh.7; Sun, 11 Apr 2021 16:09:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=8OUqAAQgCtzhtMv9ajuHg08CbUTBgd3fERbur7EHzCw=; b=W73cwcS+VWrXZZ4KOKu2Bw4BGTDn0MVmJa9oBAomrRDoLeVpssJreOmZeCxVhTPqw1 CQbJ8SGoH+EvAqpk017cg4WmUaS0+fS4aU+i6JXudL6JWhVxYGBSpJAKRDgndOU2j+Ay oy+5ZIdKs5kb1rH7XL9Ld8ZDGQl6rHMN6dES28cwReC5nDKd95Qzh7pv6K6XXuO/t45p 9296FfauwtVI12XW0ma0gR3hhI7f9qAy2rIUDnMbBEf+1aHLNHKt4UuTKwVq9/l17fVE qBCUSzYFsZo5Gz6+NG0ZSIKgdgdsbqy8xIGjeT850i/7ga48SOCmXh/GQMHhDckSsvQH JEHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=8OUqAAQgCtzhtMv9ajuHg08CbUTBgd3fERbur7EHzCw=; b=Me6Pp/QM4Z3Vmnyyp1rGk4M9TNIVoAr5Ff/0gOI9jUO86hMb1nHhJrqmwGnMLDL5TM aHLYTYBucwhfZDfIXMh9XOqQHoW9wvI1yxHlTOaFiPyRkj9V2eSCx2tftHMjyEzrV25+ Q4k6XAuORzn8v9lI3iaaxaESherokTJEgANJLWYW0isNHTDb9NnMsExUAFUlf8Nq6y1X NL/h/ES744dZot1b7VhpGlepG1z5xMfGIgs4b+fc+0BYFNoFegpIMUe6qfTKJiR/ihCE uM62xq/gMUCNXKloBoSyTzhY5BxgZjWiQ759v0BrEtNtyIN+rXiE/gLpkzp9BYjFo0eY PYPg== X-Gm-Message-State: AOAM532NmszCO8l2j7xK2SROLn0UiYHDzujie4+PhDksVRvSLmJnJhew Vu4IeR91t1i1j02Q/t1yhXw= X-Google-Smtp-Source: ABdhPJw8GTywRCiLjrQt+OiIitDpXfdPfl30wJv04hvK2WC4ezW4xD8tpm6puXi77C6RxBg80O7xZQ== X-Received: by 2002:a63:3047:: with SMTP id w68mr4002681pgw.94.1618182587651; Sun, 11 Apr 2021 16:09:47 -0700 (PDT) Received: from kali ([103.141.87.253]) by smtp.gmail.com with ESMTPSA id c14sm7918082pfj.46.2021.04.11.16.09.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Apr 2021 16:09:47 -0700 (PDT) Date: Mon, 12 Apr 2021 04:39:39 +0530 From: Mitali Borkar To: sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in Subject: [PATCH 4/6] staging: media: intel-ipu3: reduce length of line Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Reduced length of line as it was exceeding 100 characters by removing comments from same line and adding it to previous line. This makes code neater, and meets linux kernel coding style. Reported by checkpatch. Signed-off-by: Mitali Borkar --- drivers/staging/media/ipu3/include/intel-ipu3.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index 335522e7fc08..53f8e5dec8f5 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -10,8 +10,10 @@ /* from /drivers/staging/media/ipu3/include/videodev2.h */ /* Vendor specific - used for IPU3 camera sub-system */ -#define V4L2_META_FMT_IPU3_PARAMS v4l2_fourcc('i', 'p', '3', 'p') /* IPU3 processing parameters */ -#define V4L2_META_FMT_IPU3_STAT_3A v4l2_fourcc('i', 'p', '3', 's') /* IPU3 3A statistics */ +/* IPU3 processing parameters */ +#define V4L2_META_FMT_IPU3_PARAMS v4l2_fourcc('i', 'p', '3', 'p') +/* IPU3 3A statistics */ +#define V4L2_META_FMT_IPU3_STAT_3A v4l2_fourcc('i', 'p', '3', 's') /* from include/uapi/linux/v4l2-controls.h */ #define V4L2_CID_INTEL_IPU3_BASE (V4L2_CID_USER_BASE + 0x10c0) From patchwork Sun Apr 11 23:09:58 2021 Content-Type: text/plain; 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Sun, 11 Apr 2021 16:10:06 -0700 (PDT) Date: Mon, 12 Apr 2021 04:39:58 +0530 From: Mitali Borkar To: sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in Subject: [PATCH 5/6] staging: media: intel-ipu3: line should not end with '[' Message-ID: <7514b0a9f6b0ce736de3c9d13ae2629d9e67f04c.1618180660.git.mitaliborkar810@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Fixed the issue of line should not end with '[' by moving arguments from next line to line ending with '[' Reported by checkpatch. Signed-off-by: Mitali Borkar --- drivers/staging/media/ipu3/include/intel-ipu3.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index 53f8e5dec8f5..0451f8b7ba4f 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -246,8 +246,7 @@ struct ipu3_uapi_ae_ccm { */ struct ipu3_uapi_ae_config { struct ipu3_uapi_ae_grid_config grid_cfg __aligned(32); - struct ipu3_uapi_ae_weight_elem weights[ - IPU3_UAPI_AE_WEIGHTS] __aligned(32); + struct ipu3_uapi_ae_weight_elem weights[IPU3_UAPI_AE_WEIGHTS] __aligned(32); struct ipu3_uapi_ae_ccm ae_ccm __aligned(32); } __packed; From patchwork Sun Apr 11 23:10:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mitali Borkar X-Patchwork-Id: 419400 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9555AC433B4 for ; Sun, 11 Apr 2021 23:10:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 69DB1611C9 for ; Sun, 11 Apr 2021 23:10:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236165AbhDKXKx (ORCPT ); Sun, 11 Apr 2021 19:10:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235005AbhDKXKw (ORCPT ); Sun, 11 Apr 2021 19:10:52 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8ABECC061574; Sun, 11 Apr 2021 16:10:34 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id em21-20020a17090b0155b029014e204a81e6so1013763pjb.1; Sun, 11 Apr 2021 16:10:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=Xs83SoRxjxMZm2G5yOIIqfQY+EA3Ry1y9P9uXPT9iCU=; b=Z1uoqAlAInnYANBvRJ7X4808QkpHyM0B5anJf58ZmtqH6aoWhE8zuRtTQDQ+q4vmXh 0hAst2YxF5Iueydg+08EqNS+zpqcrzDXB/K1G7tZtJ2jOCIxf0k2XnvWVOmDz0dWnOlJ bUH/65y9LAIoYurGny56wvzmM0ZQ5OHvtB9EJz9vH9F3qh7veZBU/jIQVsFrjtKA2neI jnW6c7cnsuwvrueopXHC6ybIGEVPlUMuJt0E3dINR0PVEO3Zarz9xu6/j+oFq4MWK34z +itQEYhFKDOYJ6EfhKC4ijSM/9avhE3ZUFtAERvdRQ2xLyEjqJu9W1mxuHt/fMS7LN0P Kr/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=Xs83SoRxjxMZm2G5yOIIqfQY+EA3Ry1y9P9uXPT9iCU=; b=TYZtfvdYhSImRjzi43sAj3bei1rQ4S8Fv4RN50MHV99xCiCH1M1KXAs9p7sUuXqSKZ fBWPWr2mxiEygyqRdF+E3DtGBhkmGkyeeSCbMiAHwl7DOHYKKR1r/F09kBGFWMRjTCv/ vjs8AHk/35blgXdzbQTZGUIRoPFu/P9WoYNaVUgxW8sEZvZUba26l8xxVWPUAoHrYmZL 57nKk0x3aYxFTIZdnUUKIFbPn6q2dTiHS1HxJ8EiJ2z4LHb41Hg5+DYOKDeputMjOfCv Q0esxNB9hP7kvnAUt0WttI9f8E4oE6GAJzNMq8E4OdFEEyup86YucXhwm+Rc8GCY5ImU RJkg== X-Gm-Message-State: AOAM532pEj+awHvpg6sHkpKV/hkf3TZThPBL73PLrqK2eZLiq+GVtGV1 eUHSkWvqI43R7dP3wEJaJ74= X-Google-Smtp-Source: ABdhPJyG7N2JLQntthbDfAnf2RU2X0N6jfbM1pYYCLLS25NDoHcDq4Wt1deSJifNlRrP5PfiHUSwKA== X-Received: by 2002:a17:90a:d3c8:: with SMTP id d8mr25032069pjw.144.1618182634040; Sun, 11 Apr 2021 16:10:34 -0700 (PDT) Received: from kali ([103.141.87.253]) by smtp.gmail.com with ESMTPSA id 92sm8713357pjz.7.2021.04.11.16.10.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Apr 2021 16:10:33 -0700 (PDT) Date: Mon, 12 Apr 2021 04:40:25 +0530 From: Mitali Borkar To: sakari.ailus@linux.intel.com, bingbu.cao@intel.com, tian.shu.qiu@intel.com, mchehab@kernel.org, gregkh@linuxfoundation.org Cc: linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in Subject: [PATCH 6/6] staging: media: intel-ipu3: remove space before tabs Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Removed unnecessary space before tabs to adhere to linux kernel coding style. Reported by checkpatch. Signed-off-by: Mitali Borkar --- drivers/staging/media/ipu3/include/intel-ipu3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/ipu3/include/intel-ipu3.h b/drivers/staging/media/ipu3/include/intel-ipu3.h index 0451f8b7ba4f..340d97160bbb 100644 --- a/drivers/staging/media/ipu3/include/intel-ipu3.h +++ b/drivers/staging/media/ipu3/include/intel-ipu3.h @@ -631,7 +631,7 @@ struct ipu3_uapi_bnr_static_config_wb_gains_thr_config { * @cg: Gain coefficient for threshold calculation, [0, 31], default 8. * @ci: Intensity coefficient for threshold calculation. range [0, 0x1f] * default 6. - * format: u3.2 (3 most significant bits represent whole number, + * format: u3.2 (3 most significant bits represent whole number, * 2 least significant bits represent the fractional part * with each count representing 0.25) * e.g. 6 in binary format is 00110, that translates to 1.5