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[209.132.180.67]) by mx.google.com with ESMTP id a65-v6si12929005pge.133.2018.06.04.23.16.51; Mon, 04 Jun 2018 23:16:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rrMjCsg7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751451AbeFEGQt (ORCPT + 30 others); Tue, 5 Jun 2018 02:16:49 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:37245 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751619AbeFEGQq (ORCPT ); Tue, 5 Jun 2018 02:16:46 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w556GT1C001007; Tue, 5 Jun 2018 01:16:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528179389; bh=a/ty0DiMEEKCXvjCWXYShDD1tZXsbXLyP4gkvvzQy2Y=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rrMjCsg7A9Ul9ZvjI6xd8NTtyxhHo039Y7x7tebhDV1BFLgrHwbdDZafsoo/WMADE 8z7AUcKly2628zqxHcoT9YcPFROKlO70jQYuWq3HPS6obYMAe+q0xjId5Trxw3Rfoy rciCRtQRJx1r9vWaoyU3qYf6XXgoLlHmetQHyx+0= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTPt015138; Tue, 5 Jun 2018 01:16:29 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:16:29 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:16:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GT0r016942; Tue, 5 Jun 2018 01:16:29 -0500 From: Nishanth Menon To: Jassi Brar , Rob Herring CC: , , , Nishanth Menon , Tero Kristo , Suman Anna Subject: [RFC PATCH 1/8] mailbox: ti-msgmgr: Get rid of unused structure members Date: Tue, 5 Jun 2018 01:16:22 -0500 Message-ID: <20180605061629.4759-2-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605061629.4759-1-nm@ti.com> References: <20180605061629.4759-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Though q_proxies and q_slices do describe the hardware configuration, they are not necessary for operation given that the values are always default. Hence drop the same. Signed-off-by: Nishanth Menon --- drivers/mailbox/ti-msgmgr.c | 6 ------ 1 file changed, 6 deletions(-) -- 2.15.1 diff --git a/drivers/mailbox/ti-msgmgr.c b/drivers/mailbox/ti-msgmgr.c index 78753a87ba4d..7cd5f9c9c97f 100644 --- a/drivers/mailbox/ti-msgmgr.c +++ b/drivers/mailbox/ti-msgmgr.c @@ -42,8 +42,6 @@ struct ti_msgmgr_valid_queue_desc { * @queue_count: Number of Queues * @max_message_size: Message size in bytes * @max_messages: Number of messages - * @q_slices: Number of queue engines - * @q_proxies: Number of queue proxies per page * @data_first_reg: First data register for proxy data region * @data_last_reg: Last data register for proxy data region * @tx_polled: Do I need to use polled mechanism for tx @@ -58,8 +56,6 @@ struct ti_msgmgr_desc { u8 queue_count; u8 max_message_size; u8 max_messages; - u8 q_slices; - u8 q_proxies; u8 data_first_reg; u8 data_last_reg; bool tx_polled; @@ -494,8 +490,6 @@ static const struct ti_msgmgr_desc k2g_desc = { .queue_count = 64, .max_message_size = 64, .max_messages = 128, - .q_slices = 1, - .q_proxies = 1, .data_first_reg = 16, .data_last_reg = 31, .tx_polled = false, From patchwork Tue Jun 5 06:16:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137690 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp565510lji; Mon, 4 Jun 2018 23:18:23 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIrVc6qoHdwGMY291oR7NdB2J19mUTse/ZW5cJ5hkzy/mgzjfTcxsMRyCijxfByDJhn+7W6 X-Received: by 2002:a63:6b43:: with SMTP id g64-v6mr19569855pgc.337.1528179503576; Mon, 04 Jun 2018 23:18:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528179503; cv=none; d=google.com; s=arc-20160816; b=Nm4E5VfU+n5suo51evUeZnNEQRB8h07Q3HuM6Dk13ZAV3tsUAhka+BL3obhbJeshzK DZaJYLSqhQfJwDRWUWx7VLR61fj9cCeZs/pU6fGCxmL78v5sgBi4iXjmewjRqCzJMRDP Xyzcgo4nZXxkoES94O1/AJS8C2FfwkWgUk0flafP2OpyKKHhsTsqdLCtuMxVa5Bn3kLc eFlt10VZdQQezNOppHPhTj54GvtZSUc8CgzD6rKHcQD1Z+3o6t34wRaE8Jt3pAWSvn8W OF8KAM5sLxc/wOiP8dfamAIOQ70Xq0PgEyjwmcGGe24oY5ZzQSBGvcl2ofmsBQgmOQ5b 8l0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=6WszYD0uZeaoPHg8EGkIRrPUJ8MLDymlbhq3u/DUshI=; b=PgWfyt6c8qgUthajyOmqZu9n9STodon4DhXi7X+8vUyk7NTsCucegJZ58u9CoFlssP srWSRoWLPPYnVrUlgb2r/fYFpqkgMet0e0Mb6lBLfej0QbLhg8NXWdaNR66PjxryZ9mR h1sys+C6pWK/xH7hWNm9IjFD8OwR4qe50psF6e+h5mDnrKFS5gObc0i6xiqkiMQ3m/Lj +FEZ76+16+RIM6+KPF0rScuhiiY7WY2VmH5rfrondlJECdrUiuS6G/uEvzM8ZiOnMEmE WQqdwbqsfLCXUBo+C07q79GBj4jkMyXOAeZOOvLPpCcDSkaw995ilsmbtSuyxctLHjf6 jciA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U1LXF40p; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v32-v6si48058165plb.273.2018.06.04.23.18.23; Mon, 04 Jun 2018 23:18:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=U1LXF40p; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751884AbeFEGSV (ORCPT + 30 others); Tue, 5 Jun 2018 02:18:21 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:37249 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751813AbeFEGQr (ORCPT ); Tue, 5 Jun 2018 02:16:47 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id w556GT6w001013; Tue, 5 Jun 2018 01:16:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528179389; bh=6WszYD0uZeaoPHg8EGkIRrPUJ8MLDymlbhq3u/DUshI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=U1LXF40pUewwug/YUWXALKdd++0dMTGTfWthFobMIHhy6XIo7QwM9m/LGaqpJeFiE 8jek2D2jEklQrdTY27w+BMmhXGXUVJqqMhFP9/xp36GO6scOOblApeVmotN9d9iUKT 8Jm6AcYwk3/JH2lXQHfVs3m21afLpps5eyFLDBS8= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTbt015147; Tue, 5 Jun 2018 01:16:29 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:16:29 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:16:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTiN024160; Tue, 5 Jun 2018 01:16:29 -0500 From: Nishanth Menon To: Jassi Brar , Rob Herring CC: , , , Nishanth Menon , Tero Kristo , Suman Anna Subject: [RFC PATCH 2/8] mailbox: ti-msgmgr: Allocate Rx channel resources only on request Date: Tue, 5 Jun 2018 01:16:23 -0500 Message-ID: <20180605061629.4759-3-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605061629.4759-1-nm@ti.com> References: <20180605061629.4759-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In a much bigger system SoCs, the number of Rx channels can be many and mostly unused based on the system of choice, and not all Rx channels need IRQs and allocating all memory at probe will be inefficient. Some SoCs could have total threads in the 100s and usage would be just 1 Rx thread. Thus, request and map the IRQs and allocate memory only when needed. Since these channels are requested by client drivers on need, our utilization will be optimal. Signed-off-by: Nishanth Menon --- drivers/mailbox/ti-msgmgr.c | 91 ++++++++++++++++++++++++++++++--------------- 1 file changed, 61 insertions(+), 30 deletions(-) -- 2.15.1 diff --git a/drivers/mailbox/ti-msgmgr.c b/drivers/mailbox/ti-msgmgr.c index 7cd5f9c9c97f..7221590c409c 100644 --- a/drivers/mailbox/ti-msgmgr.c +++ b/drivers/mailbox/ti-msgmgr.c @@ -310,6 +310,51 @@ static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) return 0; } +/** + * ti_msgmgr_queue_rx_irq_req() - RX IRQ request + * @dev: device pointer + * @qinst: Queue instance + * @chan: Channel pointer + */ +static int ti_msgmgr_queue_rx_irq_req(struct device *dev, + struct ti_queue_inst *qinst, + struct mbox_chan *chan) +{ + int ret = 0; + char of_rx_irq_name[7]; + struct device_node *np; + + snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), + "rx_%03d", qinst->queue_id); + + /* Get the IRQ if not found */ + if (qinst->irq < 0) { + np = of_node_get(dev->of_node); + if (!np) + return -ENODATA; + qinst->irq = of_irq_get_byname(np, of_rx_irq_name); + of_node_put(np); + + if (qinst->irq < 0) { + dev_err(dev, + "QID %d PID %d:No IRQ[%s]: %d\n", + qinst->queue_id, qinst->proxy_id, + of_rx_irq_name, qinst->irq); + return qinst->irq; + } + } + + /* With the expectation that the IRQ might be shared in SoC */ + ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt, + IRQF_SHARED, qinst->name, chan); + if (ret) { + dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n", + qinst->irq, qinst->name, ret); + } + + return ret; +} + /** * ti_msgmgr_queue_startup() - Startup queue * @chan: Channel pointer @@ -318,19 +363,21 @@ static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) */ static int ti_msgmgr_queue_startup(struct mbox_chan *chan) { - struct ti_queue_inst *qinst = chan->con_priv; struct device *dev = chan->mbox->dev; + struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); + struct ti_queue_inst *qinst = chan->con_priv; + const struct ti_msgmgr_desc *d = inst->desc; int ret; if (!qinst->is_tx) { - /* - * With the expectation that the IRQ might be shared in SoC - */ - ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt, - IRQF_SHARED, qinst->name, chan); + /* Allocate usage buffer for rx */ + qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL); + if (!qinst->rx_buff) + return -ENOMEM; + /* Request IRQ */ + ret = ti_msgmgr_queue_rx_irq_req(dev, qinst, chan); if (ret) { - dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n", - qinst->irq, qinst->name, ret); + kfree(qinst->rx_buff); return ret; } } @@ -346,8 +393,10 @@ static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan) { struct ti_queue_inst *qinst = chan->con_priv; - if (!qinst->is_tx) + if (!qinst->is_tx) { free_irq(qinst->irq, chan); + kfree(qinst->rx_buff); + } } /** @@ -425,27 +474,6 @@ static int ti_msgmgr_queue_setup(int idx, struct device *dev, dev_name(dev), qinst->is_tx ? "tx" : "rx", qinst->queue_id, qinst->proxy_id); - if (!qinst->is_tx) { - char of_rx_irq_name[7]; - - snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), - "rx_%03d", qinst->queue_id); - - qinst->irq = of_irq_get_byname(np, of_rx_irq_name); - if (qinst->irq < 0) { - dev_crit(dev, - "[%d]QID %d PID %d:No IRQ[%s]: %d\n", - idx, qinst->queue_id, qinst->proxy_id, - of_rx_irq_name, qinst->irq); - return qinst->irq; - } - /* Allocate usage buffer for rx */ - qinst->rx_buff = devm_kzalloc(dev, - d->max_message_size, GFP_KERNEL); - if (!qinst->rx_buff) - return -ENOMEM; - } - qinst->queue_buff_start = inst->queue_proxy_region + Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_first_reg); qinst->queue_buff_end = inst->queue_proxy_region + @@ -454,6 +482,9 @@ static int ti_msgmgr_queue_setup(int idx, struct device *dev, Q_STATE_OFFSET(qinst->queue_id); qinst->chan = chan; + /* Setup an error value for IRQ - Lazy allocation */ + qinst->irq = -EINVAL; + chan->con_priv = qinst; dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n", From patchwork Tue Jun 5 06:16:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137687 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp564702lji; Mon, 4 Jun 2018 23:17:46 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJNOFBp7vN8nbBNG5cZiLt6WueV2x7lHfYeDMMQbB7ULN1RAOVvYWf2CBCkpy9bEIJQjOhO X-Received: by 2002:a17:902:42e4:: with SMTP id h91-v6mr24714975pld.27.1528179466266; Mon, 04 Jun 2018 23:17:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528179466; cv=none; d=google.com; s=arc-20160816; b=R4BatWtdwT6bfq6JUYmKdkABu1U1IojIUp5ACv3+iZUc2DvNxXpisav8DmlgQlAGqR 0gbr65Zet8XJajiIAI0CHIJwUBGqlEp9RezSwJt5u7LG/xZdQ3PY+qisqIPL5/Zmjl1a RXjk+NE/THMZuqbbkspQJki5gG92gVUsoSKMihVFa3D7g3EkBuiYMvK1+Y/k/Rrp5hOZ M4PbN8hTLbaZ/LQCKusUdtmDnNzy+idvbSohkbcMkJgAq1/JSyczW4mrjRwUsKTSZ/cS BZAXBgcGugXTpkhcrJgJy681JydsIBKiP/swS8+ugx3HPc/rFqJeWRFZlTy5/ogNUv1o +JIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=5fAhKAjQIZDu4oHqZEhijDCxeM/M7LYDDlZPVlrTwfE=; b=WIae5kwYpD2jMAHCgCPJBbvE1qwIaN4byKDDCH6SxPSqlf0IFaA4hqcZLVKH5VUE+z JNPI8am/MbKEjllcID9mLNdoPoV8RotDNV43xHzGBzZGJCN5lJMUV1nFSe1wgr+p2vmh LEswiX1UWyB9VfwfGM2q5MaFnWKmtsS0a25IVG2bW/ZtijnoCqL3ESDthiHFOHqnsmJp ytG8V3AHnEb1IEWdgmHGV2kwS1WG8rnizRQU1VlDzuAlnUL99U/MDW867NdOnFFgRVbW FxGTCv+4KrUUqsHi4xkIJJZ9aA1/iSDxuLB7vPFnJz5u+HtGo3L3GRm/bga0BhWtjSDi QJmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=AczVWOs8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This is to support changes for count location for various SoC solutions. Signed-off-by: Nishanth Menon --- drivers/mailbox/ti-msgmgr.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) -- 2.15.1 diff --git a/drivers/mailbox/ti-msgmgr.c b/drivers/mailbox/ti-msgmgr.c index 7221590c409c..2952339a8446 100644 --- a/drivers/mailbox/ti-msgmgr.c +++ b/drivers/mailbox/ti-msgmgr.c @@ -44,6 +44,7 @@ struct ti_msgmgr_valid_queue_desc { * @max_messages: Number of messages * @data_first_reg: First data register for proxy data region * @data_last_reg: Last data register for proxy data region + * @status_cnt_mask: Mask for getting the status value * @tx_polled: Do I need to use polled mechanism for tx * @tx_poll_timeout_ms: Timeout in ms if polled * @valid_queues: List of Valid queues that the processor can access @@ -58,6 +59,7 @@ struct ti_msgmgr_desc { u8 max_messages; u8 data_first_reg; u8 data_last_reg; + u32 status_cnt_mask; bool tx_polled; int tx_poll_timeout_ms; const struct ti_msgmgr_valid_queue_desc *valid_queues; @@ -116,20 +118,24 @@ struct ti_msgmgr_inst { /** * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages + * @d: Description of message manager * @qinst: Queue instance for which we check the number of pending messages * * Return: number of messages pending in the queue (0 == no pending messages) */ -static inline int ti_msgmgr_queue_get_num_messages(struct ti_queue_inst *qinst) +static inline int +ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d, + struct ti_queue_inst *qinst) { u32 val; + u32 status_cnt_mask = d->status_cnt_mask; /* * We cannot use relaxed operation here - update may happen * real-time. */ - val = readl(qinst->queue_state) & Q_STATE_ENTRY_COUNT_MASK; - val >>= __ffs(Q_STATE_ENTRY_COUNT_MASK); + val = readl(qinst->queue_state) & status_cnt_mask; + val >>= __ffs(status_cnt_mask); return val; } @@ -167,8 +173,9 @@ static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) return IRQ_NONE; } + desc = inst->desc; /* Do I actually have messages to read? */ - msg_count = ti_msgmgr_queue_get_num_messages(qinst); + msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); if (!msg_count) { /* Shared IRQ? */ dev_dbg(dev, "Spurious event - 0 pending data!\n"); @@ -181,7 +188,6 @@ static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) * of how many bytes I should be reading. Let the client figure this * out.. I just read the full message and pass it on.. */ - desc = inst->desc; message.len = desc->max_message_size; message.buf = (u8 *)qinst->rx_buff; @@ -224,12 +230,14 @@ static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) { struct ti_queue_inst *qinst = chan->con_priv; + struct device *dev = chan->mbox->dev; + struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); int msg_count; if (qinst->is_tx) return false; - msg_count = ti_msgmgr_queue_get_num_messages(qinst); + msg_count = ti_msgmgr_queue_get_num_messages(inst->desc, qinst); return msg_count ? true : false; } @@ -243,12 +251,14 @@ static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan) { struct ti_queue_inst *qinst = chan->con_priv; + struct device *dev = chan->mbox->dev; + struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); int msg_count; if (!qinst->is_tx) return false; - msg_count = ti_msgmgr_queue_get_num_messages(qinst); + msg_count = ti_msgmgr_queue_get_num_messages(inst->desc, qinst); /* if we have any messages pending.. */ return msg_count ? false : true; @@ -523,6 +533,7 @@ static const struct ti_msgmgr_desc k2g_desc = { .max_messages = 128, .data_first_reg = 16, .data_last_reg = 31, + .status_cnt_mask = Q_STATE_ENTRY_COUNT_MASK, .tx_polled = false, .valid_queues = k2g_valid_queues, .num_valid_queues = ARRAY_SIZE(k2g_valid_queues), From patchwork Tue Jun 5 06:16:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137688 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp564943lji; Mon, 4 Jun 2018 23:17:56 -0700 (PDT) X-Google-Smtp-Source: ADUXVKLQp5mCZY+d+T2tpFVRvpmu8qAlznzGnQZAxtceSTLeC0EE6M3pLv8gNEwMNEOc9hA8OUs3 X-Received: by 2002:a17:902:a9:: with SMTP id a38-v6mr11539509pla.102.1528179476249; Mon, 04 Jun 2018 23:17:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528179476; cv=none; d=google.com; s=arc-20160816; b=mvEqpp5v+zpLtHT6ztTk/v08AY6KJT+g7K9srhrvy6tci7NJMloCRV342SMEQhZFUq +WepqXC/5IvCktRkMJNC3S+ldb94B32tfq4ZA/DF/0tErq+MLksrOmIMH0W6P6Dtid0n F85q1IloaryIj60KW8q5kgt/qaRMY9Fg7fJBCYaDGKmJNsgG0y8xHAdiNmMLHPyLNmZJ my+QlRNYOEI1xHkc7ikH7D7N6B14LSkyJeXQujg173u5TH7TkIakIWC2lt2lz2Cac4VP us3cNZqdw515zWH+rwfLH9kuOGlHiOZn3DuhSVbaWipFUn1a5hw0IMZJaqRpKdi5jXrK vT2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=O8ZNcOMuOsPfeZITroPBICqQNP6wPrsEiJ0XOz3WzXw=; b=wu/Wbld397+4bj2p8Qm16U0OCpFUyD97TWaZS3Zm3js46/UDT4JGSlnK9wzL7o6gKj ay6lsByRwpdzZ3qJ/cZSSL1S1IcU7bw81TvvYYiyPrLjR4R1gIqRdiYr7gQ+mUUWjna7 EG0fqwc3EAJdUywXD4VISCQKcPnK/Cf/m1gzC+f7jg5YGdeejYgXTmYCup625H3UCe2n gXWw/yYT/1sEr8Ma6ffHbWR5T+PE69zAW6FLBzShlSSp6vzbxJX4lvvKG9RrdlW/xHAP wTmmPMqNVpkcni9iXpOux7kUYIEc3ZU5ja+x5ktCaMEjN0c3VyqANU09Xyl1W9P6GqEY 6ZFA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aWWIJZhO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ca5-v6si13126942plb.143.2018.06.04.23.17.56; Mon, 04 Jun 2018 23:17:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aWWIJZhO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751786AbeFEGRm (ORCPT + 30 others); Tue, 5 Jun 2018 02:17:42 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:42687 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751818AbeFEGQs (ORCPT ); Tue, 5 Jun 2018 02:16:48 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w556GT8A026975; Tue, 5 Jun 2018 01:16:29 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528179389; bh=O8ZNcOMuOsPfeZITroPBICqQNP6wPrsEiJ0XOz3WzXw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=aWWIJZhOlrD6rqp0CuAmLD2IVasnTJO9O0M7jF9/DPwhG8j7RJCiqJCKaEuiS1XNY 8Mqj8VWKf1PI+pAgSllm8YPcc7OyJuXsp8ZdxKXbV8ViJ+9dQ8AqlX5uYv7W//0imW v8n8FlWgLrilppta0GTI6lBvF+oOUwb5xZJvieLI= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTla015149; Tue, 5 Jun 2018 01:16:29 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:16:29 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:16:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTuM016948; Tue, 5 Jun 2018 01:16:29 -0500 From: Nishanth Menon To: Jassi Brar , Rob Herring CC: , , , Nishanth Menon , Tero Kristo , Suman Anna Subject: [RFC PATCH 5/8] dt-bindings: mailbox: ti, message-manager: Add support for secure proxy threads Date: Tue, 5 Jun 2018 01:16:26 -0500 Message-ID: <20180605061629.4759-6-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605061629.4759-1-nm@ti.com> References: <20180605061629.4759-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Secure Proxy is another communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller. Secure proxy is, in effect, an evolution of current generation Message Manager hardware block found in K2G devices. However the following changes have taken place: Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated. Each Secure proxy thread can uniquely have their own error and threshold interrupts allowing for more fine control of IRQ handling. Provide an hardware description of the same for device tree representation. See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon --- .../bindings/mailbox/ti,message-manager.txt | 58 +++++++++++++++++++--- 1 file changed, 50 insertions(+), 8 deletions(-) -- 2.15.1 diff --git a/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt b/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt index ebf0e3710cee..de796e90cac6 100644 --- a/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt +++ b/Documentation/devicetree/bindings/mailbox/ti,message-manager.txt @@ -7,22 +7,40 @@ manager is broken up into queues in different address regions that are called "proxies" - each instance is unidirectional and is instantiated at SoC integration level to indicate receive or transmit path. +This can also be used to describe Texas Instrument's Secure Proxy +controller that allows for individually configurable "threads" or +"proxies" which allow for independent communication scheme. + Message Manager Device Node: =========================== Required properties: -------------------- -- compatible: Shall be: "ti,k2g-message-manager" -- reg-names queue_proxy_region - Map the queue proxy region. - queue_state_debug_region - Map the queue state debug - region. +- compatible: Shall be one of: "ti,k2g-message-manager", + "ti,am654-secure-proxy" +- reg-names for ti,k2g-message-manager, the following shall exist: + queue_proxy_region - Map the queue proxy region. + queue_state_debug_region - Map the queue state + debug region. + for ti,am654-secure-proxy, the following shall exist: + target_data - Map the proxy data region + rt - Map the realtime status region + scfg - Map the configuration region - reg: Contains the register map per reg-names. -- #mbox-cells Shall be 2. Contains the queue ID and proxy ID in that - order referring to the transfer path. +- #mbox-cells for ti,k2g-message-manager, Shall be 2. Contains the + queue ID and proxy ID in the following order referring + to the transfer path: + queue_proxy_region - Map the queue proxy region. + queue_state_debug_region - Map the queue state + debug region. + for ti,am654-secure-proxy, Shall be 1 and shall refer + to the transfer path called thread. - interrupt-names: Contains interrupt names matching the rx transfer path for a given SoC. Receive interrupts shall be of the - format: "rx_". - For ti,k2g-message-manager, this shall contain: + format: + For ti,k2g-message-manager, this shall be: "rx_" + and shall contain: "rx_005", "rx_057" + for ti,am654-secure-proxy, this shall be: "rx_". - interrupts: Contains the interrupt information corresponding to interrupt-names property. @@ -48,3 +66,27 @@ Example(K2G): <&msgmgr 0 0>; [...] }; + +Example(AM654): +------------ + + secure_proxy: secure_proxy@32c00000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "target_data", "rt", "scfg"; + reg = <0x0 0x32c00000 0x0 0x100000>, + <0x0 0x32400000 0x0 0x100000>, + <0x0 0x32800000 0x0 0x100000>; + interrupt-names = "rx_011"; + interrupts = ; + }; + + dmsc: dmsc { + [...] + mbox-names = "rx", "tx"; + # RX Thread ID is 11 + # TX Thread ID is 13 + mboxes= <&secure_proxy 11>, + <&secure_proxy 13>; + [...] + }; From patchwork Tue Jun 5 06:16:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137686 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp563960lji; Mon, 4 Jun 2018 23:17:08 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKcE0W3FUJDyLLar/niZsIK1XwFod2omSwZGb+gHVFk0fE9dfX8Odlf+npgMejaMphTcB6U X-Received: by 2002:a17:902:7603:: with SMTP id k3-v6mr21627333pll.371.1528179428561; Mon, 04 Jun 2018 23:17:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528179428; cv=none; d=google.com; s=arc-20160816; b=xEnjwC1ZUdnJKSBMHAU8vKIcyQRDJH36Or338Gt5rYgCXyCNq56wd07pmDDgOmod9u 3/ictLbUPYGDeufX+T/t49Nk9WYVKVvWXI09LZK+UBiEgvMLgQTGsisGwMafM3UrnhTq QWCTHROpMWmUZFn71NCaL6rPbv0U2t8KIWOPdFnkRUhlEtYZ4DYM1U06NbXm1i/zXkyw vOC6X23BU0ohQnulqVBBdodPBKjZ61N1Df0M0vvyddMYs5xHdlbj2zXid4nWxhnEZAmt 83jzJGZWEXOJvrr9krzCZqBVGA+DlnvV4H3WGtGS58Eft4Pf9uuqpbL7nu5hRrdBmRZo P+8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=GOYWif38keMI0ktNM1nk5z7fu/ErZY/J5N5DSTiqoHg=; b=q+YLc+yJJcb2krWS/C4oAnLZLlmJjPREDLF53aaqvdx6TJ3f2Kvx+KQeacI1ZBvg1E hEotPObqlM6nG289MR5hfpiheD1xc5tOAuyO9rjRL3aitah6abHmCQm/0/egSPcNWLSl FSkKUShRodfNX5P5FtdB7rwkCQ/yzO4RACbsiM3GFB/Pv7Pyp8uotKfHuhGIwPMqcBRR u9Q40ypZXulS/TyKKSvzr+KgzCaKweTXzyqdST7C9jkr0Dd3XQo9aHc44fNWEYM2Mo/V wz5i4BjC8V2GTmo4ANwaAeE12tTDlJ5o/HF3ajp6OegClpz8TNbPk4IyA4vPp3U9whBB KwdQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=On9RwlxZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bd1-v6si5700029plb.338.2018.06.04.23.17.08; Mon, 04 Jun 2018 23:17:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=On9RwlxZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751599AbeFEGRG (ORCPT + 30 others); Tue, 5 Jun 2018 02:17:06 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:42693 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751473AbeFEGRC (ORCPT ); Tue, 5 Jun 2018 02:17:02 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w556GUaC026979; Tue, 5 Jun 2018 01:16:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1528179390; bh=GOYWif38keMI0ktNM1nk5z7fu/ErZY/J5N5DSTiqoHg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=On9RwlxZcvHzVMmbRgJuoNeKN7pOucI8Ttr39kv1gVolQ1udeUMrmGJjM5GogvOg2 n+Y7qZOrmErs+JTRlvmzAwCF090jKEcE4DqUNSPhoHTh0yvW0DF9o208JxMEQ75a21 L1E8ecU8w+uP02Yk3Y2YkPIeShaHguomsY/JGha0= Received: from DLEE102.ent.ti.com (dlee102.ent.ti.com [157.170.170.32]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTHu000829; Tue, 5 Jun 2018 01:16:29 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 5 Jun 2018 01:16:29 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 5 Jun 2018 01:16:29 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w556GTvB024167; Tue, 5 Jun 2018 01:16:29 -0500 From: Nishanth Menon To: Jassi Brar , Rob Herring CC: , , , Nishanth Menon , Tero Kristo , Suman Anna Subject: [RFC PATCH 6/8] mailbox: ti-msgmgr: Add support for Secure Proxy Date: Tue, 5 Jun 2018 01:16:27 -0500 Message-ID: <20180605061629.4759-7-nm@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180605061629.4759-1-nm@ti.com> References: <20180605061629.4759-1-nm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Secure Proxy is another communication scheme in Texas Instrument's devices intended to provide an unique communication path from various processors in the System on Chip(SoC) to a central System Controller. Secure proxy is, in effect, an evolution of current generation Message Manager hardware block found in K2G devices. However the following changes have taken place: Secure Proxy instance exposes "threads" or "proxies" which is primary representation of "a" communication channel. Each thread is preconfigured by System controller configuration based on SoC usage requirements. Secure proxy by itself represents a single "queue" of communication but allows the proxies to be independently operated. Each Secure proxy thread can uniquely have their own error and threshold interrupts allowing for more fine control of IRQ handling. Provide the driver support for Secure Proxy and thread instances. NOTE: Secure proxy configuration is only done by System Controller, hence these are assumed to be pre-configured instances. See AM65x Technical Reference Manual (SPRUID7, April 2018) for further details: http://www.ti.com/lit/pdf/spruid7 Signed-off-by: Nishanth Menon --- drivers/mailbox/ti-msgmgr.c | 233 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 205 insertions(+), 28 deletions(-) -- 2.15.1 diff --git a/drivers/mailbox/ti-msgmgr.c b/drivers/mailbox/ti-msgmgr.c index a37d6a4b392f..3e30b80c6401 100644 --- a/drivers/mailbox/ti-msgmgr.c +++ b/drivers/mailbox/ti-msgmgr.c @@ -25,6 +25,17 @@ #define Q_STATE_OFFSET(queue) ((queue) * 0x4) #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000) +#define SPROXY_THREAD_OFFSET(tid) (0x1000 * (tid)) +#define SPROXY_THREAD_DATA_OFFSET(tid, reg) \ + (SPROXY_THREAD_OFFSET(tid) + ((reg) * 0x4) + 0x4) + +#define SPROXY_THREAD_STATUS_OFFSET(tid) (SPROXY_THREAD_OFFSET(tid)) + +#define SPROXY_THREAD_STATUS_COUNT_MASK (0xFF) + +#define SPROXY_THREAD_CTRL_OFFSET(tid) (0x1000 + SPROXY_THREAD_OFFSET(tid)) +#define SPROXY_THREAD_CTRL_DIR_MASK (0x1 << 31) + /** * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor * @queue_id: Queue Number for this path @@ -45,12 +56,15 @@ struct ti_msgmgr_valid_queue_desc { * @data_first_reg: First data register for proxy data region * @data_last_reg: Last data register for proxy data region * @status_cnt_mask: Mask for getting the status value + * @status_err_mask: Mask for getting the error value, if applicable * @tx_polled: Do I need to use polled mechanism for tx * @tx_poll_timeout_ms: Timeout in ms if polled * @valid_queues: List of Valid queues that the processor can access * @data_region_name: Name of the proxy data region * @status_region_name: Name of the proxy status region + * @ctrl_region_name: Name of the proxy control region * @num_valid_queues: Number of valid queues + * @is_sproxy: Is this an Secure Proxy instance? * * This structure is used in of match data to describe how integration * for a specific compatible SoC is done. @@ -62,12 +76,15 @@ struct ti_msgmgr_desc { u8 data_first_reg; u8 data_last_reg; u32 status_cnt_mask; + u32 status_err_mask; bool tx_polled; int tx_poll_timeout_ms; const struct ti_msgmgr_valid_queue_desc *valid_queues; const char *data_region_name; const char *status_region_name; + const char *ctrl_region_name; int num_valid_queues; + bool is_sproxy; }; /** @@ -80,6 +97,7 @@ struct ti_msgmgr_desc { * @queue_buff_start: First register of Data Buffer * @queue_buff_end: Last (or confirmation) register of Data buffer * @queue_state: Queue status register + * @queue_ctrl: Queue Control register * @chan: Mailbox channel * @rx_buff: Receive buffer pointer allocated at probe, max_message_size */ @@ -92,6 +110,7 @@ struct ti_queue_inst { void __iomem *queue_buff_start; void __iomem *queue_buff_end; void __iomem *queue_state; + void __iomem *queue_ctrl; struct mbox_chan *chan; u32 *rx_buff; }; @@ -102,6 +121,7 @@ struct ti_queue_inst { * @desc: Description of the SoC integration * @queue_proxy_region: Queue proxy region where queue buffers are located * @queue_state_debug_region: Queue status register regions + * @queue_ctrl_region: Queue Control register regions * @num_valid_queues: Number of valid queues defined for the processor * Note: other queues are probably reserved for other processors * in the SoC. @@ -114,6 +134,7 @@ struct ti_msgmgr_inst { const struct ti_msgmgr_desc *desc; void __iomem *queue_proxy_region; void __iomem *queue_state_debug_region; + void __iomem *queue_ctrl_region; u8 num_valid_queues; struct ti_queue_inst *qinsts; struct mbox_controller mbox; @@ -144,6 +165,31 @@ ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d, return val; } +/** + * ti_msgmgr_queue_is_error() - Check to see if there is queue error + * @d: Description of message manager + * @qinst: Queue instance for which we check the number of pending messages + * + * Return: true if error, else false + */ +static inline bool ti_msgmgr_queue_is_error(const struct ti_msgmgr_desc *d, + struct ti_queue_inst *qinst) +{ + u32 val; + + /* Msgmgr has no error detection */ + if (!d->is_sproxy) + return false; + + /* + * We cannot use relaxed operation here - update may happen + * real-time. + */ + val = readl(qinst->queue_state) & d->status_err_mask; + + return val ? true : false; +} + /** * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue * @irq: Interrupt number @@ -178,6 +224,11 @@ static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) } desc = inst->desc; + if (ti_msgmgr_queue_is_error(desc, qinst)) { + dev_err(dev, "Error on Rx channel %s\n", qinst->name); + return IRQ_NONE; + } + /* Do I actually have messages to read? */ msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); if (!msg_count) { @@ -236,12 +287,18 @@ static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) struct ti_queue_inst *qinst = chan->con_priv; struct device *dev = chan->mbox->dev; struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); + const struct ti_msgmgr_desc *desc = inst->desc; int msg_count; if (qinst->is_tx) return false; - msg_count = ti_msgmgr_queue_get_num_messages(inst->desc, qinst); + if (ti_msgmgr_queue_is_error(desc, qinst)) { + dev_err(dev, "Error on channel %s\n", qinst->name); + return false; + } + + msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); return msg_count ? true : false; } @@ -257,12 +314,23 @@ static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan) struct ti_queue_inst *qinst = chan->con_priv; struct device *dev = chan->mbox->dev; struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); + const struct ti_msgmgr_desc *desc = inst->desc; int msg_count; if (!qinst->is_tx) return false; - msg_count = ti_msgmgr_queue_get_num_messages(inst->desc, qinst); + if (ti_msgmgr_queue_is_error(desc, qinst)) { + dev_err(dev, "Error on channel %s\n", qinst->name); + return false; + } + + msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); + + if (desc->is_sproxy) { + /* In secure proxy, msg_count indicates how many we can send */ + return msg_count ? true : false; + } /* if we have any messages pending.. */ return msg_count ? false : true; @@ -292,6 +360,11 @@ static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) } desc = inst->desc; + if (ti_msgmgr_queue_is_error(desc, qinst)) { + dev_err(dev, "Error on channel %s\n", qinst->name); + return false; + } + if (desc->max_message_size < message->len) { dev_err(dev, "Queue %s message length %zu > max %d\n", qinst->name, message->len, desc->max_message_size); @@ -327,10 +400,12 @@ static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) /** * ti_msgmgr_queue_rx_irq_req() - RX IRQ request * @dev: device pointer + * @d: descriptor for ti_msgmgr * @qinst: Queue instance * @chan: Channel pointer */ static int ti_msgmgr_queue_rx_irq_req(struct device *dev, + const struct ti_msgmgr_desc *d, struct ti_queue_inst *qinst, struct mbox_chan *chan) { @@ -339,7 +414,7 @@ static int ti_msgmgr_queue_rx_irq_req(struct device *dev, struct device_node *np; snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), - "rx_%03d", qinst->queue_id); + "rx_%03d", d->is_sproxy ? qinst->proxy_id : qinst->queue_id); /* Get the IRQ if not found */ if (qinst->irq < 0) { @@ -382,6 +457,24 @@ static int ti_msgmgr_queue_startup(struct mbox_chan *chan) struct ti_queue_inst *qinst = chan->con_priv; const struct ti_msgmgr_desc *d = inst->desc; int ret; + int msg_count; + + /* + * If sproxy is starting and can send messages, we are a Tx thread, + * else Rx + */ + if (d->is_sproxy) { + qinst->is_tx = (readl(qinst->queue_ctrl) & + SPROXY_THREAD_CTRL_DIR_MASK) ? false : true; + + msg_count = ti_msgmgr_queue_get_num_messages(d, qinst); + + if (!msg_count && qinst->is_tx) { + dev_err(dev, "%s: Cannot transmit with 0 credits!\n", + qinst->name); + return -EINVAL; + } + } if (!qinst->is_tx) { /* Allocate usage buffer for rx */ @@ -389,7 +482,7 @@ static int ti_msgmgr_queue_startup(struct mbox_chan *chan) if (!qinst->rx_buff) return -ENOMEM; /* Request IRQ */ - ret = ti_msgmgr_queue_rx_irq_req(dev, qinst, chan); + ret = ti_msgmgr_queue_rx_irq_req(dev, d, qinst, chan); if (ret) { kfree(qinst->rx_buff); return ret; @@ -427,20 +520,38 @@ static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox, struct ti_msgmgr_inst *inst; int req_qid, req_pid; struct ti_queue_inst *qinst; - int i; + const struct ti_msgmgr_desc *d; + int i, ncells; inst = container_of(mbox, struct ti_msgmgr_inst, mbox); if (WARN_ON(!inst)) return ERR_PTR(-EINVAL); - /* #mbox-cells is 2 */ - if (p->args_count != 2) { - dev_err(inst->dev, "Invalid arguments in dt[%d] instead of 2\n", - p->args_count); + d = inst->desc; + + if (d->is_sproxy) + ncells = 1; + else + ncells = 2; + if (p->args_count != ncells) { + dev_err(inst->dev, "Invalid arguments in dt[%d]. Must be %d\n", + p->args_count, ncells); return ERR_PTR(-EINVAL); } - req_qid = p->args[0]; - req_pid = p->args[1]; + if (ncells == 1) { + req_qid = 0; + req_pid = p->args[0]; + } else { + req_qid = p->args[0]; + req_pid = p->args[1]; + } + + if (d->is_sproxy) { + if (req_pid > d->num_valid_queues) + goto err; + qinst = &inst->qinsts[req_pid]; + return qinst->chan; + } for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; i++, qinst++) { @@ -448,6 +559,7 @@ static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox, return qinst->chan; } +err: dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %s\n", req_qid, req_pid, p->np->name); return ERR_PTR(-ENOENT); @@ -474,6 +586,8 @@ static int ti_msgmgr_queue_setup(int idx, struct device *dev, struct ti_queue_inst *qinst, struct mbox_chan *chan) { + char *dir; + qinst->proxy_id = qd->proxy_id; qinst->queue_id = qd->queue_id; @@ -483,17 +597,38 @@ static int ti_msgmgr_queue_setup(int idx, struct device *dev, return -ERANGE; } - qinst->is_tx = qd->is_tx; - snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d", - dev_name(dev), qinst->is_tx ? "tx" : "rx", qinst->queue_id, - qinst->proxy_id); - - qinst->queue_buff_start = inst->queue_proxy_region + - Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_first_reg); - qinst->queue_buff_end = inst->queue_proxy_region + - Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, d->data_last_reg); - qinst->queue_state = inst->queue_state_debug_region + - Q_STATE_OFFSET(qinst->queue_id); + if (d->is_sproxy) { + qinst->queue_buff_start = inst->queue_proxy_region + + SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id, + d->data_first_reg); + qinst->queue_buff_end = inst->queue_proxy_region + + SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id, + d->data_last_reg); + qinst->queue_state = inst->queue_state_debug_region + + SPROXY_THREAD_STATUS_OFFSET(qinst->proxy_id); + qinst->queue_ctrl = inst->queue_ctrl_region + + SPROXY_THREAD_CTRL_OFFSET(qinst->proxy_id); + + /* XXX: DONOT read registers here!.. Some may be unusable */ + dir = "thr"; + snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d", + dev_name(dev), dir, qinst->proxy_id); + } else { + qinst->queue_buff_start = inst->queue_proxy_region + + Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, + d->data_first_reg); + qinst->queue_buff_end = inst->queue_proxy_region + + Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, + d->data_last_reg); + qinst->queue_state = + inst->queue_state_debug_region + + Q_STATE_OFFSET(qinst->queue_id); + qinst->is_tx = qd->is_tx; + dir = qinst->is_tx ? "tx" : "rx"; + snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d", + dev_name(dev), dir, qinst->queue_id, qinst->proxy_id); + } + qinst->chan = chan; /* Setup an error value for IRQ - Lazy allocation */ @@ -543,12 +678,29 @@ static const struct ti_msgmgr_desc k2g_desc = { .tx_polled = false, .valid_queues = k2g_valid_queues, .num_valid_queues = ARRAY_SIZE(k2g_valid_queues), + .is_sproxy = false, +}; + +static const struct ti_msgmgr_desc am654_desc = { + .queue_count = 190, + .num_valid_queues = 190, + .max_message_size = 60, + .data_region_name = "target_data", + .status_region_name = "rt", + .ctrl_region_name = "scfg", + .data_first_reg = 0, + .data_last_reg = 14, + .status_cnt_mask = SPROXY_THREAD_STATUS_COUNT_MASK, + .tx_polled = false, + .is_sproxy = true, }; static const struct of_device_id ti_msgmgr_of_match[] = { {.compatible = "ti,k2g-message-manager", .data = &k2g_desc}, + {.compatible = "ti,am654-secure-proxy", .data = &am654_desc}, { /* Sentinel */ } }; + MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match); static int ti_msgmgr_probe(struct platform_device *pdev) @@ -599,6 +751,14 @@ static int ti_msgmgr_probe(struct platform_device *pdev) if (IS_ERR(inst->queue_state_debug_region)) return PTR_ERR(inst->queue_state_debug_region); + if (desc->is_sproxy) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + desc->ctrl_region_name); + inst->queue_ctrl_region = devm_ioremap_resource(dev, res); + if (IS_ERR(inst->queue_ctrl_region)) + return PTR_ERR(inst->queue_ctrl_region); + } + dev_dbg(dev, "proxy region=%p, queue_state=%p\n", inst->queue_proxy_region, inst->queue_state_debug_region); @@ -620,12 +780,29 @@ static int ti_msgmgr_probe(struct platform_device *pdev) return -ENOMEM; inst->chans = chans; - for (i = 0, queue_desc = desc->valid_queues; - i < queue_count; i++, qinst++, chans++, queue_desc++) { - ret = ti_msgmgr_queue_setup(i, dev, np, inst, - desc, queue_desc, qinst, chans); - if (ret) - return ret; + if (desc->is_sproxy) { + struct ti_msgmgr_valid_queue_desc sproxy_desc; + + /* All proxies may be valid in Secure Proxy instance */ + for (i = 0; i < queue_count; i++, qinst++, chans++) { + sproxy_desc.queue_id = 0; + sproxy_desc.proxy_id = i; + ret = ti_msgmgr_queue_setup(i, dev, np, inst, + desc, &sproxy_desc, qinst, + chans); + if (ret) + return ret; + } + } else { + /* Only Some proxies are valid in Message Manager */ + for (i = 0, queue_desc = desc->valid_queues; + i < queue_count; i++, qinst++, chans++, queue_desc++) { + ret = ti_msgmgr_queue_setup(i, dev, np, inst, + desc, queue_desc, qinst, + chans); + if (ret) + return ret; + } } mbox = &inst->mbox; From patchwork Tue Jun 5 06:16:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 137685 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp563822lji; Mon, 4 Jun 2018 23:17:01 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJ/AGfyO2oRK0xJ8dv20n1VqY+QlPTygOpIWb3fZb+ffTlIdTRd+FQ/uDGjOgXvG6MXi5ad X-Received: by 2002:a17:902:622:: with SMTP id 31-v6mr25009273plg.135.1528179421224; Mon, 04 Jun 2018 23:17:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528179421; cv=none; d=google.com; s=arc-20160816; b=qUOwMJ+QVv4E/6WTCdfT7h1iR2HRvxpjZiKGZdcemUvqdypdYl1yJg6E7zF6kguUay xD06EJdnCj+o7+y2jXcr3KhLyO+D2bufJEHtQ2NF3Wz8tOKB4u9jpqMdv3GKaLEkwrXA pIzr/XEcxIIh8Aii6LKo5cYzRpAz7ubemHQjJ4m/QeY84VGvztSWUumkWA8iF1iTGnFk aKopEOtkvHYLOI1TnlIaTZXZx12aZLxUQmQfwBtg0P3G4S2H3p3dfXB0Td8jkGJ9ZXrM qpNDxkj2LyCYuDae/EjVRtOGcxugcKFtOhKHglKXyb/zP+bjFO+fKPmoATjYmgbfrr60 q00w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=fnEpra/TO48PQG4o+ZmTGoI89drfluH6ChkCKTdLhok=; b=dNu4OgHZjPCMbNwPsOGJTH7FMOSnat8oHD6342djCBtO5e77NG0tbspQ28Fh2ATdg2 fBTdqQqUGEAEGr/3ajPDsIq3MA8Nb7w7a6FM71xPBTdZKwTt8sAwIfXoe1UoCrgnvhEF Y5kZY+T/DhM2OUCBdiPtFY+yOUB4cSP5YVNIwe9ZZ2Ak2zH/ILzj08Xoni+Puf6wCT4v sguCtK0l0Xy3Sz6ZWA+wsR1mz+aQ06L7HJmsYtTeAqWqWuMNmW2wQVTwk7HjgTAlYaZe z627pDJo+QixAhXxPHJ7ksxopiRJ+WuMhdSkjQX4o5nFGaNX0MB5sBCkxWBKD3kZgB6r JyPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=IakWFc9G; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Nishanth Menon --- drivers/mailbox/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.15.1 diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index 725dce5ba62d..f87a857d21a5 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -99,12 +99,12 @@ config STI_MBOX config TI_MESSAGE_MANAGER tristate "Texas Instruments Message Manager Driver" - depends on ARCH_KEYSTONE + depends on ARCH_KEYSTONE || ARCH_K3 help An implementation of Message Manager slave driver for Keystone - architecture SoCs from Texas Instruments. Message Manager is a - communication entity found on few of Texas Instrument's keystone - architecture SoCs. These may be used for communication between + and K3 architecture SoCs from Texas Instruments. Message Manager + is a communication entity found on few of Texas Instrument's keystone + and K3 architecture SoCs. These may be used for communication between multiple processors within the SoC. Select this driver if your platform has support for the hardware block.