From patchwork Mon Jun 11 17:10:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 138263 Delivered-To: patches@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp4300869lji; Mon, 11 Jun 2018 10:10:13 -0700 (PDT) X-Google-Smtp-Source: ADUXVKK178lpDK91pZeb8l10qfa+SdSn8JEXj4K4z1EA3vZHY6FcT8KVhYXnrA5uTUVftb2m4azc X-Received: by 2002:a5d:4b4b:: with SMTP id w11-v6mr11724wrs.87.1528737013822; Mon, 11 Jun 2018 10:10:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528737013; cv=none; d=google.com; s=arc-20160816; b=xYRmCenyWptyJG30566mjRr9k/wXlon04bSHdaAwHAStva9uF8qrWXPzaC8xnh333Z pP2cQFR2rwz9zelgA0NL6h+8WArEVfRRENXd5sPK9xUyCj69RqleHKbJmi2Pq+OpBrix B5EmdJxPMSnPXoDWx03Xr7ur9vV9UDP15tcCRAMvUhFEJ/tk3SgXyVks3I3b8RxpfJGe tUP0L8glxLh2ktkcYnvemCudCMdIcOZDv3B2qO4PXvTnu/DH2TILgdZcS5fmyl1pG2df I4qQqAu1rUh7uDqRcIa+gSF6KUjpgyrV469WFyZoNXJQEUOW/QlAHLihHoMbfszucfdB eXqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ldLhSXSdL2/zIgbbBQx0AeI/BJvYdFXG7xMBW+/XF3w=; b=AcUeRCzhXddrKQGU4lHd0qijkSNc6pAnsqt6FOAU192zOcCrwM42kfPAmR0VGdj6CF rB4Ctze60sKnyQfVLgazUwQPdGViTfmWn5U29h4Ky172ec3zKK1JIRgxgtKxI88JsK/t jJbE6puYq+qlIVYeaqWtbO23APIi+cjnpgUlrfVCEtc0oKdqZZCW15uqPFylBfaIUEvQ 1HN/PqFS5woCwlfjVIUsl0wl2muUBXh8F+t/ZmbyaQOSCod+aaXBblGUJ6t4BnfUF+0I /SW7C2BDGwh4zMn9gil4uve/S/CarBENutRfH1njG7kkOb9arqnJuSJoaKSRq515RZlK 3zgg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id k8-v6si14651104wrk.440.2018.06.11.10.10.13 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Jun 2018 10:10:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fSQKb-0007Ea-9v; Mon, 11 Jun 2018 18:10:13 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , Paolo Bonzini Subject: [PATCH 1/3] bswap: Add new stn_*_p() and ldn_*_p() memory access functions Date: Mon, 11 Jun 2018 18:10:05 +0100 Message-Id: <20180611171007.4165-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180611171007.4165-1-peter.maydell@linaro.org> References: <20180611171007.4165-1-peter.maydell@linaro.org> There's a common pattern in QEMU where a function needs to perform a data load or store of an N byte integer in a particular endianness. At the moment this is handled by doing a switch() on the size and calling the appropriate ld*_p or st*_p function for each size. Provide a new family of functions ldn_*_p() and stn_*_p() which take the size as an argument and do the switch() themselves. Signed-off-by: Peter Maydell --- include/exec/cpu-all.h | 4 +++ include/qemu/bswap.h | 52 +++++++++++++++++++++++++++++++++++++ docs/devel/loads-stores.rst | 15 +++++++++++ 3 files changed, 71 insertions(+) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index a635f532f97..07ec3808342 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -133,6 +133,8 @@ static inline void tswap64s(uint64_t *s) #define stq_p(p, v) stq_be_p(p, v) #define stfl_p(p, v) stfl_be_p(p, v) #define stfq_p(p, v) stfq_be_p(p, v) +#define ldn_p(p, sz ldn_be_p(p, sz) +#define stn_p(p, sz, v) stn_be_p(p, sz, v) #else #define lduw_p(p) lduw_le_p(p) #define ldsw_p(p) ldsw_le_p(p) @@ -145,6 +147,8 @@ static inline void tswap64s(uint64_t *s) #define stq_p(p, v) stq_le_p(p, v) #define stfl_p(p, v) stfl_le_p(p, v) #define stfq_p(p, v) stfq_le_p(p, v) +#define ldn_p(p, sz) ldn_le_p(p, sz) +#define stn_p(p, sz, v) stn_le_p(p, sz, v) #endif /* MMU memory access macros */ diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 3f28f661b15..a684c1a7a29 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -290,6 +290,15 @@ typedef union { * For accessors that take a guest address rather than a * host address, see the cpu_{ld,st}_* accessors defined in * cpu_ldst.h. + * + * For cases where the size to be used is not fixed at compile time, + * there are + * stn{endian}_p(ptr, sz, val) + * which stores @val to @ptr as an @endian-order number @sz bytes in size + * and + * ldn{endian}_p(ptr, sz) + * which loads @sz bytes from @ptr as an unsigned @endian-order number + * and returns it in a uint64_t. */ static inline int ldub_p(const void *ptr) @@ -495,6 +504,49 @@ static inline unsigned long leul_to_cpu(unsigned long v) #endif } +/* Store v to p as a sz byte value in host order */ +#define DO_STN_LDN_P(END) \ + static inline void stn_## END ## _p(void *ptr, int sz, uint64_t v) \ + { \ + switch (sz) { \ + case 1: \ + stb_p(ptr, v); \ + break; \ + case 2: \ + stw_ ## END ## _p(ptr, v); \ + break; \ + case 4: \ + stl_ ## END ## _p(ptr, v); \ + break; \ + case 8: \ + stq_ ## END ## _p(ptr, v); \ + break; \ + default: \ + g_assert_not_reached(); \ + } \ + } \ + static inline uint64_t ldn_## END ## _p(const void *ptr, int sz) \ + { \ + switch (sz) { \ + case 1: \ + return ldub_p(ptr); \ + case 2: \ + return lduw_ ## END ## _p(ptr); \ + case 4: \ + return (uint32_t)ldl_ ## END ## _p(ptr); \ + case 8: \ + return ldq_ ## END ## _p(ptr); \ + default: \ + g_assert_not_reached(); \ + } \ + } + +DO_STN_LDN_P(he) +DO_STN_LDN_P(le) +DO_STN_LDN_P(be) + +#undef DO_STN_LDN_P + #undef le_bswap #undef be_bswap #undef le_bswaps diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index 6a990cc2438..57d8c524bfe 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -53,9 +53,24 @@ The ``_{endian}`` infix is omitted for target-endian accesses. The target endian accessors are only available to source files which are built per-target. +There are also functions which take the size as an argument: + +load: ``ldn{endian}_p(ptr, sz)`` + +which performs an unsigned load of ``sz`` bytes from ``ptr`` +as an ``{endian}`` order value and returns it in a uint64_t. + +store: ``stn{endian}_p(ptr, sz, val)`` + +which stores ``val`` to ``ptr`` as an ``{endian}`` order value +of size ``sz`` bytes. + + Regexes for git grep - ``\`` - ``\`` + - ``\`` + - ``\`` ``cpu_{ld,st}_*`` ~~~~~~~~~~~~~~~~~ From patchwork Mon Jun 11 17:10:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 138264 Delivered-To: patches@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp4300880lji; Mon, 11 Jun 2018 10:10:14 -0700 (PDT) X-Google-Smtp-Source: ADUXVKI4o1n83c0JI8A3+Cll0J7oxWNbcppBgyEqejAMTsbeAlhHazJqr8H54rD3En7mrIPNk46k X-Received: by 2002:a1c:aac5:: with SMTP id t188-v6mr1276wme.109.1528737014509; Mon, 11 Jun 2018 10:10:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528737014; cv=none; d=google.com; s=arc-20160816; b=AXfYpOS7QTkR82uN3irqmKJ/FCP5Xc11kY8cWj2+sXj7ChYiADBJGNJNO7kmC63woE kGqC3NtnEum6NQbpqYxDcm43iH7QHCXOEgKLBCE1mzLCHr1qEbPJDBxrs6qUwTRNIAiI bRgabK7su7uJ2vO9tpa0HoeYBsXwTziY5vxTG5FtjiQJJwW3E5xl62vADhlO6ZNEueTa 95GNmj9r5b+vZP+JSW/jTCxKNCN+g2vZZcNxSaEToCTDviZPU19rx31wZZ+9tjALVAPG 4a4m7ugToBE6T/WW99G7Yh2/z5u03ry2PjhGbbjed2bl4V+DadkGDnedy/pz0lkLCm/r OMCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=94UzCZPyGfUFEkrLTyMrzM8AOxG1Y35RAkuC5TAQaVY=; b=kKDaEivCby6c7gP2svqSTyHtx4hzU2pwGc4L/z8vmIPEIPb8xDYXZcd/zdfZ7R7OMF 96rdD38bvPaDzpWlBcRlJMtMTGwlIWhmKyUy4X6AyBTnPJLhDU24I39C4jrTUt/VmrEu t6dTChO98Z3tEAzQMLJsTWq5kzG5Ilkxk5PKTSTrUUnqwazI+jpOWH5ulOLMAzLxTJNF WpvNdGHbR2HNpkJRhRpkQz1504LyNT10PVjSzn4g6ebq2HYVUZdlwuwh9hhSMca3FA6J O9W1nK1Nef6QeHfpLEfTKIGi2jxgvHK9Hy6eq266H1uAZ1Y6M/fn5reiDSLx3tNB2SgQ NnpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 126-v6si6292854wmg.214.2018.06.11.10.10.14 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Jun 2018 10:10:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fSQKc-0007Ep-1Y; Mon, 11 Jun 2018 18:10:14 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , Paolo Bonzini Subject: [PATCH 2/3] exec.c: Don't accidentally sign-extend 4-byte loads in subpage_read() Date: Mon, 11 Jun 2018 18:10:06 +0100 Message-Id: <20180611171007.4165-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180611171007.4165-1-peter.maydell@linaro.org> References: <20180611171007.4165-1-peter.maydell@linaro.org> In subpage_read() we perform a load of the data into a local buffer which we then access using ldub_p(), lduw_p(), ldl_p() or ldq_p() depending on its size, storing the result into the uint64_t *data. Since ldl_p() returns an 'int', this means that for the 4-byte case we will sign-extend the data, whereas for 1 and 2 byte reads we zero-extend it. This ought not to matter since the caller will likely ignore values in the high bytes of the data, but add a cast so that we're consistent. Signed-off-by: Peter Maydell --- exec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Richard Henderson diff --git a/exec.c b/exec.c index 9cbba6adcd3..90b47cde7b1 100644 --- a/exec.c +++ b/exec.c @@ -2747,7 +2747,7 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, *data = lduw_p(buf); return MEMTX_OK; case 4: - *data = ldl_p(buf); + *data = (uint32_t)ldl_p(buf); return MEMTX_OK; case 8: *data = ldq_p(buf); From patchwork Mon Jun 11 17:10:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 138265 Delivered-To: patches@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp4300894lji; Mon, 11 Jun 2018 10:10:15 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIEYUOy+pxCaD9LmOfmxK0TFynx0AIjAHMtrCH4PRvBLEzNzBz8/pQXMNeBcZZnQPLM1vKK X-Received: by 2002:a1c:e619:: with SMTP id d25-v6mr11441wmh.23.1528737015261; Mon, 11 Jun 2018 10:10:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1528737015; cv=none; d=google.com; s=arc-20160816; b=uC/ZbxbnlQySuHa8Q8kcNvtWBn0GL+MDVFBVotNvr+c7wySprPA0S5E5VW+gi8Pfjr zdlVArUYwQbyMDMkORQEGLiX1q/cAMs1HMRc0pW7zh+0NyacgjEz2GJB4EYC8lSmb1LP Njp0m3AOJveXenGPKDoVrIVrtP2z7tUdrwyrP+tvIb7dMGidvsPfMiKY3NYt4Oq/1AYl iX3gHFrf/otOQZp86mrPrfZTg+hvowsEl3HV0tONAubwqr8N1HljiZ+8TRVz9Bda11Be f9OYDqqlbMdZFrpZzke/PJyOE/e93+WtB221vAR28g3stB49uNVA2SfnBqESVCgva6tS +JMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=F/eK0c+JfjU14C8jon9rtDRl88yXqrEzhTUAo6kXVog=; b=aLBzUiG9RhOB3ZY4WxyzKwKgMx1rU06j2a5Z8oSFwdVGdrbYnE3cEGJShw37+woNvD M/78g9BN+KQmUT4jAHPn0T6b1HQCh5B46jLXh/DPsCrR3oCfii1U7mIRtoZ8r4c0t/RH 5uB6U4OVIeA+ry+6sOPNH1DrFxLgw+7HxYRb7x2NELpFqlus4oN8218IKfwP2kKVuSKK KCptPCFB3OxqckPpbOdUtzJPbgnOMhRwDEKgh0oP3xQ4x0adTAdfY7iSCdTZsvP679d6 4QSGXxXvPg6d3pYeC4uat4SeQMQRhEUfZf/U4UgkpvACVZxuQd/cg9QV7hSGFw8rpAr8 NDQg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id n187-v6si1145769wmn.35.2018.06.11.10.10.15 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Jun 2018 10:10:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fSQKc-0007F8-PJ; Mon, 11 Jun 2018 18:10:14 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , Paolo Bonzini Subject: [PATCH 3/3] exec.c: Use stn_p() and ldn_p() instead of explicit switches Date: Mon, 11 Jun 2018 18:10:07 +0100 Message-Id: <20180611171007.4165-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180611171007.4165-1-peter.maydell@linaro.org> References: <20180611171007.4165-1-peter.maydell@linaro.org> Now we have stn_p() and ldn_p() we can use them in various functions in exec.c that used to have their own switch-on-size code. Signed-off-by: Peter Maydell --- exec.c | 112 +++++---------------------------------------------------- 1 file changed, 8 insertions(+), 104 deletions(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson diff --git a/exec.c b/exec.c index 90b47cde7b1..1fa2cdb874f 100644 --- a/exec.c +++ b/exec.c @@ -2544,22 +2544,7 @@ static void notdirty_mem_write(void *opaque, hwaddr ram_addr, memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_vaddr, ram_addr, size); - switch (size) { - case 1: - stb_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - case 2: - stw_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - case 4: - stl_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - case 8: - stq_p(qemu_map_ram_ptr(NULL, ram_addr), val); - break; - default: - abort(); - } + stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val); memory_notdirty_write_complete(&ndi); } @@ -2739,22 +2724,8 @@ static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, if (res) { return res; } - switch (len) { - case 1: - *data = ldub_p(buf); - return MEMTX_OK; - case 2: - *data = lduw_p(buf); - return MEMTX_OK; - case 4: - *data = (uint32_t)ldl_p(buf); - return MEMTX_OK; - case 8: - *data = ldq_p(buf); - return MEMTX_OK; - default: - abort(); - } + *data = ldn_p(buf, len); + return MEMTX_OK; } static MemTxResult subpage_write(void *opaque, hwaddr addr, @@ -2768,22 +2739,7 @@ static MemTxResult subpage_write(void *opaque, hwaddr addr, " value %"PRIx64"\n", __func__, subpage, len, addr, value); #endif - switch (len) { - case 1: - stb_p(buf, value); - break; - case 2: - stw_p(buf, value); - break; - case 4: - stl_p(buf, value); - break; - case 8: - stq_p(buf, value); - break; - default: - abort(); - } + stn_p(buf, len, value); return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, len); } @@ -3129,34 +3085,8 @@ static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, l = memory_access_size(mr, l, addr1); /* XXX: could force current_cpu to NULL to avoid potential bugs */ - switch (l) { - case 8: - /* 64 bit write access */ - val = ldq_p(buf); - result |= memory_region_dispatch_write(mr, addr1, val, 8, - attrs); - break; - case 4: - /* 32 bit write access */ - val = (uint32_t)ldl_p(buf); - result |= memory_region_dispatch_write(mr, addr1, val, 4, - attrs); - break; - case 2: - /* 16 bit write access */ - val = lduw_p(buf); - result |= memory_region_dispatch_write(mr, addr1, val, 2, - attrs); - break; - case 1: - /* 8 bit write access */ - val = ldub_p(buf); - result |= memory_region_dispatch_write(mr, addr1, val, 1, - attrs); - break; - default: - abort(); - } + val = ldn_p(buf, l); + result |= memory_region_dispatch_write(mr, addr1, val, l, attrs); } else { /* RAM case */ ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false); @@ -3217,34 +3147,8 @@ MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, /* I/O case */ release_lock |= prepare_mmio_access(mr); l = memory_access_size(mr, l, addr1); - switch (l) { - case 8: - /* 64 bit read access */ - result |= memory_region_dispatch_read(mr, addr1, &val, 8, - attrs); - stq_p(buf, val); - break; - case 4: - /* 32 bit read access */ - result |= memory_region_dispatch_read(mr, addr1, &val, 4, - attrs); - stl_p(buf, val); - break; - case 2: - /* 16 bit read access */ - result |= memory_region_dispatch_read(mr, addr1, &val, 2, - attrs); - stw_p(buf, val); - break; - case 1: - /* 8 bit read access */ - result |= memory_region_dispatch_read(mr, addr1, &val, 1, - attrs); - stb_p(buf, val); - break; - default: - abort(); - } + result |= memory_region_dispatch_read(mr, addr1, &val, l, attrs); + stn_p(buf, l, val); } else { /* RAM case */ ptr = qemu_ram_ptr_length(mr->ram_block, addr1, &l, false);