From patchwork Fri Jun 22 15:23:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 139681 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp1004138lji; Fri, 22 Jun 2018 08:23:25 -0700 (PDT) X-Google-Smtp-Source: ADUXVKJew+KM5oZiSsnEFax2IqhM8XjAVLBbxCjGlwViPnSmLLIZArZKvgfFCdp7xDPKZ/m3bfH5 X-Received: by 2002:a63:a74c:: with SMTP id w12-v6mr1865351pgo.374.1529681005630; Fri, 22 Jun 2018 08:23:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529681005; cv=none; d=google.com; s=arc-20160816; b=oG2ItvYqruE7nr1NktxaOcSTE/dTHmRsFPBX3HcCWyBPWBN6w6iyswDmcZdNmHRFUX JZDHDqq5/vmpP1tYn+013szn8agbSsrTNxx/zxYOW5LDWqlF0NILbABOGBH3/iwj4AOM GCxf0jU/hb/nTOHicTH/ClbAwn6/RiL/ixsaUM5rfbUzeWwOFDqBJ26NZjmza4LkdzF3 wT4oCA+26YymHnT1L7WRoa8RISn5PLt1TIJXKHboVnuZUQhjyJhLSnRGn4+xxro5+/Hj 9pXkDDdCBTAUSTa27eWX4vfNRD5yw3yD7IIWQNohJmrsP1iG+HZz8yd5/rGuCEQ4Z7Zj D7gA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Sj+hRYyfk9pZ0/4L1Jrs/9hDSFFUSTC8qRb0iJ70R3I=; b=Zn+Wy8jPDCqk7/CifuSviFnVtSNBTlPzIt9DYbxExGclrPQHqdJcrV12G5B1DXPXFm sgR8Nd+HIqDQBH6oHkuTThQwTyUDg/Tes6bu99A1IgiYbeYuZUH81lmP4mfvQ4VhZjkj GcbSJIP6Yopw8+P3lRl0WkJOTJ3Q+2OMcqUiu6SCBSb94PEMNIf7hKgKhYwxtBZZOaMO dIm5sZaFvyziRrPfQfc/5cg5sHwLRjR8JWYH+Lvq9zReMtv9trfgHGwMUmriuPZgrpz7 qlcShK2s8gOHPktiFaAh5KO9Ut/XRhQuY6VZGaq3HN8ZruwiHdDphycm8HeTeJCf4nQk T2aQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m3-v6si7666862pfm.0.2018.06.22.08.23.25; Fri, 22 Jun 2018 08:23:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933827AbeFVPXL (ORCPT + 13 others); Fri, 22 Jun 2018 11:23:11 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:36754 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933753AbeFVPXJ (ORCPT ); Fri, 22 Jun 2018 11:23:09 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B01361529; Fri, 22 Jun 2018 08:23:09 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 811BB3F557; Fri, 22 Jun 2018 08:23:09 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 01DAE1AE3719; Fri, 22 Jun 2018 16:23:45 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com Cc: mark.rutland@arm.com, Will Deacon , Subject: [PATCH] arm64: mm: Ensure writes to swapper are ordered wrt subsequent cache maintenance Date: Fri, 22 Jun 2018 16:23:45 +0100 Message-Id: <1529681025-20850-1-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org When rewriting swapper using nG mappings, we must performance cache maintenance around each page table access in order to avoid coherency problems with the host's cacheable alias under KVM. To ensure correct ordering of the maintenance with respect to Device memory accesses made with the Stage-1 MMU disabled, DMBs need to be added between the maintenance and the corresponding memory access. This patch adds a missing DMB between writing a new page table entry and performing a clean+invalidate on the same line. Cc: Signed-off-by: Will Deacon --- arch/arm64/mm/proc.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.1.4 Acked-by: Mark Rutland diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index 5f9a73a4452c..03646e6a2ef4 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -217,8 +217,9 @@ ENDPROC(idmap_cpu_replace_ttbr1) .macro __idmap_kpti_put_pgtable_ent_ng, type orr \type, \type, #PTE_NG // Same bit for blocks and pages - str \type, [cur_\()\type\()p] // Update the entry and ensure it - dc civac, cur_\()\type\()p // is visible to all CPUs. + str \type, [cur_\()\type\()p] // Update the entry and ensure + dmb sy // that it is visible to all + dc civac, cur_\()\type\()p // CPUs. .endm /*