From patchwork Sun May 16 23:05:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439900 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566297jac; Sun, 16 May 2021 16:06:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzJ+qE5Q7S9L0gKwN99OW0tEglCbpjaloboZawtb1ro360zgWJktdbAodsPxmNhaGkOdGiA X-Received: by 2002:a05:6602:55:: with SMTP id z21mr31551053ioz.54.1621206388970; Sun, 16 May 2021 16:06:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206388; cv=none; d=google.com; s=arc-20160816; b=DtCa///MDYIpt4Q5wJPcVrg+T7tQV8Yy+ZIKEBNAOeWtE7O8IFg5BDpBdN5aoTEJot gIiKbd0V7kFDkIxTwBBx14rxmolRaQQT9fo5bHEWKY7UKU7BOQKvGFzBqeoCZqPnCoeQ +dtLTmk9nyHjYRxe6UmoPHVuPmSKasnO6j6EoJmhq1U8pN5bW/2+RnJtN6z9RDpIAouO kWJEDJxOkqrpZRXkzAYT/8s8qbvO2LBc8j1e7ERa8D5qnkCLUn8IGPI392Hu5AADMzub /eqA59fs+2cjsNtM1evsg3ORYeSlMak1hhetXaEtWjBitA/WVuKe9JK1kz+b+MZZwh6z XInA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=c0fMqdsWoMPNaGZvOq7oT2myXJmoWVpui0PRaLWEN3o=; b=ajgb8V+EsPEtBNfPGGbWubICjkUq+zOcdFGdilTYMuvH+DBoU4x1bc0UI9RzCiEsDw 7GkgoIAr1Vg/0fL4Dzp4tZdI+Ws5kmGcV0T1uu/YuKG/aaRqixQ6NsyWarPvewBYBy1j qZY4qRNLaBBYKwaA0qjFmbvme499REt5lgV6KejfCNc6fJ399VXcurp4d76f9liuK8tn O9g/5SwfrQthALrLn/piWZnDpjVjrHQLhYiIOTviM0PLDBZT3DVYSvNHyMz/4QQM9GQC BsnSkNIEgbvVZ0VjBwRgZBX2PXTmQ+Pamw/apZ4P+XG+Ecww1/K4YQx2b5WSl/BOT3Cr QHhQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.28; Sun, 16 May 2021 16:06:28 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231874AbhEPXHf (ORCPT + 7 others); Sun, 16 May 2021 19:07:35 -0400 Received: from mx2.suse.de ([195.135.220.15]:43964 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231640AbhEPXHf (ORCPT ); Sun, 16 May 2021 19:07:35 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 4E398B001; Sun, 16 May 2021 23:06:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 1/9] dt-bindings: arm: rockchip: Add Rockchip RK1808 and TB-RK1808M0 Date: Mon, 17 May 2021 01:05:43 +0200 Message-Id: <20210516230551.12469-2-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define SoC and board compatibles for RK1808 SoC and Toybrick mPCIe card. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) -- 2.31.1 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 4a6f772c1043..829f67f659d1 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -580,6 +580,11 @@ properties: - const: rockchip,rv1108-evb - const: rockchip,rv1108 + - description: Rockchip Toybrick TB-RK1808M0 mPCIe card + items: + - const: rockchip,tb-rk1808m0 + - const: rockchip,rk1808 + - description: Theobroma Systems RK3368-uQ7 with Haikou baseboard items: - const: tsd,rk3368-lion-haikou From patchwork Sun May 16 23:05:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43A2FC43460 for ; Sun, 16 May 2021 23:06:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1AAA16113C for ; Sun, 16 May 2021 23:06:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231977AbhEPXHh (ORCPT ); Sun, 16 May 2021 19:07:37 -0400 Received: from mx2.suse.de ([195.135.220.15]:43978 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231776AbhEPXHg (ORCPT ); Sun, 16 May 2021 19:07:36 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id CEB8DB11A; Sun, 16 May 2021 23:06:19 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Greg Kroah-Hartman , Rob Herring , linux-serial@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/9] dt-bindings: serial: snps-dw-apb-uart: Add Rockchip RK1808 Date: Mon, 17 May 2021 01:05:44 +0200 Message-Id: <20210516230551.12469-3-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a Rockchip RK1808 compatible. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 87ef1e218152..68545e421bbe 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -23,6 +23,7 @@ properties: - items: - enum: - rockchip,px30-uart + - rockchip,rk1808-uart - rockchip,rk3036-uart - rockchip,rk3066-uart - rockchip,rk3188-uart From patchwork Sun May 16 23:05:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439903 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566324jac; Sun, 16 May 2021 16:06:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyCF9f8hjkd4eL7YyqfIQvr/WkaIy4aY7ZzppvpUU+rmKpaJTOSj4NOsb5mWSw0enXJSo4Y X-Received: by 2002:a05:6e02:ec7:: with SMTP id i7mr7431151ilk.147.1621206390875; Sun, 16 May 2021 16:06:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206390; cv=none; d=google.com; s=arc-20160816; b=K+TAogzmUDqrbDQeTlal8mEqzZSsUmGxuXoAM7RF85YLU96c1IgCiJ8UCEPtDt6qFl s6sC7WeUeccEKNU2rF7abhRlLEIMHoVbIKQsk3I2lgRVmBmShmouOakzfq8iOqWtGM2m YU9kvlXjuO8T06qG7bD1JRXFUi0yB6PZNJ7pZkfDasYms/hn9CpWaMGDIIuTORmPdK3T BAQqw9L4YUzSt+e6ECGpXzZSkHp5DPKXbEvHjIj3puSeYNq7iTSp97/NnsSBq0d74MdI ckW/Z/Gmhr6IYF4d+b/ik/QJioTzhd4yMyaevkdGDet7GZQgPS1weoKKtPCd+eHU+Lr4 gb9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ePqHjWjCPZ4r43DtlnBElqwAZrBPU7E8Y+KXWdqk0d0=; b=pz/q7T3EjzQdg5LTeTJPynq69wpGckwAdDZtcIFdhcbfyIi0dLMpZcHOkVHhnumo9A Pd7+vV25jyq4jX52unr9+bNjOOCHSKnFGxJfQ6Noci1tOwhcNwGNPphb3HJn5X7NnFVM T6ovpPiA+tTmTZOZTaZXty+LX9+NC0MzD19uIgALK4w5TxoZbYloQL0/iYJZ16PxdPZu nMs1Ld4s65St1iq+edp4O5E2p7P76+HBLah505jQH7VxMueglPMYzp8Y59Dc+BVfWmxL whPAJNgFx1mfzLuY6SNueZEtpmYITSDUt7RmERcQANNnnfZCYgvSnbQuclxZyeL7jBpN Tzdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.30; Sun, 16 May 2021 16:06:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232031AbhEPXHh (ORCPT + 7 others); Sun, 16 May 2021 19:07:37 -0400 Received: from mx2.suse.de ([195.135.220.15]:43998 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231887AbhEPXHg (ORCPT ); Sun, 16 May 2021 19:07:36 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 2D5ABB1D0; Sun, 16 May 2021 23:06:20 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 3/9] arm64: dts: rockchip: Prepare Rockchip RK1808 Date: Mon, 17 May 2021 01:05:45 +0200 Message-Id: <20210516230551.12469-4-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an initial Device Tree for Rockchip RK1808 SoC. Based on shipping TB-RK1808M0 DTB. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/rk1808.dtsi | 203 +++++++++++++++++++++++ 1 file changed, 203 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk1808.dtsi -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi new file mode 100644 index 000000000000..af2b51afda7d --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -0,0 +1,203 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2021 Andreas Färber + */ + +#include +#include + +/ { + compatible = "rockchip,rk1808"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial7 = &uart7; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x1>; + enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP>; + }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP: cpu-sleep { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x10000>; + entry-latency-us = <120>; + exit-latency-us = <250>; + min-residency-us = <900>; + }; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a35-pmu"; + interrupts = , + ; + interrupt-affinity = <&cpu0>, <&cpu1>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + arm,no-tick-in-suspend; + }; + + xin24m: xin24m { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + clock-output-names = "xin24m"; + }; + + firmware { + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + tee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + system_sram: sram@fec00000 { + compatible = "mmio-sram"; + reg = <0xfec00000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xfec00000 0x200000>; + }; + + gic: interrupt-controller@ff100000 { + compatible = "arm,gic-v3"; + reg = <0xff100000 0x10000>, /* GICD */ + <0xff140000 0xc0000>, /* GICR */ + <0xff300000 0x10000>, /* GICC */ + <0xff310000 0x10000>, /* GICH */ + <0xff320000 0x10000>; /* GICV */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = ; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gic_its: msi-controller@ff120000 { + compatible = "arm,gic-v3-its"; + reg = <0xff120000 0x20000>; + msi-controller; + #msi-cells = <1>; + }; + }; + + uart0: serial@ff430000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff430000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart1: serial@ff540000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff540000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart2: serial@ff550000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff550000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart3: serial@ff560000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff560000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart4: serial@ff570000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff570000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart5: serial@ff5a0000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff5a0000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart6: serial@ff5b0000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff5b0000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + + uart7: serial@ff5c0000 { + compatible = "rockchip,rk1808-uart", "snps,dw-apb-uart"; + reg = <0xff5c0000 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + status = "disabled"; + }; + }; +}; From patchwork Sun May 16 23:05:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439902 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566321jac; Sun, 16 May 2021 16:06:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzfJ0J+DZ5j8eQ52SySxuHvKP5JihDbWrf0jsd2UIoFXeyT72pcGcvBcqoO8oezXjopXppE X-Received: by 2002:a6b:d918:: with SMTP id r24mr42511624ioc.25.1621206390537; Sun, 16 May 2021 16:06:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206390; cv=none; d=google.com; s=arc-20160816; b=zHHDMMPC2n20gBYQpcPT+wUq543b/a4Q/R1TQRE9F8MMNZT3PCGHCgSM8K8HDZ6NAL fTpwsQEWaC72NldLI3IjpdLGsLEfrrxl1qLT2Ns1lsq2P9QXppPRZtuuGVuysk5fvOBR /gUJJBUYnUj8boi6c7qpEhBcQi9ujfMRs5z6si4F4mvOXqqBSdzRMrXQ2TwJYqdZcQeH q4NWWt+tDwM7YTa0sX/xd3yRadqpG3mehbAr/6+vG0tTfed3d4D58u/42IWFbYhFRqWi Ghk0I3VC1Z6DnkjHAtC0eLl4z/9wXyKBOt3CzIpbZkfkNo+8Ul7IaRG1oJvg+4zIXhf1 LwpA== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.30; Sun, 16 May 2021 16:06:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232112AbhEPXHh (ORCPT + 7 others); Sun, 16 May 2021 19:07:37 -0400 Received: from mx2.suse.de ([195.135.220.15]:44012 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231936AbhEPXHg (ORCPT ); Sun, 16 May 2021 19:07:36 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 853EDB1DA; Sun, 16 May 2021 23:06:20 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 4/9] arm64: dts: rockchip: Add Rockchip TB-RK1808M0 Date: Mon, 17 May 2021 01:05:46 +0200 Message-Id: <20210516230551.12469-5-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an initial Device Tree for Rockchip Toybrick TB-RK1808M0 mPCIe card. Based on shipping TB-RK1808M0 DTB. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk1808k-toybrick-m0.dts | 55 +++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index c3e00c0e2db7..d5a3837ccb7c 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808k-toybrick-m0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts new file mode 100644 index 000000000000..2f8075d2391c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2021 Andreas Färber + */ + +/dts-v1/; + +#include "rk1808.dtsi" + +/ { + compatible = "rockchip,tb-rk1808m0", "rockchip,rk1808"; + model = "Rockchip Toybrick TB-RK1808M0"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + vcc3v3_pcie: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_cpu: vdd-cpu { + compatible = "regulator-fixed"; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + vin-supply = <&vcc3v3_pcie>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&uart2 { + status = "okay"; + clocks = <&xin24m>; + clock-names = "baudclk"; +}; From patchwork Sun May 16 23:05:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439904 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566333jac; Sun, 16 May 2021 16:06:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxLn7vneaHtaZeFB2RzGQgzIKqGl0jywF0vlQhNo3CEcQY4e6/xxr36qSZco4ndLy96GQ9X X-Received: by 2002:a05:6602:55:: with SMTP id z21mr31551158ioz.54.1621206391492; Sun, 16 May 2021 16:06:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206391; cv=none; d=google.com; s=arc-20160816; b=MYI0gl4aK9osMnXNtljAcPzmCliEvJItH5+5xQA/r+7+BoQcgsyuiFT/FKLMVWkDcB 51m7Fr/YAB/A7QiXgpuQ4o9dKyLzVGjn4ECPC5sVM1rIMCUWTrjpQ6/kAUkaw8S9WWzL WaPQ0NAqrXeCig0t0+fSw/mj9PeeYXp5aYphTNifClOf0gmSo8d/MIBBVV3oQET3JQT3 Mj4VbGuja/QFLZU/2f+XVZTGmFwBkXKm0SzxwsnEqbx5JpZkUwZQc1zaXcMkcaFIsaae 18MUnVQzg5g4XwUaH4UAfBFROKMUm+G6RQYFKmv8Q+pNSyKN7k+TbyNdCN6hG9UQzooO 8e2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=53oYo7BlX7RNapV64mjQVYn+6D5hJMjiTqFpVSzEk0U=; b=zEiZVbtvlkY/yna9xhxgwV63xr1rfbCn23zu2KnXfgVeGSCPRmBEnwn/COgrVT9Z0v ybqr9vrmQn7toEioSArBbmZS5BPt30fcDZz0RLslcw2v7/s6B5RNTeeAdEm1Y25nQX3j MG4XGx4FJTvOlVwdzl3r1BMTeZoECSh+JexyoYfpb0BHbrHgDVaECzTrSI2UAYB55vBt Ne6DFiAiW1of6eeU24upEluZg77qTRI9lnFLLZ4Xe7nOL/1rsrKJESB58JchxJfLSDWQ 9qhPe/d6UjkBNlYiaM8EYaY+wjiMlxjFYmV5TB/0vgxkOIhvjh4OnekPGGIADlEq7QpK nJbg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.31; Sun, 16 May 2021 16:06:31 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232195AbhEPXHi (ORCPT + 7 others); Sun, 16 May 2021 19:07:38 -0400 Received: from mx2.suse.de ([195.135.220.15]:44032 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231953AbhEPXHh (ORCPT ); Sun, 16 May 2021 19:07:37 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id CCB85B1DD; Sun, 16 May 2021 23:06:20 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH RFC 5/9] arm64: dts: rockchip: rk1808k-toybrick-m0: Suppress vGIC interrupt Date: Mon, 17 May 2021 01:05:47 +0200 Message-Id: <20210516230551.12469-6-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Avoid the kernel getting stuck after: [ 1.175956] kvm [1]: IPA Size Limit: 40 bits [ 1.177164] kvm [1]: vgic-v2@ff320000 [ 1.177545] kvm [1]: GIC system register CPU interface enabled or when dropping GICV reg entry: [ 1.176001] kvm [1]: IPA Size Limit: 40 bits [ 1.177191] kvm [1]: GICv3: no GICV resource entry [ 1.177664] kvm [1]: disabling GICv2 emulation [ 1.178115] kvm [1]: GIC system register CPU interface enabled Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts | 4 ++++ 1 file changed, 4 insertions(+) -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts index 2f8075d2391c..15293a8576c6 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts +++ b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts @@ -48,6 +48,10 @@ &cpu1 { cpu-supply = <&vdd_cpu>; }; +&gic { + /delete-property/ interrupts; +}; + &uart2 { status = "okay"; clocks = <&xin24m>; From patchwork Sun May 16 23:05:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439906 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566342jac; Sun, 16 May 2021 16:06:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx0NCAgOLayMdNfA5FrlG/ePLE2A/sfry+YlHAcRah2rvaz4LschyykfvK+FqIaiZVu3mCA X-Received: by 2002:a5d:8c84:: with SMTP id g4mr25830789ion.32.1621206392059; Sun, 16 May 2021 16:06:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206392; cv=none; d=google.com; s=arc-20160816; b=VZsZi+dKlu2lhDpsWTjIRlw3QQ1tdpgoQt7zmLXcNrJhJhP61lWfYqD9U5kQJRLyIx Z8YCJ7QBgXuHJ3k5NkRfeAtjiLfcJMTkBkAe5+31y+ZPI+Znh8bP8hDoLGpgb3grOBkI B3q4slr51sU2bxGqWJ7OUlW5C52nq5hSvsccRwIcKZlMa4oWJs4FBIafyN3CNhu5M1wn 4hVRyd91KoVCsSHqe0rbF5Y5p5awwgLaeDVktSlF3RGaGk52fPjFsD7Lg2dQSZ59FN5U QkP3vNrT7aaucVQv17BTTQmb4hVkaElpUqadR/d0Juzn/73zVc4hRdHdTufn4pWbC7Yp brjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xKyJF3WGNbjSqtr8fUds/mmg6tH3HBuJkCVNrm13e3E=; b=hyOWosSEs5jXadZL7uTJ/cd8q5IjciJf05vvdsFWRqf+xR3B01joNAeG/v0RY+Tdbu N8bnmNaVy1awthme61VhphkBE+traf77X91vne7AM0ZyLRnjLqmftYJSTmosIoFe4mpa g06gzXnwn0u5aKznWPZ/tSkJ/7LeiSyIRx/xLzk7svhiV5YjEASpgOHqASWJVOh0N5QV 7zA3myFmV71UrkKaz4t9U3F9HbMOyC9ji6+PJXsz49QxppEn29vaZkXOp8+15qZH8wgW an70A9kYgSleDJOWetvQEbbqfsERAKc9AZgzoLEqyOHxcm4UbzgTyumjuHoMfp4tCx5s 7ROw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.31; Sun, 16 May 2021 16:06:32 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232342AbhEPXHj (ORCPT + 7 others); Sun, 16 May 2021 19:07:39 -0400 Received: from mx2.suse.de ([195.135.220.15]:44054 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231968AbhEPXHh (ORCPT ); Sun, 16 May 2021 19:07:37 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 27C66B1EA; Sun, 16 May 2021 23:06:21 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Ulf Hansson , Rob Herring , Heiko Stuebner , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 6/9] dt-bindings: mmc: rockchip-dw-mshc: Add Rockchip RK1808 Date: Mon, 17 May 2021 01:05:48 +0200 Message-Id: <20210516230551.12469-7-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a compatible string for Rockchip RK1808 SoC. Signed-off-by: Andreas Färber --- Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.31.1 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index eaa3b0ef24f6..54fb59820d2b 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -30,6 +30,7 @@ properties: - items: - enum: - rockchip,px30-dw-mshc + - rockchip,rk1808-dw-mshc - rockchip,rk3036-dw-mshc - rockchip,rk3228-dw-mshc - rockchip,rk3308-dw-mshc From patchwork Sun May 16 23:05:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439905 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566337jac; Sun, 16 May 2021 16:06:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxq2ciQBwDy0ko8JZqI/+1OtPhGbB7AEKDySbPleWOIUeNmAlc7+ZoV6sUrSQYCPq1BOfZr X-Received: by 2002:a6b:8dd5:: with SMTP id p204mr31123783iod.195.1621206391778; Sun, 16 May 2021 16:06:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206391; cv=none; d=google.com; s=arc-20160816; b=oLL1ECmefEpBXvPgFZ0L91eQa1LTU+R4IpUPFBTLCbBvL/lw+uXIGD2sXNCh+BtjDT 2je8oZNZuru1wbJ6MEWbOVEJizVtWJ4PniiwrZ6g9ke+baUbmBBUpgxxjnnLs0nL1l+p Z2P4X8huGQ2W3TEiDeeVSP75tTtG6M1tPY9E074hKzx8RQZS3RbW2HDNVGsV/vOm7cVZ 5MkoIhSVHo5w9FdE2ITFb3KL/KSp3LvTy2aSrrM0rC0bZVTV4W01cLa4g8QUzZWEHkLI oHCnNrj0cfr/T5w0TkgrtH23EBP+KM1D9gvhKt9IYZt9PZO7tet8wy5IMDvbglXD14TU wjfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=PiAtmuEq23FRlRQfE0sPADKHqpiKdshWBduacG3QKzI=; b=F1LP9D/+bUDmO32aydb/VAHt5+vi2nYJ/F63uq9I0/KR1Lo1IkAon5S5ZaMVoKOxXL KFHcpR7zPfKOxsRAdBEr1V1lQT6k0Zn2turvYCKOlf8TQoJ5vj2txttY8/eFr6jfAkHb PBfS5kyKjOk0AoKSa36hbGpFrB2aYjqAstnIPJ7JFbxIS1o6f0/VyDJLjY2aoaLL5CDU 38c1bIVdDrpzfKvrURnt248IIyGhYyd9laT+u4AUxDu1vrOcnc1adyEosPbSWFTOHz8q j7dnW8zVkITQBb0kyeg+MB0GVPtPQoDp2Pn0BAmE8y6eLNXIBKBQN+0xxBxQ+/0ccjg/ y7aQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.31; Sun, 16 May 2021 16:06:31 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232479AbhEPXHk (ORCPT + 7 others); Sun, 16 May 2021 19:07:40 -0400 Received: from mx2.suse.de ([195.135.220.15]:44076 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231997AbhEPXHh (ORCPT ); Sun, 16 May 2021 19:07:37 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 6AA63B1EB; Sun, 16 May 2021 23:06:21 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 7/9] arm64: dts: rockchip: rk1808: Prepare eMMC node Date: Mon, 17 May 2021 01:05:49 +0200 Message-Id: <20210516230551.12469-8-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an eMMC DT node. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/rk1808.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index af2b51afda7d..b4a71c5c8be7 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -199,5 +199,14 @@ uart7: serial@ff5c0000 { interrupts = ; status = "disabled"; }; + + emmc: mmc@ffd00000 { + compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0xffd00000 0x4000>; + interrupts = ; + max-frequency = <150000000>; + fifo-depth = <0x100>; + status = "disabled"; + }; }; }; From patchwork Sun May 16 23:05:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439908 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566351jac; Sun, 16 May 2021 16:06:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxLz8N7iCTJuDkG98hxIUnN0lIxvp1/zPXK59A+zQKhXTTEI4QvmNugU0L/3U/Sg+Lkw2sp X-Received: by 2002:a05:6638:388e:: with SMTP id b14mr17648602jav.73.1621206392979; Sun, 16 May 2021 16:06:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206392; cv=none; d=google.com; s=arc-20160816; b=YoU9gPXpRbgZxmIDDO9v5fuOCprX89llEVnxx0lRuHQAKt3CfEBEI7JMi5DZLxNqTy 7Ei7v+gZJu3dVmZ3GbfwvQnfpCRABZsl+poQYXYB3PvENzbLh7ktmyYv524zZFVQpd8r 4cmxscalGqKU71rhGEaDTk/MdJOSpvfhlqZ57KEtlANXDH3bSw0bAlFm8iwZJhI5X4+7 5IeO1BhE25Gm5nP0h1AamNbqKHlraBBXiJ6QLd2KGhaiC8EV/bjakJ4b+nJ7VqK+cqy8 oJ4vVT4pNPxSBMCrsHZNS9ycCEfugliOz+84amA0ZvrSNsKYOFy1HahonhGPMWCPaHf/ dIXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=WQx1Oa1O3JtHSEcF1yaSjpRPxL48ZQOEiymgFVcdGf8=; b=emCTfuEXPTc2FMUI6YsJPruxCC2tKm+gMRX2ZctAJxZKIadBFgC9XoJ1xBiz9qAiut bcB+ds87zfD4lvNDqph+whoVL0Wt8a4ag/pZbjP6nrJ8fMEoCR+uGRPCZQk2jEVtrJdX mG/EH4ZWtvVPleskDxHtAuIkPOEeYKVO4rP0EBAPZSLcnQ8zOU5Qb6ZgygfJnE6dT47W FFJE0qZ4lt92n0Khay67ty9pFgmXQMXkFxngrfWX77r/RJNtEj9//1WjJA4ThZNSydgC OUxVFd4hZCObKQ2EBzXwB+utxjNsU+mXnscaxHRK9Gk4YHCefRms21KDH9OLIJL1EA5R WjTg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.32; Sun, 16 May 2021 16:06:32 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232564AbhEPXHl (ORCPT + 7 others); Sun, 16 May 2021 19:07:41 -0400 Received: from mx2.suse.de ([195.135.220.15]:44100 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232067AbhEPXHi (ORCPT ); Sun, 16 May 2021 19:07:38 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id B014DB1F0; Sun, 16 May 2021 23:06:21 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 8/9] arm64: dts: rockchip: rk1808k-toybrick-m0: Enable eMMC Date: Mon, 17 May 2021 01:05:50 +0200 Message-Id: <20210516230551.12469-9-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add fake clocks (based on downstream kernel's debugfs clk_summary) and enable eMMC. Signed-off-by: Andreas Färber --- .../boot/dts/rockchip/rk1808k-toybrick-m0.dts | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts index 15293a8576c6..aabe7a7034b2 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts +++ b/arch/arm64/boot/dts/rockchip/rk1808k-toybrick-m0.dts @@ -38,6 +38,34 @@ vdd_cpu: vdd-cpu { regulator-max-microvolt = <850000>; vin-supply = <&vcc3v3_pcie>; }; + + hclk_emmc: hclk-emmc { + compatible = "fixed-clock"; + clock-frequency = <198000000>; + #clock-cells = <0>; + clock-output-names = "hclk_emmc"; + }; + + sclk_emmc: sclk-emmc { + compatible = "fixed-clock"; + clock-frequency = <297000000>; + #clock-cells = <0>; + clock-output-names = "sclk_emmc"; + }; + + sclk_emmc_drv: sclk-emmc-drv { + compatible = "fixed-clock"; + clock-frequency = <148500000>; + #clock-cells = <0>; + clock-output-names = "sclk_emmc_drv"; + }; + + sclk_emmc_sample: sclk-emmc-sample { + compatible = "fixed-clock"; + clock-frequency = <148500000>; + #clock-cells = <0>; + clock-output-names = "sclk_emmc_sample"; + }; }; &cpu0 { @@ -48,6 +76,16 @@ &cpu1 { cpu-supply = <&vdd_cpu>; }; +&emmc { + status = "okay"; + clocks = <&hclk_emmc>, <&sclk_emmc>, <&sclk_emmc_drv>, <&sclk_emmc_sample>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + cap-mmc-highspeed; + mmc-hs200-1_2v; + non-removable; + bus-width = <8>; +}; + &gic { /delete-property/ interrupts; }; From patchwork Sun May 16 23:05:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 439907 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp566346jac; Sun, 16 May 2021 16:06:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz9EhIpraDQUw6dnkHGi2uFc0RkWRxyWjn2/+PmWIYwfVKyeX/X+VwJBxFjrv/O+Igw/CXz X-Received: by 2002:a02:a918:: with SMTP id n24mr53781148jam.125.1621206392349; Sun, 16 May 2021 16:06:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621206392; cv=none; d=google.com; s=arc-20160816; b=P2q3eoW/R/qbU9TPVQk2zXL79faKHnEWnDYhgrRkOqqQDDcl83yp5fpluP76rAT0AL eAL5rPtdo+vMieM5uoqbc3TCyQ0DcLvNi8RuSlKPrBq3ZzftBDLmLTZbKEa9In9Y6ISH 2t/+gIkUq6IH2QOdNm+oAshJjbEvxo2OgJhnOS9OMvwByElGBPxzjRIbXWIQOM5Avfv/ OZPgwOJvR81rS5k5Qadzdw1bCLdnkbZnLqgAywx8SYQ+tPKzs2GmGRkRT69tOZ6ZiJ3y BbfFq32TENQ/8CmKaDrclfNfaqGlxfZm/qwB5u9z73FbF2rEL/AfSCUCURBCkMHzkAX3 YG4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=QpagjBDnee6mgrVuQlrpEoBRQ+UPTqN8ipLXUovCG/Q=; b=K2oh4fDRxf+fSWtN9RmVuoZuu1Y9wlPijLfAtE0i5W9/q9oT9qfKL44axnROgoBNgr XFubB1i0x8uf+qPOXPaITPSsa/PsTVKt8KJPqU/Ic/LEG0cHjoLbkEmVoPOKGf9/I9bk 0322+4qn76WlarFnL1watkXjNhWNCwDI0u9c+HgRnqmK9UqM45DNC2spcDFomkF8Tdth fqdtfjk1nK6QU8/j8PWvmJyqqEQb7cJBY/2G734EZKWH5eMUbOoGZzeQJiFh+4oivFJY bnzsAuVAYmC6bJnpDYpXlbTLhT+phIqoAWD1cWKdBPJCO+yupKTNx6SYCP7MikCx6ks8 q6mg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id x20si15268428jao.3.2021.05.16.16.06.32; Sun, 16 May 2021 16:06:32 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232508AbhEPXHk (ORCPT + 7 others); Sun, 16 May 2021 19:07:40 -0400 Received: from mx2.suse.de ([195.135.220.15]:44012 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232079AbhEPXHi (ORCPT ); Sun, 16 May 2021 19:07:38 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 04EC7B1FE; Sun, 16 May 2021 23:06:22 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-rockchip@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org Subject: [PATCH 9/9] arm64: dts: rockchip: rk1808: Add CPU operating points Date: Mon, 17 May 2021 01:05:51 +0200 Message-Id: <20210516230551.12469-10-afaerber@suse.de> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210516230551.12469-1-afaerber@suse.de> References: <20210516230551.12469-1-afaerber@suse.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Associate operating points with both CPU nodes. Data source is the shipping TB-RK1808M0 DTB. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/rockchip/rk1808.dtsi | 64 ++++++++++++++++++++++++ 1 file changed, 64 insertions(+) -- 2.31.1 diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index b4a71c5c8be7..82614c47f144 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -32,7 +32,10 @@ cpu0: cpu@0 { compatible = "arm,cortex-a35"; reg = <0x0 0x0>; enable-method = "psci"; + dynamic-power-coefficient = <74>; + operating-points-v2 = <&cpu0_opp_table>; cpu-idle-states = <&CPU_SLEEP>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -40,6 +43,7 @@ cpu1: cpu@1 { compatible = "arm,cortex-a35"; reg = <0x0 0x1>; enable-method = "psci"; + operating-points-v2 = <&cpu0_opp_table>; cpu-idle-states = <&CPU_SLEEP>; }; @@ -57,6 +61,66 @@ CPU_SLEEP: cpu-sleep { }; }; + cpu0_opp_table: cpu0-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + opp-suspend; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + + opp-816000000 { + opp-hz = /bits/ 64 <816000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <750000 750000 950000>; + clock-latency-ns = <40000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <800000 800000 950000>; + clock-latency-ns = <40000>; + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <825000 825000 950000>; + clock-latency-ns = <40000>; + }; + + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <850000 850000 950000>; + clock-latency-ns = <40000>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <875000 875000 950000>; + clock-latency-ns = <40000>; + }; + + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <900000 900000 950000>; + clock-latency-ns = <40000>; + }; + }; + arm-pmu { compatible = "arm,cortex-a35-pmu"; interrupts = ,