From patchwork Mon Jul 16 12:57:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 142016 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2392637ljj; Mon, 16 Jul 2018 05:58:01 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeSfAKMkm1OvDg+uV+FaB9A0d3caOEp6anJjL7hzdQwRFz0g8R5tg1X4CckgVJM1gFwEQAn X-Received: by 2002:a17:902:6e09:: with SMTP id u9-v6mr16177989plk.13.1531745881838; Mon, 16 Jul 2018 05:58:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531745881; cv=none; d=google.com; s=arc-20160816; b=OKKyY/w5DfmdvYbMtHR04iitFC0NOGuw6uhEeAEY5XdkMhUo3+j43vuzOB2N5+HCNq LOjqtjq5gixnGEXyjirKKEe7xgydSxJwutecAzu4sXbVJIRC6FksEBgGEIoRX47+1vIc pOO9dGiOUvG8Nnk1VyuHvuxa2g5cbUunp7ZF4SAbPpEqKfzzpoAvAK1PsOZk3DYyDhaC NyZc+4jHgJy7V+jwFNR2MaFfSXuK94a2C5p31WV5/SRELC31lPqbnzMhphSZeXVhh8Ce WyvE8h0XI+jgz7anb8HHUHZS7fpD6YYALJCzdA8dOGrsNKWb8vmF1KTjFSujTW59JMZt ArjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=eb/z5CDIpvdlk0dcBXblmR/bOLhvEC0nswlD9Oj9THE=; b=aEy3VVPkIw/aTBcDOkXYOlNPWJGhOcrLChi+sDrKTQPSeuJPRc9vnZW2ynv29pztSS XiJHA9Goy0L49RhVYsuLISb6MfLZMncFTs9ES4yH4mkcIz+cjhoe6FgUCB2rattGT83Y 1SzAuZOYYeqrDA7CRumrdwDaqU7Qsa3wZUw63HYDVCxBfMFPFJzIIJxX5FOqq+kjVig4 EbUv1L3KH4796VqEJFhpncdOLs3uC7ajzgrizP8mcqjPt6LmSh8zbK3eoGH/BkEfZpkF BVKhcGwxj+4ce0yyHhWpyeXRLC19CssU48UhSX1tdP7Bo009m34O5lz0k7mLtbL4jfYk xVGg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x19-v6si29079565plr.15.2018.07.16.05.58.01; Mon, 16 Jul 2018 05:58:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729607AbeGPNZU (ORCPT + 5 others); Mon, 16 Jul 2018 09:25:20 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:44971 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728734AbeGPNZU (ORCPT ); Mon, 16 Jul 2018 09:25:20 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w6GCrs2b030830; Mon, 16 Jul 2018 14:57:42 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2k85recaae-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 16 Jul 2018 14:57:42 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C579131; Mon, 16 Jul 2018 12:57:41 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 903F1E25; Mon, 16 Jul 2018 12:57:41 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 16 Jul 2018 14:57:41 +0200 From: Alexandre Torgue To: Linus Walleij , Maxime Coquelin , Rob Herring , Mark Rutland CC: , , , , Subject: [PATCH 2/2] pinctrl: stm32: check node status before new gpio bank registering Date: Mon, 16 Jul 2018 14:57:37 +0200 Message-ID: <1531745857-5561-3-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531745857-5561-1-git-send-email-alexandre.torgue@st.com> References: <1531745857-5561-1-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG5NODE3.st.com (10.75.127.15) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-07-16_04:, , signatures=0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Register a new GPIO bank only if GPIO bank node is enabled. This patch also adds checks on ranges which are defined only if a bank is registered. Signed-off-by: Alexandre Torgue -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index eb6ae14..111225e 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -639,6 +639,11 @@ static int stm32_pmx_set_mux(struct pinctrl_dev *pctldev, } range = pinctrl_find_gpio_range_from_pin(pctldev, g->pin); + if (!range) { + dev_err(pctl->dev, "No gpio range defined.\n"); + return -EINVAL; + } + bank = gpiochip_get_data(range->gc); pin = stm32_gpio_pin(g->pin); @@ -807,11 +812,17 @@ static int stm32_pconf_parse_conf(struct pinctrl_dev *pctldev, unsigned int pin, enum pin_config_param param, enum pin_config_param arg) { + struct stm32_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); struct pinctrl_gpio_range *range; struct stm32_gpio_bank *bank; int offset, ret = 0; range = pinctrl_find_gpio_range_from_pin(pctldev, pin); + if (!range) { + dev_err(pctl->dev, "No gpio range defined.\n"); + return -EINVAL; + } + bank = gpiochip_get_data(range->gc); offset = stm32_gpio_pin(pin); @@ -893,6 +904,9 @@ static void stm32_pconf_dbg_show(struct pinctrl_dev *pctldev, bool val; range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); + if (!range) + return; + bank = gpiochip_get_data(range->gc); offset = stm32_gpio_pin(pin); @@ -1173,7 +1187,7 @@ int stm32_pctl_probe(struct platform_device *pdev) return PTR_ERR(pctl->pctl_dev); } - for_each_child_of_node(np, child) + for_each_available_child_of_node(np, child) if (of_property_read_bool(child, "gpio-controller")) banks++; @@ -1186,7 +1200,7 @@ int stm32_pctl_probe(struct platform_device *pdev) if (!pctl->banks) return -ENOMEM; - for_each_child_of_node(np, child) { + for_each_available_child_of_node(np, child) { if (of_property_read_bool(child, "gpio-controller")) { ret = stm32_gpiolib_register_bank(pctl, child); if (ret)