From patchwork Thu Jul 19 17:44:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 142370 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2012157ljj; Thu, 19 Jul 2018 10:45:56 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeWP8Qlq6om1zQjx15WgtQGp5yW5S1WG/KVyoWeoTcS0a73X8MwycsH1jqdWvZERlV015fy X-Received: by 2002:a17:902:784d:: with SMTP id e13-v6mr10806771pln.197.1532022356012; Thu, 19 Jul 2018 10:45:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532022356; cv=none; d=google.com; s=arc-20160816; b=eMaiT7bHKC2zWFe1DJA8juJK2sJL0PqVZgDHRv27bFiqQoBMFD8wApRTm9HxtVY6ic H/9gCwOZZ5p02L7GEUJwAkv3myM6dq3m72dzIvH7OM64ynFyAe575Ll3lWI95rZrCNqQ 07YvLCeCOdd4btDUKpc4jFqueZhTP2jK2vvrNWIa5QTXrEFkd2ip2UitifwwQX8gpQaj Iwve+z4JxfBarTu7BGyvQfSHdJfNSAe/7Zoac5h7+mVjP9u55g5eE01bTynVUHtBdGNn YC7zNJWQaMVvmfT+cMOzj+cXWxLbC26329iMKVk6Q6Woi20Mv5sv2r4v1SzkSvxGShv8 OSmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Cn44zRXTGPvctvheSaCqVbmMOifURQsNzfmRLTYAid8=; b=AMJ0XYpSd77Vlzdl0hp41/ESjIqMesehY6gKrTeUxiripnZew9+B470zcTRNkEeny3 +dlhfsPnACGaYFK2aZk9EemxvSWArGzPaGdJfS4F6KsyegN5WPvsPOAzTcv/uBTMF4bF moP1pFDUG+D6ylzMQv05xnhWVaH/+51Xyd0W0afpMVU3R6y29svO6qGmwkhwYTNN2idl ozN799hqIss8Erj4VAT2Vp5RePCeTuvqHmhHpOOqNlHzaqi2MAM10AdBpObbWoXbfqA9 IXoZYBc8WS8GzB6BaywZTUmfzNCjZdrDe3wHPw7jtlO3XPG8tC2MDCwJCLcsMucJV6NG X/aw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FpkRgRu4; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 29-v6si6588164pgv.292.2018.07.19.10.45.55; Thu, 19 Jul 2018 10:45:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FpkRgRu4; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732029AbeGSSaH (ORCPT + 5 others); Thu, 19 Jul 2018 14:30:07 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:45890 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732070AbeGSSaG (ORCPT ); Thu, 19 Jul 2018 14:30:06 -0400 Received: by mail-pg1-f194.google.com with SMTP id f1-v6so4398006pgq.12 for ; Thu, 19 Jul 2018 10:45:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Bcvpf2JwZdjv59xkZ4zzQ6yiuLiqFtQKkQsfAovx0i4=; b=FpkRgRu4dZleXRYQhUHMPXQ3tgX+QkA1HLbi1Opbp7v/6nxT4vkJadaVL0yMYCO4ew YR/DxkQ71DKCwjncumnjEA/Fjj1v1a4o8nfniQBK7GSlsrd48GVwdYwCN7fwxM67zCAV g49q0LYpVGbGS4G/CVrpfITQ6EAb62JdtM6kk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Bcvpf2JwZdjv59xkZ4zzQ6yiuLiqFtQKkQsfAovx0i4=; b=VY9gQFs31Z+R1ouzm1uUb3KKx0gh68K7XyvehdkJQpqT+H7ibnVaYlh2YceoqM1Q3B mRily5/UnCk5tlxCSz7zn44/9G+IH0d3FPHtkAkrfov6a5IU5zcvbIWQv2NWlVWLdvwP ROdJ07uNvzDeL0nNjpScXEt4lqfMx5VEZTKk1gQ3obUH9plLmtAlAUAtsWeffstMluyj ePeqjoZwHOP/bg1J9uz7ZBLLUwNNpWAKBZH5ScyQdM4y7N+b9VLgtqZb6i5K308kYMsK W78brCR+bn5qN7dUaGE0nyL1WjKUt+3S2jQre36+5oB3D9OBjpiuX/Scf9UXZJwW0nVZ XZFg== X-Gm-Message-State: AOUpUlFaP0BTToj1Eigd+nkvWybLEM6jDpFXAE8YrXR3zWM9DyOUeTkl dWpu7AiV3kXO5btr3WGnBOcp X-Received: by 2002:a62:843:: with SMTP id c64-v6mr10540670pfd.14.1532022354235; Thu, 19 Jul 2018 10:45:54 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6081:b056:55fa:fd42:61de:739]) by smtp.gmail.com with ESMTPSA id h2-v6sm10114639pgc.90.2018.07.19.10.45.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jul 2018 10:45:53 -0700 (PDT) From: Manivannan Sadhasivam To: wsa@the-dreams.de, robh+dt@kernel.org, afaerber@suse.de Cc: linus.walleij@linaro.org, linux-i2c@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, Manivannan Sadhasivam Subject: [PATCH v5 1/6] dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C controller Date: Thu, 19 Jul 2018 23:14:00 +0530 Message-Id: <20180719174405.7210-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> References: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add devicetree binding for Actions Semiconductor Owl I2C controller Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../devicetree/bindings/i2c/i2c-owl.txt | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.txt -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/i2c/i2c-owl.txt b/Documentation/devicetree/bindings/i2c/i2c-owl.txt new file mode 100644 index 000000000000..b743fe444e9f --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-owl.txt @@ -0,0 +1,27 @@ +Actions Semiconductor Owl I2C controller + +Required properties: + +- compatible : Should be "actions,s900-i2c". +- reg : Offset and length of the register set for the device. +- #address-cells : Should be 1. +- #size-cells : Should be 0. +- interrupts : A single interrupt specifier. +- clocks : Phandle of the clock feeding the I2C controller. + +Optional properties: + +- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and + Fast modes are supported, possible values are 100000 and + 400000. +Examples: + + i2c0: i2c@e0170000 { + compatible = "actions,s900-i2c"; + reg = <0 0xe0170000 0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clock CLK_I2C0>; + clock-frequency = <100000>; + }; From patchwork Thu Jul 19 17:44:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 142371 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2012296ljj; Thu, 19 Jul 2018 10:46:06 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcklOeVAg9dsFUpCHaglsAhWNLDPgIwG0ppu/BWN2TAzhVjZFJG52hwIWbKW4KBA3DRkowj X-Received: by 2002:a63:f557:: with SMTP id e23-v6mr10716726pgk.170.1532022365941; Thu, 19 Jul 2018 10:46:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532022365; cv=none; d=google.com; s=arc-20160816; b=Xy43CPeEU40YqANVnMVgBeRXLwS2U8s+DqUndGJjY4l5gZiQq0folhzZ+WCC2P61w2 G9sTgej+p6VXfbefIus/vEnGLCd3i6LbszVK6ppCoL9UwvGrl1MDa9ZchFsEQuZLKuAl KrKMH6x5qznSaST0rfLRa7fIcVn3pMM6IM9uau54XVI9KheIAOAiKJFHzrYQ4WqlQcVK vTBt5yub34Z3u81fzt+SdkW5qK5Q5m/hY/tBh7hLyRNOUbR+K/LCTm+IBbpSgxowIomC wJtmSVfVu3It8Xo6fdIDMbhDXjUO0I8pLAwNkPWocLuZpsc8WyPL6WDaK9eOyrInNFQ7 tTaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=B5VHjDoArZfwJoeuBac8pCYMc/MhBY/ent7SYqhw7jI=; b=AaT4WzmM1ze4V8SNLPFyS6evs7P1W/X3/qY6axbMoyN4arvpJwF/xGmyJOC7O2GZ67 llMxZPWPwjk42QT8HqHS8x6l7wdoP9BgoorKn/V+rOT+bmzwpMoHgkwiBeo3KaJQ5CYF 3dt4nch2tMf0V3KCpFpeRq0tp+YTRUIwm0je7JihBY1g2hFhUooMQn7ceJ6ROtLIQzIT yIetYjXaVloejNFdOd9qKUnRlTmdkXopykDERUIJATuOgAwOs4AaaRTVbu9eAxdjC9oy K/eeGNbhIC/NJE7I/4EUvsR6z44kPIwjW06F2IatC6ahkIKXkQoNgW+ha58HAd0/Xg7M R1+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=h4vZuKRN; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y65-v6si6336118pgb.199.2018.07.19.10.46.05; Thu, 19 Jul 2018 10:46:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=h4vZuKRN; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732162AbeGSSaR (ORCPT + 5 others); Thu, 19 Jul 2018 14:30:17 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:40439 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732157AbeGSSaR (ORCPT ); Thu, 19 Jul 2018 14:30:17 -0400 Received: by mail-pg1-f196.google.com with SMTP id x5-v6so4400477pgp.7 for ; Thu, 19 Jul 2018 10:46:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=G9Pra/HIrTIdZzogTmPr0pWDqZgp6mkljxVwg8UNDhk=; b=h4vZuKRNXdW3oOo8fZ2we6a4IvDeeDeY55HLfiry6cXfCm21I7Lm1zc0hnQ3Hj5uiI cXs6VHxIbd2cCHRcYZ6X1M7qxgi7PzGhLSdw/rRUqabR6Y27pfJEppX7uwOserLUZZVf vCbqyh+o2YJ7NJkf4usBtIuiMsP6hpARmBlts= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=G9Pra/HIrTIdZzogTmPr0pWDqZgp6mkljxVwg8UNDhk=; b=kY9//4W3xB+MnzSJxYf880BE6mKf077uCqhMnrMaAtWgieixGm+FUv+DEr4833lfvS PS9eshKm1+9NWVGms/i9FpZEnyBO6v0lPBTbjek9yNZncYLQA0dAwouMv6RJgDOR+UkJ 3V+ZSKhJyjzZnK2nimpRTY0N572F2llWgG0vEomzfmwbMx+XZNqQM45eN1wiWnpiuUyy hnT4NIUwyxPKUb5jqKRvoNVUjtgh+1qt51r/iKSI5iLsX5ANBMeiBCm8yzHBldak4ZkQ Ks3iFuSLmHEhSifQZWrNYtRrmE7NuainIPqoJOGJPz9FyoPBnZjwRkEFxRXeSqT5FLoW rpyw== X-Gm-Message-State: AOUpUlGELw5n93MT2sY4I7xD/rJJJSO/A70/PK0wtHX3sw6CVaHKK7Zd z9nEf38Y8Y65pBhqfsoCZC7T X-Received: by 2002:a63:5c10:: with SMTP id q16-v6mr10896378pgb.452.1532022364509; Thu, 19 Jul 2018 10:46:04 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6081:b056:55fa:fd42:61de:739]) by smtp.gmail.com with ESMTPSA id h2-v6sm10114639pgc.90.2018.07.19.10.45.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jul 2018 10:46:03 -0700 (PDT) From: Manivannan Sadhasivam To: wsa@the-dreams.de, robh+dt@kernel.org, afaerber@suse.de Cc: linus.walleij@linaro.org, linux-i2c@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, Manivannan Sadhasivam Subject: [PATCH v5 2/6] arm64: dts: actions: Add pinctrl definition for S900 I2C controller Date: Thu, 19 Jul 2018 23:14:01 +0530 Message-Id: <20180719174405.7210-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> References: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add pinctrl definition for Actions Semiconductor S900 I2C controller. Pinctrl definitions are only available for I2C0, I2C1, and I2C2. Signed-off-by: Manivannan Sadhasivam --- .../dts/actions/s900-bubblegum-96-pins.dtsi | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi b/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi new file mode 100644 index 000000000000..95e8b31071f9 --- /dev/null +++ b/arch/arm64/boot/dts/actions/s900-bubblegum-96-pins.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +&pinctrl { + + i2c0_default: i2c0_default { + pinmux { + groups = "i2c0_mfp"; + function = "i2c0"; + }; + pinconf { + pins = "i2c0_sclk", "i2c0_sdata"; + bias-pull-up; + }; + }; + + i2c1_default: i2c1_default { + pinconf { + pins = "i2c1_sclk", "i2c1_sdata"; + bias-pull-up; + }; + }; + + i2c2_default: i2c2_default { + pinconf { + pins = "i2c2_sclk", "i2c2_sdata"; + bias-pull-up; + }; + }; +}; From patchwork Thu Jul 19 17:44:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 142374 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2012812ljj; Thu, 19 Jul 2018 10:46:38 -0700 (PDT) X-Google-Smtp-Source: AAOMgpd48rNdLWOoi1um0G/A/PNJu/RE75kR9nkW97mEwu22AyMPPXCfS6j6TiMbFg/UqPbBi8oI X-Received: by 2002:a62:2744:: with SMTP id n65-v6mr6750159pfn.125.1532022397985; Thu, 19 Jul 2018 10:46:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532022397; cv=none; d=google.com; s=arc-20160816; b=Ly0i2YvYgOkkC60Nr4KeOIUI6OA4I5hP8zRHAAS9Sdk/Y8n4lT7iNSjAAvIuHvZliQ t1cPveVTyIJWXlJQwtg8fj0BMt7xmrGfOdlP9XMNVA3dq/0YdPN5zmxiJmbqORLLYym7 cAnSwTk6aIZaQsys5pzznBwqHj+fM7YppBcxYd9TJKA0NDC9PBUSZ7NHKMDdd1bdVQB3 NclUVskcpuKpfChzCpaPEE0I1eRZx7WaIb3duQbNhf0W/kSLe7V6KuwZVeiGepyojYAS J/5nkWyzAbHIFPoCY9Q209OhIYZVgagVcamYyZ3xH2InaB4L7xDgUEiXe5t+JCEYB7Of 7c1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=uswFOYzsx6/4uM1M5/A2baKZASQbuIxgzOAlvpoI4aY=; b=nN0vIwLwg4TJdSh/MrAUQsDw+5TQQOkDWDcTqCb8bzviYz3BWj9uGiq9hFD4MpVtv6 OsDzWvfsw9kuespI3pLDRhCT4v4jXWPAEYBFQgTVY6BStxXdvhQYqxMAIuPByXAO76R+ 9aOl18jqaR9ejAN41DIq1TbhuFEAmsEC0hl7tZMYdl0q55/flyhyYJam+UJBRixRIuvy FOAYWkLgFcbqkI7YJhGvnPL1D4Mbn8vk3+g7c4HkWNiOsW9Exr/iVWKy/uCBNbJmzv9/ Au0SuXgs40eD12RdNqidbl1GTtT6M0/NRdQ8mULx20CeG5DKAiMDKX64Fpmv5SVIzvuR ae9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=b9UOiVSL; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q17-v6si6191224pff.173.2018.07.19.10.46.37; Thu, 19 Jul 2018 10:46:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=b9UOiVSL; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732132AbeGSSat (ORCPT + 5 others); Thu, 19 Jul 2018 14:30:49 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:37079 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732087AbeGSSat (ORCPT ); Thu, 19 Jul 2018 14:30:49 -0400 Received: by mail-pg1-f195.google.com with SMTP id n7-v6so4415429pgq.4 for ; Thu, 19 Jul 2018 10:46:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sPBC3iqyBevfdj3aO/jLp+DjDGCJA8poBdF6YB7t8cY=; b=b9UOiVSLIw4xSurp2LL3oe6wUgE4gQ5zmDnnBSq7HDEF+n/R/IA/RPjpGmX8ouvPq5 Gn4pCdEV33LLhpzIqqXTvM7mvR0YaXF8LsTnT/QC5zaICNHh8S5sZWJLBd2GAfF335xW uf7FQvHE9RxkER/7SyVPx5PEbsBTwbqf6zzyI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sPBC3iqyBevfdj3aO/jLp+DjDGCJA8poBdF6YB7t8cY=; b=mgMZlYPN5EOIxVSUTP6uI4RYkBGY+hSkLmgrHPatkAnXQpSpGRQ8lTHJcfao84LtMm 6Wr6EuekgX9PrmIhmGiErktIp3XROIq3wMuzM1aCIT37BVuwadLdx+zgC7jXCgCBF80F VV8vV7+O4sPB/ZEBkLvTdboyNI3+tZMI7oC00IxJnwRS7KP8Mvd+JbVj7m/z7OXm8R0L YcXXam6FnFCaU+BjdNGzexnLfmIHovuc2yAL66VnIe3YABzysnxf2wn2cZN0Ku1Y9FOc FG2rw1BL3IUQjp3KH10OTSY2dmGz7rDdM82xcrBxO4U93oIxcMqgo6v/z6scw1+NL26l TIDw== X-Gm-Message-State: AOUpUlGogIvHQmsrqXd2MvUNJPL0O7t1JP8GbVkcGpEqbWSqQ3cx2I7N y0qLSL+1JioiEzM2eEsXjy8R X-Received: by 2002:a63:342:: with SMTP id 63-v6mr10607461pgd.290.1532022396149; Thu, 19 Jul 2018 10:46:36 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6081:b056:55fa:fd42:61de:739]) by smtp.gmail.com with ESMTPSA id h2-v6sm10114639pgc.90.2018.07.19.10.46.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jul 2018 10:46:35 -0700 (PDT) From: Manivannan Sadhasivam To: wsa@the-dreams.de, robh+dt@kernel.org, afaerber@suse.de Cc: linus.walleij@linaro.org, linux-i2c@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, Manivannan Sadhasivam Subject: [PATCH v5 5/6] i2c: Add Actions Semiconductor Owl family S900 I2C driver Date: Thu, 19 Jul 2018 23:14:04 +0530 Message-Id: <20180719174405.7210-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> References: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add Actions Semiconductor Owl family S900 I2C driver. Signed-off-by: Manivannan Sadhasivam Acked-by: Peter Rosin --- drivers/i2c/busses/Kconfig | 7 + drivers/i2c/busses/Makefile | 1 + drivers/i2c/busses/i2c-owl.c | 495 +++++++++++++++++++++++++++++++++++ 3 files changed, 503 insertions(+) create mode 100644 drivers/i2c/busses/i2c-owl.c -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 4f8df2ec87b1..8c8025f87ce4 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -762,6 +762,13 @@ config I2C_OMAP Like OMAP1510/1610/1710/5912 and OMAP242x. For details see http://www.ti.com/omap. +config I2C_OWL + tristate "Actions Semiconductor Owl I2C Controller" + depends on ARCH_ACTIONS || COMPILE_TEST + help + Say Y here if you want to use the I2C bus controller on + the Actions Semiconductor Owl SoC's. + config I2C_PASEMI tristate "PA Semi SMBus interface" depends on PPC_PASEMI && PCI diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 5a869144a0c5..b71618f77880 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -76,6 +76,7 @@ obj-$(CONFIG_I2C_MXS) += i2c-mxs.o obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o obj-$(CONFIG_I2C_OMAP) += i2c-omap.o +obj-$(CONFIG_I2C_OWL) += i2c-owl.o obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o diff --git a/drivers/i2c/busses/i2c-owl.c b/drivers/i2c/busses/i2c-owl.c new file mode 100644 index 000000000000..4f5836fa5022 --- /dev/null +++ b/drivers/i2c/busses/i2c-owl.c @@ -0,0 +1,495 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Actions Semiconductor Owl SoC's I2C driver + * + * Copyright (c) 2014 Actions Semi Inc. + * Author: David Liu + * + * Copyright (c) 2018 Linaro Ltd. + * Author: Manivannan Sadhasivam + */ + +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers */ +#define OWL_I2C_REG_CTL 0x0000 +#define OWL_I2C_REG_CLKDIV 0x0004 +#define OWL_I2C_REG_STAT 0x0008 +#define OWL_I2C_REG_ADDR 0x000C +#define OWL_I2C_REG_TXDAT 0x0010 +#define OWL_I2C_REG_RXDAT 0x0014 +#define OWL_I2C_REG_CMD 0x0018 +#define OWL_I2C_REG_FIFOCTL 0x001C +#define OWL_I2C_REG_FIFOSTAT 0x0020 +#define OWL_I2C_REG_DATCNT 0x0024 +#define OWL_I2C_REG_RCNT 0x0028 + +/* I2Cx_CTL Bit Mask */ +#define OWL_I2C_CTL_RB BIT(1) +#define OWL_I2C_CTL_GBCC(x) (((x) & 0x3) << 2) +#define OWL_I2C_CTL_GBCC_NONE OWL_I2C_CTL_GBCC(0) +#define OWL_I2C_CTL_GBCC_START OWL_I2C_CTL_GBCC(1) +#define OWL_I2C_CTL_GBCC_STOP OWL_I2C_CTL_GBCC(2) +#define OWL_I2C_CTL_GBCC_RSTART OWL_I2C_CTL_GBCC(3) +#define OWL_I2C_CTL_IRQE BIT(5) +#define OWL_I2C_CTL_EN BIT(7) +#define OWL_I2C_CTL_AE BIT(8) +#define OWL_I2C_CTL_SHSM BIT(10) + +#define OWL_I2C_DIV_FACTOR(x) ((x) & 0xff) + +/* I2Cx_STAT Bit Mask */ +#define OWL_I2C_STAT_RACK BIT(0) +#define OWL_I2C_STAT_BEB BIT(1) +#define OWL_I2C_STAT_IRQP BIT(2) +#define OWL_I2C_STAT_LAB BIT(3) +#define OWL_I2C_STAT_STPD BIT(4) +#define OWL_I2C_STAT_STAD BIT(5) +#define OWL_I2C_STAT_BBB BIT(6) +#define OWL_I2C_STAT_TCB BIT(7) +#define OWL_I2C_STAT_LBST BIT(8) +#define OWL_I2C_STAT_SAMB BIT(9) +#define OWL_I2C_STAT_SRGC BIT(10) + +/* I2Cx_CMD Bit Mask */ +#define OWL_I2C_CMD_SBE BIT(0) +#define OWL_I2C_CMD_RBE BIT(4) +#define OWL_I2C_CMD_DE BIT(8) +#define OWL_I2C_CMD_NS BIT(9) +#define OWL_I2C_CMD_SE BIT(10) +#define OWL_I2C_CMD_MSS BIT(11) +#define OWL_I2C_CMD_WRS BIT(12) +#define OWL_I2C_CMD_SECL BIT(15) + +#define OWL_I2C_CMD_AS(x) (((x) & 0x7) << 1) +#define OWL_I2C_CMD_SAS(x) (((x) & 0x7) << 5) + +/* I2Cx_FIFOCTL Bit Mask */ +#define OWL_I2C_FIFOCTL_NIB BIT(0) +#define OWL_I2C_FIFOCTL_RFR BIT(1) +#define OWL_I2C_FIFOCTL_TFR BIT(2) + +/* I2Cc_FIFOSTAT Bit Mask */ +#define OWL_I2C_FIFOSTAT_RNB BIT(1) +#define OWL_I2C_FIFOSTAT_RFE BIT(2) +#define OWL_I2C_FIFOSTAT_TFF BIT(5) +#define OWL_I2C_FIFOSTAT_TFD GENMASK(23, 16) +#define OWL_I2C_FIFOSTAT_RFD GENMASK(15, 8) + +/* I2C bus timeout */ +#define OWL_I2C_TIMEOUT msecs_to_jiffies(4 * 1000) + +#define OWL_I2C_MAX_RETRIES 50 + +#define OWL_I2C_DEF_SPEED_HZ 100000 +#define OWL_I2C_MAX_SPEED_HZ 400000 + +struct owl_i2c_dev { + struct i2c_adapter adap; + struct i2c_msg *msg; + struct completion msg_complete; + struct clk *clk; + spinlock_t lock; + void __iomem *base; + unsigned long clk_rate; + u32 bus_freq; + u32 msg_ptr; +}; + +static void owl_i2c_update_reg(void __iomem *reg, unsigned int val, bool state) +{ + unsigned int regval; + + regval = readl(reg); + + if (state) + regval |= val; + else + regval &= ~val; + + writel(regval, reg); +} + +static void owl_i2c_reset(struct owl_i2c_dev *i2c_dev) +{ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, + OWL_I2C_CTL_EN, false); + mdelay(1); + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, + OWL_I2C_CTL_EN, true); + + /* Clear status registers */ + writel(0, i2c_dev->base + OWL_I2C_REG_STAT); +} + +static int owl_i2c_reset_fifo(struct owl_i2c_dev *i2c_dev) +{ + unsigned int val, timeout = 0; + + /* Reset FIFO */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL, + OWL_I2C_FIFOCTL_RFR | OWL_I2C_FIFOCTL_TFR, + true); + + /* Wait 50ms for FIFO reset complete */ + do { + val = readl(i2c_dev->base + OWL_I2C_REG_FIFOCTL); + if (!(val & (OWL_I2C_FIFOCTL_RFR | OWL_I2C_FIFOCTL_TFR))) + break; + usleep_range(500, 1000); + } while (timeout++ < OWL_I2C_MAX_RETRIES); + + if (timeout > OWL_I2C_MAX_RETRIES) { + dev_err(&i2c_dev->adap.dev, "FIFO reset timeout"); + return -ETIMEDOUT; + } + + return 0; +} + +static void owl_i2c_set_freq(struct owl_i2c_dev *i2c_dev) +{ + unsigned int val; + + val = DIV_ROUND_UP(i2c_dev->clk_rate, i2c_dev->bus_freq * 16); + + /* Set clock divider factor */ + writel(OWL_I2C_DIV_FACTOR(val), i2c_dev->base + OWL_I2C_REG_CLKDIV); +} + +static irqreturn_t owl_i2c_interrupt(int irq, void *_dev) +{ + struct owl_i2c_dev *i2c_dev = _dev; + struct i2c_msg *msg = i2c_dev->msg; + unsigned long flags; + unsigned int stat, fifostat; + + spin_lock_irqsave(&i2c_dev->lock, flags); + + fifostat = readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT); + if (fifostat & OWL_I2C_FIFOSTAT_RNB) { + dev_dbg(&i2c_dev->adap.dev, "received NACK from device"); + goto stop; + } + + stat = readl(i2c_dev->base + OWL_I2C_REG_STAT); + if (stat & OWL_I2C_STAT_BEB) { + dev_dbg(&i2c_dev->adap.dev, "bus error"); + goto stop; + } + + /* Handle FIFO read */ + if (msg->flags & I2C_M_RD) { + while ((readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) & + OWL_I2C_FIFOSTAT_RFE) && i2c_dev->msg_ptr < msg->len) { + msg->buf[i2c_dev->msg_ptr++] = readl(i2c_dev->base + + OWL_I2C_REG_RXDAT); + } + } else { + /* Handle the remaining bytes which were not sent */ + while (!(readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) & + OWL_I2C_FIFOSTAT_TFF) && i2c_dev->msg_ptr < msg->len) { + writel(msg->buf[i2c_dev->msg_ptr++], + i2c_dev->base + OWL_I2C_REG_TXDAT); + } + } + +stop: + /* Clear pending interrupts */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_STAT, + OWL_I2C_STAT_IRQP, true); + + complete_all(&i2c_dev->msg_complete); + spin_unlock_irqrestore(&i2c_dev->lock, flags); + + return IRQ_HANDLED; +} + +static u32 owl_i2c_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; +} + +static int owl_i2c_check_bus_busy(struct i2c_adapter *adap) +{ + struct owl_i2c_dev *i2c_dev = i2c_get_adapdata(adap); + unsigned long timeout; + + /* Check for Bus busy */ + timeout = jiffies + OWL_I2C_TIMEOUT; + while (readl(i2c_dev->base + OWL_I2C_REG_STAT) & OWL_I2C_STAT_BBB) { + if (time_after(jiffies, timeout)) { + dev_err(&adap->dev, "Bus busy timeout"); + return -ETIMEDOUT; + } + } + + return 0; +} + +static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, + int num) +{ + struct owl_i2c_dev *i2c_dev = i2c_get_adapdata(adap); + struct i2c_msg *msg; + unsigned long time_left, flags; + unsigned int i2c_cmd, val; + unsigned int addr; + int ret, idx; + + spin_lock_irqsave(&i2c_dev->lock, flags); + + /* Reset I2C controller */ + owl_i2c_reset(i2c_dev); + + /* Set bus frequency */ + owl_i2c_set_freq(i2c_dev); + + /* + * Spinlock should be released before calling reset FIFO and + * bus busy check since those functions may sleep + */ + spin_unlock_irqrestore(&i2c_dev->lock, flags); + + /* Reset FIFO */ + ret = owl_i2c_reset_fifo(i2c_dev); + if (ret) + goto unlocked_err_exit; + + /* Check for bus busy */ + ret = owl_i2c_check_bus_busy(adap); + if (ret) + goto unlocked_err_exit; + + spin_lock_irqsave(&i2c_dev->lock, flags); + + /* Check for Arbitration lost */ + val = readl(i2c_dev->base + OWL_I2C_REG_STAT); + if (val & OWL_I2C_STAT_LAB) { + val &= ~OWL_I2C_STAT_LAB; + writel(val, i2c_dev->base + OWL_I2C_REG_STAT); + ret = -EAGAIN; + goto err_exit; + } + + reinit_completion(&i2c_dev->msg_complete); + + /* Enable I2C controller interrupt */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, + OWL_I2C_CTL_IRQE, true); + + /* + * Select: FIFO enable, Master mode, Stop enable, Data count enable, + * Send start bit + */ + i2c_cmd = OWL_I2C_CMD_SECL | OWL_I2C_CMD_MSS | OWL_I2C_CMD_SE | + OWL_I2C_CMD_NS | OWL_I2C_CMD_DE | OWL_I2C_CMD_SBE; + + /* Handle repeated start condition */ + if (num > 1) { + /* Set internal address length and enable repeated start */ + i2c_cmd |= OWL_I2C_CMD_AS(msgs[0].len + 1) | + OWL_I2C_CMD_SAS(1) | OWL_I2C_CMD_RBE; + + /* Write slave address */ + addr = i2c_8bit_addr_from_msg(&msgs[0]); + writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT); + + /* Write internal register address */ + for (idx = 0; idx < msgs[0].len; idx++) + writel(msgs[0].buf[idx], i2c_dev->base + + OWL_I2C_REG_TXDAT); + + msg = &msgs[1]; + } else { + /* Set address length */ + i2c_cmd |= OWL_I2C_CMD_AS(1); + msg = &msgs[0]; + } + + i2c_dev->msg = msg; + i2c_dev->msg_ptr = 0; + + /* Set data count for the message */ + writel(msg->len, i2c_dev->base + OWL_I2C_REG_DATCNT); + + addr = i2c_8bit_addr_from_msg(msg); + writel(addr, i2c_dev->base + OWL_I2C_REG_TXDAT); + + if (!(msg->flags & I2C_M_RD)) { + /* Write data to FIFO */ + for (idx = 0; idx < msg->len; idx++) { + /* Check for FIFO full */ + if (readl(i2c_dev->base + OWL_I2C_REG_FIFOSTAT) & + OWL_I2C_FIFOSTAT_TFF) + break; + + writel(msg->buf[idx], i2c_dev->base + + OWL_I2C_REG_TXDAT); + } + + i2c_dev->msg_ptr = idx; + } + + /* Ignore the NACK if needed */ + if (msg->flags & I2C_M_IGNORE_NAK) + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL, + OWL_I2C_FIFOCTL_NIB, true); + else + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL, + OWL_I2C_FIFOCTL_NIB, false); + + /* Start the transfer */ + writel(i2c_cmd, i2c_dev->base + OWL_I2C_REG_CMD); + + spin_unlock_irqrestore(&i2c_dev->lock, flags); + + time_left = wait_for_completion_timeout(&i2c_dev->msg_complete, + adap->timeout); + + spin_lock_irqsave(&i2c_dev->lock, flags); + if (time_left == 0) { + dev_err(&adap->dev, "Transaction timed out"); + /* Send stop condition and release the bus */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, + OWL_I2C_CTL_GBCC_STOP | + OWL_I2C_CTL_RB, true); + ret = -ETIMEDOUT; + goto err_exit; + } + + /* + * Here, -ENXIO will be returned if interrupt occurred but no + * read or write happened. Else if msg_ptr equals to message length, + * message count will be returned. + */ + ret = i2c_dev->msg_ptr == msg->len ? num : -ENXIO; + +err_exit: + spin_unlock_irqrestore(&i2c_dev->lock, flags); + +unlocked_err_exit: + /* Disable I2C controller */ + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL, + OWL_I2C_CTL_EN, false); + + return ret; +} + +static const struct i2c_algorithm owl_i2c_algorithm = { + .master_xfer = owl_i2c_master_xfer, + .functionality = owl_i2c_func, +}; + +static const struct i2c_adapter_quirks owl_i2c_quirks = { + .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST, + .max_read_len = 240, + .max_write_len = 240, + .max_comb_1st_msg_len = 6, + .max_comb_2nd_msg_len = 240, +}; + +static int owl_i2c_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct owl_i2c_dev *i2c_dev; + struct resource *res; + int ret, irq; + + i2c_dev = devm_kzalloc(dev, sizeof(*i2c_dev), GFP_KERNEL); + if (!i2c_dev) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + i2c_dev->base = devm_ioremap_resource(dev, res); + if (IS_ERR(i2c_dev->base)) + return PTR_ERR(i2c_dev->base); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(dev, "failed to get IRQ number\n"); + return irq; + } + + if (of_property_read_u32(dev->of_node, "clock-frequency", + &i2c_dev->bus_freq)) + i2c_dev->bus_freq = OWL_I2C_DEF_SPEED_HZ; + + /* We support only frequencies of 100k and 400k for now */ + if (i2c_dev->bus_freq != OWL_I2C_DEF_SPEED_HZ && + i2c_dev->bus_freq != OWL_I2C_MAX_SPEED_HZ) { + dev_err(dev, "invalid clock-frequency %d\n", i2c_dev->bus_freq); + return -EINVAL; + } + + i2c_dev->clk = devm_clk_get(dev, NULL); + if (IS_ERR(i2c_dev->clk)) { + dev_err(dev, "failed to get clock\n"); + return PTR_ERR(i2c_dev->clk); + } + + ret = clk_prepare_enable(i2c_dev->clk); + if (ret) + return ret; + + i2c_dev->clk_rate = clk_get_rate(i2c_dev->clk); + if (!i2c_dev->clk_rate) { + dev_err(dev, "input clock rate should not be zero\n"); + ret = -EINVAL; + goto disable_clk; + } + + init_completion(&i2c_dev->msg_complete); + spin_lock_init(&i2c_dev->lock); + i2c_dev->adap.owner = THIS_MODULE; + i2c_dev->adap.algo = &owl_i2c_algorithm; + i2c_dev->adap.timeout = OWL_I2C_TIMEOUT; + i2c_dev->adap.quirks = &owl_i2c_quirks; + i2c_dev->adap.dev.parent = dev; + i2c_dev->adap.dev.of_node = dev->of_node; + snprintf(i2c_dev->adap.name, sizeof(i2c_dev->adap.name), + "%s", "OWL I2C adapter"); + i2c_set_adapdata(&i2c_dev->adap, i2c_dev); + + platform_set_drvdata(pdev, i2c_dev); + + ret = devm_request_irq(dev, irq, owl_i2c_interrupt, 0, pdev->name, + i2c_dev); + if (ret) { + dev_err(dev, "failed to request irq %d\n", irq); + goto disable_clk; + } + + return i2c_add_adapter(&i2c_dev->adap); + +disable_clk: + clk_disable_unprepare(i2c_dev->clk); + + return ret; +} + +static const struct of_device_id owl_i2c_of_match[] = { + {.compatible = "actions,s900-i2c"}, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, owl_i2c_of_match); + +static struct platform_driver owl_i2c_driver = { + .probe = owl_i2c_probe, + .driver = { + .name = "owl-i2c", + .of_match_table = of_match_ptr(owl_i2c_of_match), + }, +}; +module_platform_driver(owl_i2c_driver); + +MODULE_AUTHOR("David Liu "); +MODULE_AUTHOR("Manivannan Sadhasivam "); +MODULE_DESCRIPTION("Actions Semiconductor Owl SoC's I2C driver"); +MODULE_LICENSE("GPL"); From patchwork Thu Jul 19 17:44:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 142375 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2012946ljj; Thu, 19 Jul 2018 10:46:47 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfpyGsPifyWzsnWF2VR1eBP4KOD7+VvP+tRi6T50xQhAO031GXD9CrHl9dhCrxFb+twi1Js X-Received: by 2002:a63:a543:: with SMTP id r3-v6mr10874922pgu.336.1532022407239; Thu, 19 Jul 2018 10:46:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532022407; cv=none; d=google.com; s=arc-20160816; b=wgRdYcu4c3h/ri3NzeFu5kr5G/MXDj6giAqogIm/4fgh4hlK25kVSkIWnnOnkrWr/J 2EBOrKcbqqI1antF46VMyEbcQ6cxGKdapD8vIu4kUuP+o7NAfSY7ZG7UAAGbhWXQ3NLG sbdmGBhWBlW4ugbQ0VFvs6YoAdpRyRIYmWVvhmWJKaDMmrmtEUTX9TlUTekQ3NUylLdk 6cAOXn0bYmZokuP3NKGiq0GhapANkBxg1X9cLasqnwsUNlAHt+h3mkdku4gIpPZRAAvF OjG74dEgg7+3DI/TX1kv7dfRRTi7CMZN8P22ebNOCOIwjTcff+DLRr4PXjV3J7oWeCz1 ZLjQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id 3-v6si6521154pgm.37.2018.07.19.10.46.47; Thu, 19 Jul 2018 10:46:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=DdJEiruK; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732994AbeGSSa6 (ORCPT + 5 others); Thu, 19 Jul 2018 14:30:58 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:42853 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732983AbeGSSa6 (ORCPT ); Thu, 19 Jul 2018 14:30:58 -0400 Received: by mail-pg1-f193.google.com with SMTP id y4-v6so4407810pgp.9 for ; Thu, 19 Jul 2018 10:46:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/b+N2DvOUUyA2A2wTJ+2C32b3lKHmvgv0TH8hNrLKeQ=; b=DdJEiruKOu80IBaZY5v8UzN+G4Kho2QABVzOkkCT/VTlCIU4Q7/BDlXzmP9Q45enoY SUaY69iSCa3kwQmA/qhUVtdsIdvGP5fKSqECM6+N/uczla2ocxsMhyyiSfA9z8pusQ84 QHmmX1Dh1TAirWY9QCss/DsFVgxKmILaqaTE8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/b+N2DvOUUyA2A2wTJ+2C32b3lKHmvgv0TH8hNrLKeQ=; b=B9d0tYHe9rMYpgOQBZ5fxi4l2Rn5R6dNYzbbXnm4TQYNuaNfvq+I1EMCbmQsPtMUsz Vt8UyciSeBLRtLs0TLiO4kRgT5nQW+1X7fkSE55WSrEznvkQ4VXN0Mz1HxqQ1r3E22ed zjv07U+9KOpDRsvjxDfQfEXIIQrqx/eEB0VodDp3sSNoBRFRxy1nztA4i7nb6RwxMbq3 647TXfjux5PRBQE6E5bH1vgIBvj5y4QQcZ9lNa2OvHcsbWPmfk9pyQK/BtPcOZSiu9E9 VATyqHIltdcQX027z1Up2YgujyxSe5PbtPZ+HxcDwaW7hEWfEwH1E/AMgQ0LQgW/XikS TF5Q== X-Gm-Message-State: AOUpUlFRGM1t95VywO1TTVL3Ie2/Y9lhu4W7p+kxbvldjP4y5AgaM+9c hL1HFGdxBRhSw1XoBDIrNGlU X-Received: by 2002:a63:5e45:: with SMTP id s66-v6mr10902714pgb.151.1532022405832; Thu, 19 Jul 2018 10:46:45 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6081:b056:55fa:fd42:61de:739]) by smtp.gmail.com with ESMTPSA id h2-v6sm10114639pgc.90.2018.07.19.10.46.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jul 2018 10:46:45 -0700 (PDT) From: Manivannan Sadhasivam To: wsa@the-dreams.de, robh+dt@kernel.org, afaerber@suse.de Cc: linus.walleij@linaro.org, linux-i2c@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, Manivannan Sadhasivam Subject: [PATCH v5 6/6] MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver Date: Thu, 19 Jul 2018 23:14:05 +0530 Message-Id: <20180719174405.7210-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> References: <20180719174405.7210-1-manivannan.sadhasivam@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add entry for Actions Semiconductor Owl I2C driver under ARM/ACTIONS Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/MAINTAINERS b/MAINTAINERS index 09b54e9ebc6f..5084c62712fa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1145,12 +1145,14 @@ F: arch/arm/boot/dts/owl-* F: arch/arm64/boot/dts/actions/ F: drivers/clk/actions/ F: drivers/clocksource/owl-* +F: drivers/i2c/busses/i2c-owl.c F: drivers/pinctrl/actions/* F: drivers/soc/actions/ F: include/dt-bindings/power/owl-* F: include/linux/soc/actions/ F: Documentation/devicetree/bindings/arm/actions.txt F: Documentation/devicetree/bindings/clock/actions,s900-cmu.txt +F: Documentation/devicetree/bindings/i2c/i2c-owl.txt F: Documentation/devicetree/bindings/pinctrl/actions,s900-pinctrl.txt F: Documentation/devicetree/bindings/power/actions,owl-sps.txt F: Documentation/devicetree/bindings/timer/actions,owl-timer.txt