From patchwork Fri Jul 20 09:56:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 142464 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2752665ljj; Fri, 20 Jul 2018 02:56:42 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdjazQ+JAZTuCT+xo2bxAcbGdZ8uHF8yaRpHBKbiI4uMulertRieKtEj05v7m60WRZr29H6 X-Received: by 2002:a17:902:7586:: with SMTP id j6-v6mr1426804pll.295.1532080602069; Fri, 20 Jul 2018 02:56:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532080602; cv=none; d=google.com; s=arc-20160816; b=qQDGq4UVpXMNrfOSaHqBSHhpAIAzg7yF7BEkkg01km20LfpFk46/afe94cHpxzQKeg 24Rfeemz0A3R1RDa+yN2KjIGP4VrrdfUU2XLUE8JRur9n0piOYr07/IenxT7/V7qFf98 q9IMIAgwCIJyaU7eAvD4I+RPuGp2loVNl+ebnSx+31jZnr0gA/ObGZ8uXehIYONaNVX1 MYJurYAyhxJGp6LX5lGlkqlSOJuj5rMr9B2UzvIXlZEES1Efu0YkSk7BEj3iD5958AR4 ZXxGs/ovp28vNZJ0JBcSpUZoDEzzp39fio37muIJOQIPRbhH/31q+ZcP9db1bGLYT5px 9dbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=NzfOmp/7Q0a7TzI/u4heGA1BpcXijFix3UaLoZZjap4=; b=kLbnjh7zJ89JZs54Cn650J55pcivUc1rmCmaEL1r/tfzqXh99Q++em8PdR0qpqQ+u6 6/giSR9scb1lzbffUjHfYwG+2CvO74CoRqaNB72FPzg8hh8q7bkmIVjoXSmy900Xb4DD faSFt9qIwMSPOWnWu8Ci/r4bAEAZMa3NjepKopENmkviGtAz8YRTSQgVnnOgB16I09/q aap10VaYsALpqzSWjj2g/jhu7qcBUwNTMpDa00iuRGdlF0u3htXwmdNa5oLQUb9qms0B C/y+yQ0pBC2u9sb95Bbq4Ntq28s2Yzm0bz3asVltlq07AXPlgBpZVudaxafH92MyUa8k nr6w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h35-v6si1463510pgl.176.2018.07.20.02.56.41; Fri, 20 Jul 2018 02:56:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727233AbeGTKoJ (ORCPT + 13 others); Fri, 20 Jul 2018 06:44:09 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:60626 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727167AbeGTKoJ (ORCPT ); Fri, 20 Jul 2018 06:44:09 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C3DB415A2; Fri, 20 Jul 2018 02:56:40 -0700 (PDT) Received: from approximate.cambridge.arm.com (approximate.cambridge.arm.com [10.1.206.75]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B6C323F5B3; Fri, 20 Jul 2018 02:56:39 -0700 (PDT) From: Marc Zyngier To: stable@vger.kernel.org Cc: Will Deacon , Catalin Marinas , Mark Rutland , Christoffer Dall Subject: [PATCH 01/23] arm64: assembler: introduce ldr_this_cpu Date: Fri, 20 Jul 2018 10:56:12 +0100 Message-Id: <20180720095634.2173-2-marc.zyngier@arm.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180720095634.2173-1-marc.zyngier@arm.com> References: <20180720095634.2173-1-marc.zyngier@arm.com> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Mark Rutland Commit 1b7e2296a822dfd2349960addc42a139360ce769 upstream. Shortly we will want to load a percpu variable in the return from userspace path. We can save an instruction by folding the addition of the percpu offset into the load instruction, and this patch adds a new helper to do so. At the same time, we clean up this_cpu_ptr for consistency. As with {adr,ldr,str}_l, we change the template to take the destination register first, and name this dst. Secondly, we rename the macro to adr_this_cpu, following the scheme of adr_l, and matching the newly added ldr_this_cpu. Signed-off-by: Mark Rutland Tested-by: Laura Abbott Cc: Ard Biesheuvel Cc: James Morse Cc: Will Deacon Signed-off-by: Catalin Marinas Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/assembler.h | 19 +++++++++++++++---- arch/arm64/kernel/entry.S | 2 +- 2 files changed, 16 insertions(+), 5 deletions(-) -- 2.18.0 diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index bfcfec3590f6..a4f227f6a400 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -239,14 +239,25 @@ lr .req x30 // link register .endm /* + * @dst: Result of per_cpu(sym, smp_processor_id()) * @sym: The name of the per-cpu variable - * @reg: Result of per_cpu(sym, smp_processor_id()) * @tmp: scratch register */ - .macro this_cpu_ptr, sym, reg, tmp - adr_l \reg, \sym + .macro adr_this_cpu, dst, sym, tmp + adr_l \dst, \sym + mrs \tmp, tpidr_el1 + add \dst, \dst, \tmp + .endm + + /* + * @dst: Result of READ_ONCE(per_cpu(sym, smp_processor_id())) + * @sym: The name of the per-cpu variable + * @tmp: scratch register + */ + .macro ldr_this_cpu dst, sym, tmp + adr_l \dst, \sym mrs \tmp, tpidr_el1 - add \reg, \reg, \tmp + ldr \dst, [\dst, \tmp] .endm /* diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index b79e302d2a3e..7fed00b47692 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -243,7 +243,7 @@ alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0 cmp x25, tsk b.ne 9998f - this_cpu_ptr irq_stack, x25, x26 + adr_this_cpu x25, irq_stack, x26 mov x26, #IRQ_STACK_START_SP add x26, x25, x26