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[212.83.80.182]) by smtp.gmail.com with ESMTPSA id j50-v6sm11267948ede.0.2018.07.24.10.12.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 10:12:30 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, will.deacon@arm.com, dave.martin@arm.com, vakul.garg@nxp.com, bigeasy@linutronix.de, Ard Biesheuvel Subject: [PATCH 1/4] crypto/arm64: ghash - reduce performance impact of NEON yield checks Date: Tue, 24 Jul 2018 19:12:21 +0200 Message-Id: <20180724171224.17363-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180724171224.17363-1-ard.biesheuvel@linaro.org> References: <20180724171224.17363-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org As reported by Vakul, checking the TIF_NEED_RESCHED flag after every iteration of the GHASH and AES-GCM core routines is having a considerable performance impact on cores such as the Cortex-A53 with Crypto Extensions implemented. GHASH performance is down by 22% for large block sizes, and AES-GCM is down by 16% for large block sizes and 128 bit keys. This appears to be a result of the high performance of the crypto instructions on the one hand (2.0 cycles per byte for GHASH, 3.0 cpb for AES-GCM), combined with the relatively poor load/store performance of this simple core. So let's reduce this performance impact by only doing the yield check once every 32 blocks for GHASH (or 4 when using the version based on 8-bit polynomial multiplication), and once every 16 blocks for AES-GCM. This way, we recover most of the performance while still limiting the duration of scheduling blackouts due to disabling preemption to ~1000 cycles. Cc: Vakul Garg Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/ghash-ce-core.S | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -- 2.11.0 diff --git a/arch/arm64/crypto/ghash-ce-core.S b/arch/arm64/crypto/ghash-ce-core.S index dcffb9e77589..9c14beaabeee 100644 --- a/arch/arm64/crypto/ghash-ce-core.S +++ b/arch/arm64/crypto/ghash-ce-core.S @@ -212,7 +212,7 @@ ushr XL.2d, XL.2d, #1 .endm - .macro __pmull_ghash, pn + .macro __pmull_ghash, pn, yield_count frame_push 5 mov x19, x0 @@ -259,6 +259,9 @@ CPU_LE( rev64 T1.16b, T1.16b ) eor T2.16b, T2.16b, XH.16b eor XL.16b, XL.16b, T2.16b + tst w19, #(\yield_count - 1) + b.ne 1b + cbz w19, 3f if_will_cond_yield_neon @@ -279,11 +282,11 @@ CPU_LE( rev64 T1.16b, T1.16b ) * struct ghash_key const *k, const char *head) */ ENTRY(pmull_ghash_update_p64) - __pmull_ghash p64 + __pmull_ghash p64, 32 ENDPROC(pmull_ghash_update_p64) ENTRY(pmull_ghash_update_p8) - __pmull_ghash p8 + __pmull_ghash p8, 4 ENDPROC(pmull_ghash_update_p8) KS .req v8 @@ -428,6 +431,9 @@ CPU_LE( rev x28, x28 ) st1 {INP.16b}, [x21], #16 .endif + tst w19, #0xf // do yield check only + b.ne 1b // once every 16 blocks + cbz w19, 3f if_will_cond_yield_neon From patchwork Tue Jul 24 17:12:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 142819 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp7516475ljj; Tue, 24 Jul 2018 10:12:35 -0700 (PDT) X-Google-Smtp-Source: AAOMgpexW5KMXzzWcMKxbGPnHR/2cSJ0YDzoQlNO+qN2r/lzndAbbOGad0Lh76keI9k2q3XbSbVG X-Received: by 2002:a17:902:e20b:: with SMTP id ce11-v6mr1781253plb.136.1532452355271; Tue, 24 Jul 2018 10:12:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532452355; cv=none; d=google.com; s=arc-20160816; b=J+2E5uHaLVLdBZT34E2fzJ10PgVGpans8x4L8FEnfTIq33s69qRkvy6LbQ0f/mrEN5 CFblpkq5aHYqU9e0vih+0ID/PewefgiBUsFyYNmbJor8XL3VpzBAmyT7e/49fExAxWYA 0XDGDvcOOEh4CvpfNPfxOUC/QQBTrTNgdQsD+h268zl4PWGBdfV1xAr/XLlNLO3rz+Js RsxUKNQYhzVZuH+lJRqZWR2s0VSc38rn22cLWT/I5Ks1saqQVtLU4kN4UOXCnfxyMItl YSubL8hM/g9CtQzrAXBAqPON0/HcSkWJGU41Q4G7mKjB1FGSORT1xtqDfrwkboz/1F2S jWJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=lGBH9tXQ9tmVMjquqCGTkRDhoGgezeH9nK4wtexGaLU=; b=ay12xHg6LeU7rAJ7Q/7gTj5+MkrKp3jcGkl9RvVhlTqxvIzrStDsQ61YwEqFSRVijL XKCH6ZHc5Psogqa5leOY0eaDPmoqvwu9OQe0XqVHvFMKCYl71aPWjVpM8iVHIleQKSOP x5/9ij5hYCLcF/F5r1F/XDzxDntyogZH2irI+nMs9WnMPuTo5/Iix0aYzuzqQ5SGE3jM G/H4fW88ssPhufFOwfNDBpqwK2QxMWM8MVVBVLysxswTZ0BTunLWmPNkT3Nwe1Jkw8vv Oa041zm6ONOtxNBTKw25qyV6PTBripTFMiP34DKGSzTaaXxBc/KgvxwxFk5U5N4OsXr3 bL+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YOxly6YS; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[212.83.80.182]) by smtp.gmail.com with ESMTPSA id j50-v6sm11267948ede.0.2018.07.24.10.12.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 10:12:31 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, will.deacon@arm.com, dave.martin@arm.com, vakul.garg@nxp.com, bigeasy@linutronix.de, Ard Biesheuvel Subject: [PATCH 2/4] crypto/arm64: aes-ccm - reduce performance impact of NEON yield checks Date: Tue, 24 Jul 2018 19:12:22 +0200 Message-Id: <20180724171224.17363-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180724171224.17363-1-ard.biesheuvel@linaro.org> References: <20180724171224.17363-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Only perform the NEON yield check for every 8 blocks of input, to prevent taking a considerable performance hit on cores with very fast crypto instructions and comparatively slow memory accesses, such as the Cortex-A53. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/aes-ce-ccm-core.S | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 diff --git a/arch/arm64/crypto/aes-ce-ccm-core.S b/arch/arm64/crypto/aes-ce-ccm-core.S index 88f5aef7934c..627710cdc220 100644 --- a/arch/arm64/crypto/aes-ce-ccm-core.S +++ b/arch/arm64/crypto/aes-ce-ccm-core.S @@ -208,6 +208,9 @@ CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */ st1 {v1.16b}, [x19], #16 /* write output block */ beq 5f + tst w21, #(0x7 * 16) /* yield every 8 blocks */ + b.ne 0b + if_will_cond_yield_neon st1 {v0.16b}, [x24] /* store mac */ do_cond_yield_neon From patchwork Tue Jul 24 17:12:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 142820 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp7516491ljj; Tue, 24 Jul 2018 10:12:36 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdXB2GQnoeRbOOKR57CTDsdQpVWTDtBL2qPyX0hVQwTfQyw+mjelKf7rsfnJd4oAXWIcMQg X-Received: by 2002:a17:902:7587:: with SMTP id j7-v6mr867393pll.256.1532452356095; Tue, 24 Jul 2018 10:12:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532452356; cv=none; d=google.com; s=arc-20160816; b=cW3U+0tu9K8mExcAZdjTS1oxkNLD2TuqIEFFQlpSrC2vvaNMsSxi+hnhBT2bn9NhaU PCowNTXD9Uo5HTEedN9I6qDv+3RkqPSxXFDZrsfyMjUIbABTV8z/CBqr5xi5FGUJw2yy iNfRDZFUZCPczq6TXlhDrXpGIzpY8+z05+yKZJNkBOPw0BmS2eX6lR17RdYFYy0o0Oao paNqc+l/RLJsaLkQeg+rpuwD/IOlROSVAHujXhJn3egapV1d5Wr250lCDObQBMC4qSoQ 2VGHX7dsmTLB+u4WNj7z0PU+nIeormpBWznqhBCHIlAcpCDWbNMB0nU8Kq7xVer7rlKN /S4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=GVbSC95/yEEbAynfAN2phGeEVzpKjdkr/hhdhpjQFqU=; b=PvncMHknJiMbnxU2dSAHZ8b2VE97uvB2KtkIQRE8I9IsZXihpomnzDYTBsNek9Bmzw SvPYt1ucBrhImt2GhmWVrOJmBIA1d9yckcouYI4r/TDsJKU4WXAfkXZIiVcfbX+g2/37 fwKNiQ0Uy3ou404+QT74/HscZKE3zyL8+a/61M1EaQCLl43FeQPTLT9sVThhAt0xc2z2 6akRBXuWwxEWtHdDt9+VRtZGj14BvJlzVJazRN2mOvf9Hdw7ySNTqxy8yWyc3+fj1nvX bi3Hwv9tGkDRaO+dKpFdf8uP9BzGSxWlwqnemmg8uADRVFDYz/J+9jG9WwLEWgVwD2kF wujA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dvmqOphd; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[212.83.80.182]) by smtp.gmail.com with ESMTPSA id j50-v6sm11267948ede.0.2018.07.24.10.12.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 10:12:32 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, will.deacon@arm.com, dave.martin@arm.com, vakul.garg@nxp.com, bigeasy@linutronix.de, Ard Biesheuvel Subject: [PATCH 3/4] crypto/arm64: sha1 - reduce performance impact of NEON yield checks Date: Tue, 24 Jul 2018 19:12:23 +0200 Message-Id: <20180724171224.17363-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180724171224.17363-1-ard.biesheuvel@linaro.org> References: <20180724171224.17363-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Only perform the NEON yield check for every 4 blocks of input, to prevent taking a considerable performance hit on cores with very fast crypto instructions and comparatively slow memory accesses, such as the Cortex-A53. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/sha1-ce-core.S | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 diff --git a/arch/arm64/crypto/sha1-ce-core.S b/arch/arm64/crypto/sha1-ce-core.S index 78eb35fb5056..f592c55218d0 100644 --- a/arch/arm64/crypto/sha1-ce-core.S +++ b/arch/arm64/crypto/sha1-ce-core.S @@ -129,6 +129,9 @@ CPU_LE( rev32 v11.16b, v11.16b ) add dgbv.2s, dgbv.2s, dg1v.2s add dgav.4s, dgav.4s, dg0v.4s + tst w21, #0x3 // yield only every 4 blocks + b.ne 1b + cbz w21, 3f if_will_cond_yield_neon From patchwork Tue Jul 24 17:12:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 142821 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp7516503ljj; Tue, 24 Jul 2018 10:12:37 -0700 (PDT) X-Google-Smtp-Source: AAOMgpd84ZiytdI/ilhuoqNcAZZNVGuw+OPMggpqIrQEWBUFenMp36ocK996j7wW/oTrLyhouyut X-Received: by 2002:a63:5055:: with SMTP id q21-v6mr16588298pgl.397.1532452356985; Tue, 24 Jul 2018 10:12:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532452356; cv=none; d=google.com; s=arc-20160816; b=ILrh0dmLwzYOXLDplO6H/4iXDA+W3VGQHrKdlDJmEUH74aRs2PyVXkbp/cZ2Hwo90H EPaqDiAkA1JtnIkfrJ9rRCjFn/J9S/ITr5mTCjIsWfyE+xzcQBe5UGxqAzdJCZqQqrA/ ae7GHaarHEU7RKDDCuDwsCYodMMA7VIGphTYsIo3+UrnHQxtKa+pnUOL/XdwNhVsfBQO vxu8x8fylblrZ0iAbPPGOgfrx8pUxJLmG/Vp3g613c/2ljaKfIw5AHnDUBMBq8sGt1/h 16i1O6FSKjeDVU5TVXj9SDndNnp5dnpTSOyiYbZMZa4AnSyelP8Tn5EIGelEmkU169Y4 FGFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=qhx/Zni8hohoP5dPcKAraPiFZGgE5hZjWRzzfsLA36c=; b=HVq/0GliLT0kVm/3umshlGUE8w6WJ/26vsz+gklm3TsjyCoed3qVl7gdY9LBAn/qeT 50YRiZVBgTh1+Lu+6BefEQaMIAbkL/QxG7Ur0qj2K3slXlMeM29zxCn2P56C/0BZZVzI EpmXRdpaCRMD0FJ7Hw5CmeQDQ4aN8OBl9wk80jT1hUs0jkFz9iYvmRV1vfGdm2cP4X+7 X2nf9VW9qBKBWxKT3HgvrPOaR7hfuJRGxbvXrzflrYXGegfuDeH/LtZPolllRB16FtSA rTxDs3vFZtntqXjm4zgICsE+0LcbCe88/atbFWGBBjUXx0ALm09mmLHKKi7oR2tm54kN oW4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YGJ01zAB; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[212.83.80.182]) by smtp.gmail.com with ESMTPSA id j50-v6sm11267948ede.0.2018.07.24.10.12.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 10:12:33 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, will.deacon@arm.com, dave.martin@arm.com, vakul.garg@nxp.com, bigeasy@linutronix.de, Ard Biesheuvel Subject: [PATCH 4/4] crypto/arm64: sha2 - reduce performance impact of NEON yield checks Date: Tue, 24 Jul 2018 19:12:24 +0200 Message-Id: <20180724171224.17363-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180724171224.17363-1-ard.biesheuvel@linaro.org> References: <20180724171224.17363-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Only perform the NEON yield check for every 4 blocks of input, to prevent taking a considerable performance hit on cores with very fast crypto instructions and comparatively slow memory accesses, such as the Cortex-A53. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/sha2-ce-core.S | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 diff --git a/arch/arm64/crypto/sha2-ce-core.S b/arch/arm64/crypto/sha2-ce-core.S index cd8b36412469..201a33ff6830 100644 --- a/arch/arm64/crypto/sha2-ce-core.S +++ b/arch/arm64/crypto/sha2-ce-core.S @@ -136,6 +136,9 @@ CPU_LE( rev32 v19.16b, v19.16b ) add dgav.4s, dgav.4s, dg0v.4s add dgbv.4s, dgbv.4s, dg1v.4s + tst w21, #0x3 // yield only every 4 blocks + b.ne 1b + /* handled all input blocks? */ cbz w21, 3f