From patchwork Sat Jun 12 19:23:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 459205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A753AC48BCF for ; Sat, 12 Jun 2021 19:24:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8A661611B0 for ; Sat, 12 Jun 2021 19:24:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230136AbhFLT0L (ORCPT ); Sat, 12 Jun 2021 15:26:11 -0400 Received: from m-r1.th.seeweb.it ([5.144.164.170]:33459 "EHLO m-r1.th.seeweb.it" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229874AbhFLT0J (ORCPT ); Sat, 12 Jun 2021 15:26:09 -0400 Received: from localhost.localdomain (83.6.168.161.neoplus.adsl.tpnet.pl [83.6.168.161]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 9284F1F530; Sat, 12 Jun 2021 21:24:07 +0200 (CEST) From: Konrad Dybcio To: ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] arm64: dts: qcom: sm8250: Add SDHCI2 pinctrl Date: Sat, 12 Jun 2021 21:23:57 +0200 Message-Id: <20210612192358.62602-2-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210612192358.62602-1-konrad.dybcio@somainline.org> References: <20210612192358.62602-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add required pins for SDHCI2, so that the interface can work reliably. The configuration comes from a MTP board, which conveniently means it's going to be correct for the vast majority of phones (and other devices). Signed-off-by: Konrad Dybcio --- Changes since v1: - Separate this into its own patch arch/arm64/boot/dts/qcom/sm8250.dtsi | 32 ++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index fc1049c2bb11..fe858abbff5d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -2157,6 +2158,10 @@ sdhc_2: sdhci@8804000 { power-domains = <&rpmhpd SM8250_CX>; operating-points-v2 = <&sdhc2_opp_table>; + cd-gpios = <&tlmm 77 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; + pinctrl-names = "default"; + status = "disabled"; sdhc2_opp_table: sdhc2-opp-table { @@ -3401,6 +3406,33 @@ ws { output-high; }; }; + + sdc2_default_state: sdc2-default { + clk { + pins = "sdc2_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd { + pins = "sdc2_cmd"; + drive-strength = <16>; + bias-pull-up; + }; + + data { + pins = "sdc2_data"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + sdc2_card_det_n: sd-card-det-n { + pins = "gpio77"; + function = "gpio"; + bias-pull-up; + drive-strength = <2>; + }; }; apps_smmu: iommu@15000000 {