From patchwork Tue Jun 15 07:45:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10A33C48BDF for ; Tue, 15 Jun 2021 07:49:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DFE0D61425 for ; Tue, 15 Jun 2021 07:49:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230453AbhFOHv2 (ORCPT ); Tue, 15 Jun 2021 03:51:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59610 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230405AbhFOHvV (ORCPT ); Tue, 15 Jun 2021 03:51:21 -0400 Received: from mail-pg1-x533.google.com (mail-pg1-x533.google.com [IPv6:2607:f8b0:4864:20::533]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60608C0617AF for ; Tue, 15 Jun 2021 00:49:17 -0700 (PDT) Received: by mail-pg1-x533.google.com with SMTP id e22so10731763pgv.10 for ; Tue, 15 Jun 2021 00:49:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sGWRVUlazvDnItAZtGGyEDeGtg0J5AyvblHx2w1qXWE=; b=cdpc0EQuXEuwUlrhmkjoKLMumoqgkNHwPdeVjIfON9XSIeeM4DEoj3i0Nd8pST61kl 51gE8P3WnLkS1uI01dDdjHF+jjkDHT5dmxzocGjqLO9O3EkW2GSclGgL1YVkAv+8R+Z9 PWbbXIIxT2EZPQrae4i+8E+YHtdR0SBDZabmFfWr4IFcTBi1WQGSJv+0JkxnJ4dri2vc rh+13qfJ22ldH+NeIKpWYHGWs7MPR8FTMS8ijkTVdpZAOfTRSTNlk1sH73Y/OGI/yENc 9UgdFgiK4jsSFkHQhhFs2MO+n0UFxBSG0HQRxN2IZFMGfAGnB8ay5BnTlEQU99zsFFNg Gg0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sGWRVUlazvDnItAZtGGyEDeGtg0J5AyvblHx2w1qXWE=; b=nZw4RXIMT0XKDzU6XcwKu5+OejNOUAgnLxeASyLdlH9gS0qF4LWx2FtvOmQiCa2uxT OfPpk2cggZO00T8l0LfGx1yVV3B3JMA8qyU5mrBAZl0TmFosanbnKOY9LYg40R5l2f/f r1J8qM9B5Yp/hljqZ0q8qZmiXHgUuSsz1ZuiR+fzg42tfNDcYsattQEiQhjafcALQ8To nRNxgAG4hYxUdR8Qb0baadPti/eEbX1Mhx38RtRgS2I+PJLRzEVnnNJ3aua0BvdQQRTu URJrO5EDcyjoL7GvvJj5LZ+7JVTkG/xkshryUfYeEDLioWYZ50yRW+QC5RfEfFT9JNDH 50tA== X-Gm-Message-State: AOAM530WdXI1zRRDsS3aUpJ64HH4XOaNaUuh0HMwrvza1iIHeK/MrBJ3 qk21+zygrey/OWIWyeXUzbgQsg== X-Google-Smtp-Source: ABdhPJxXhtar5jYrL2R4veqD7b36wBBgDGY5dRBtyonFJ2alU8qM6iv+FM2OSswLppu2LDmfEWwowA== X-Received: by 2002:a63:515d:: with SMTP id r29mr20931165pgl.56.1623743356898; Tue, 15 Jun 2021 00:49:16 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:16 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 01/10] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmic Date: Tue, 15 Jun 2021 13:15:34 +0530 Message-Id: <20210615074543.26700-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add compatible string for pmm8155au pmic found on the SA8155p-adp board. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma Acked-by: Rob Herring --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index e561a5b941e4..13dbc8e2fd85 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -55,6 +55,7 @@ properties: - qcom,pm8009-1-rpmh-regulators - qcom,pm8150-rpmh-regulators - qcom,pm8150l-rpmh-regulators + - qcom,pmm8155au-rpmh-regulators - qcom,pm8350-rpmh-regulators - qcom,pm8350c-rpmh-regulators - qcom,pm8998-rpmh-regulators From patchwork Tue Jun 15 07:45:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 494BCC48BDF for ; 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Tue, 15 Jun 2021 00:49:28 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:27 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 03/10] dt-bindings: arm: qcom: Add compatible for sm8150-mtp board Date: Tue, 15 Jun 2021 13:15:36 +0530 Message-Id: <20210615074543.26700-4-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org sm8150-mtp board is based on Qualcomm Snapdragon sm8150 SoC. Add support for the same in dt-bindings. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 9b27e991bddc..d7bb90e5082c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -42,6 +42,7 @@ description: | sdm660 sdm845 sdx55 + sm8150 sm8250 sm8350 @@ -198,6 +199,11 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,sm8150-mtp + - const: qcom,sm8150 + - items: - enum: - qcom,qrb5165-rb5 From patchwork Tue Jun 15 07:45:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460492 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4034810jae; Tue, 15 Jun 2021 00:49:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzP+u1P5wLqiISATb1a0AyEuBpFTDhzTA6jnzmwWI4rI81CWN9VGJHfysU5lXA4enr188Pd X-Received: by 2002:a17:906:d0da:: with SMTP id bq26mr19942192ejb.287.1623743387034; Tue, 15 Jun 2021 00:49:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743387; cv=none; d=google.com; s=arc-20160816; b=zG/hgK2ndMJAtvHIDyvv0qSVR4mrSATqNDihQz/HrHp9DlBnMANSi/Y7aNcPSGZ/LW 4eVtjGzENVPLnMc3Zfy6kIiYTDwl4U2OzNw9upCfG+Q9SFGM4CWEfeC71NZFJ0o+SJ2E 7YM8FODde0ZeTfmkQOcWS9MC23GrieNXwSwA6ocwVQGCzS743LatE01rfzqhoDZTCIC5 gMkOYqs/c2o5tH90LtmX8UfcmtsKD6wQBqMDPGhQsJxt+5JwgjUui2JKLf3ZIlC6/L+y RaeA2A4UpwjFqUjxzcltfd8nkz73uvOxcpz1eRXCo4flEiU0gpWEXqljPlLT9TidA/Od jWiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wYJGHXnh3H8tQOjqWO4HvEdpf5WCz791Tw53gEqLggM=; b=DGr9spgGr2GaKmjw7mPGspWanzVvMvBLar6ND4rHB2W2VmgH0XTZNnyJzV/DGP6gR5 P5a6kkfEg4Nz0EXmdnkg8T2eHTkkPP8QWN4o5rfbGQlvCMD4idrOiskolYesw4b+84R0 07x6EkTn43b2Ifd2xKpNDMA6jD/yaVA682JEAFngEAon+i0fqUi3D86FRRS06m9eYH+Z R7GLp8T/SF01tb0z8JSfndhWDb/HYe3CMgDfq7aea48Uy56zAzzkS378CXmFmmjSO0WN lrY3iRR7bgtXLd9ltNpfqm8NsiK8FMRMS0RlVOa5nNn578QCeykxWMyTuuWaHQZV/Uxt s1dw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AXu+qtsC; spf=pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- drivers/regulator/qcom-rpmh-regulator.c | 26 +++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) -- 2.31.1 diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index 22fec370fa61..af41a517da99 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -811,12 +811,12 @@ static const struct rpmh_vreg_init_data pm8998_vreg_data[] = { RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"), RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"), RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"), - {}, + {} }; static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = { RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { @@ -824,7 +824,7 @@ static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { @@ -856,7 +856,7 @@ static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { @@ -880,7 +880,7 @@ static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { @@ -906,7 +906,7 @@ static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { @@ -934,7 +934,7 @@ static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"), RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { @@ -947,7 +947,7 @@ static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { @@ -960,7 +960,7 @@ static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo7", "ldo%s6", &pmic5_pldo_lv, "vdd-l7"), - {}, + {} }; static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { @@ -988,7 +988,7 @@ static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), - {}, + {} }; static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { @@ -1012,7 +1012,7 @@ static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { @@ -1039,7 +1039,7 @@ static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"), RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"), - {}, + {} }; static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { @@ -1070,6 +1070,7 @@ static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + {} }; static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { @@ -1083,6 +1084,7 @@ static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"), RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"), RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"), + {} }; static int rpmh_regulator_probe(struct platform_device *pdev) From patchwork Tue Jun 15 07:45:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460494 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4035002jae; Tue, 15 Jun 2021 00:50:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJztb8tEORnfboMVnq1uzBvgX+AT6Ao5Ve/gsJUtnGnP2J1jgCrbCbCjeN8bsQdtD8N1uz+Y X-Received: by 2002:a17:906:70d4:: with SMTP id g20mr19036979ejk.327.1623743403387; Tue, 15 Jun 2021 00:50:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743403; cv=none; d=google.com; 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Add support for the same in the pinctrl driver. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) -- 2.31.1 diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 00870da0c94e..f886c683e2bd 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1127,6 +1127,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 }, /* pm8150l has 12 GPIOs with holes on 7 */ { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 }, { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 }, From patchwork Tue Jun 15 07:45:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460496 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4035168jae; Tue, 15 Jun 2021 00:50:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwM2sbLgIWiSHZKtylKIcJI9zfI+m60M1YnbNWipwP6t+6qGu0bLDa9BmFHh5lOMc6qEh/2 X-Received: by 2002:a17:906:51d8:: with SMTP id v24mr18699154ejk.264.1623743413131; Tue, 15 Jun 2021 00:50:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743413; cv=none; d=google.com; s=arc-20160816; b=aDv0oxnQXAFAagaVclxTZN+SjPx1exJufS6nVRVxHtCiEqy8JRd3j9YMH3RIUUUTWW fkhcaADfhK+uozrVE5vUCvQGU1DgLmmH4oQpIJTGdol7gn4CFtQCDvfPNSkK7B4XK9wo 8n/ylLMOlg9oeDftm7jcwLhTCvPrT/2g+daE6Z9as+EgCb1fUBBR6aXZkmHgSJaEFpcQ jIHYu9CT4/Llvv38GbQz2or26yh/U3Wyox+gJ/VoQukr69o9DXZpY4uJbzvv6UQrRM7b 6ODlKeuSz4B41xSYb62clstVgRlU8ce7tWzicw0nTakjIP6CX0hfUItJtBfxuLYOpv9T 3tVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LEWGh/ZszZnEYAd6EoMulPU4d/kaGO0pTgHCDsGz4Qc=; b=uQTJkSHUiL495CPCauS3M30Dy1jcE/DIS+Ay9PISxP6X4T/M540057iCukAhMWGfbc o9N9cuaUwUdiPpz0tFKNps1LafccWiCzUAEpNuXAOhXXeupLcIv17zqr4ylW/JqjZn/z Egeu7DcI7JLDUpLpb43F4//JEU01YBhzKYE7OjFmXXNM8ETUvSfgz3jmhdiVPa9FHFDg 45j7TTQXWbTc5zsELoXKlO0K3khdcUMkl3olQGEx98QxPkD9/Me5QdQV/km3FZpfwW5j sKhnU5MZRuslLwEVqje5QyZj6UmsmGJiMbCjr/8McxRUxwpRQob5xlZNuR4iruYoN8TF DizQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NdmHfDDJ; spf=pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi -- 2.31.1 Reviewed-by: Bjorn Andersson diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi new file mode 100644 index 000000000000..0c7d7a66c0b5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include +#include +#include + +/ { + thermal-zones { + pmm8155au-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_2_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@4 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + + status = "disabled"; + }; + + pmm8155au_2_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_2_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_2_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@5 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +};