From patchwork Mon Aug 6 12:27:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 143503 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3228982ljj; Mon, 6 Aug 2018 05:27:51 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcn4Bac+2UzF1xLrsehbKEHiEucGuKtE+ouMu3ALXmNcwzwYHEPFkC7W7Ah/N6BEREhSXUV X-Received: by 2002:a17:902:3fa5:: with SMTP id a34-v6mr13999050pld.223.1533558471090; Mon, 06 Aug 2018 05:27:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533558471; cv=none; d=google.com; s=arc-20160816; b=e2u6mK4g2iFvoxRbtZNQIfHJWGdJQFTdAWHd3kd96tPmFVWqKzfvbD9zxStu+HGsUz M1QmdlXraqApWkCmGF4NgDcp+B8v0X4lDAHWa4t2cEMrxEzf5weJzf4Nl6/zyCBofJAy zMlplEnEBylOrizmmLQjiHR4ryfLaWBQB5M7DBCGETVnwnykUudQoWJNHX+l4xoAeQg2 18SwU8P1iOlog5MW/U6W2HQF1LNcLRXgaXEZjtob4IEfPPNwwm184rwo5pOPMbSo3ylI mXsEA2/c4MfP/s5P/5OrSw0xGkdtKXOaR6dE6NR15DMGSyUNg6V756jQngqSC4qkvf7h dJFA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=XlaY8HETNxVj6BR5TNsBmRwocVx2PS0UyCNO4lKhKtI=; b=bcCWFdJkJRoQoR467RdhoEt36BZ5dZu5CvyjuQlIUnvhauaTpGB84I2VL9RKabaWX+ jBSnc12kEWO3VGPHLBzYzvsntTjheltU1Ue03UDWQ1CR0GC70tWBKNVRCNta8ReLRgeP EXZbL3gWqe1dthQ3sDe/YkIppk9FOl48Im02QxM3+Ounz2D3D81TNkrFRsDTV5N9C+5C x5OXewWPQV3evFRo4oGT8YUEeWKelQBp8M9hjylK3Seb0H9NEsupYnQMSauImLDhaxYb rG+tZq/aFeAkGH+uBU+3alAgPfxHIcClxugfEpQxrKLLbXCmMJAQE+xholUiFp6XcZmM pwEQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z89-v6si13218163pfd.357.2018.08.06.05.27.50; Mon, 06 Aug 2018 05:27:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731066AbeHFOgl (ORCPT + 31 others); Mon, 6 Aug 2018 10:36:41 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:50771 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730783AbeHFOgl (ORCPT ); Mon, 6 Aug 2018 10:36:41 -0400 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 022D2D080B7C8; Mon, 6 Aug 2018 20:27:46 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.399.0; Mon, 6 Aug 2018 20:27:38 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , LinuxArm , Hanjun Guo , Libin Subject: [PATCH v4 1/5] iommu/arm-smmu-v3: fix the implementation of flush_iotlb_all hook Date: Mon, 6 Aug 2018 20:27:00 +0800 Message-ID: <1533558424-16748-2-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> References: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org .flush_iotlb_all can not just wait for previous tlbi operations to be completed, but should also invalid all TLBs of the related domain. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 1.8.3 Reviewed-by: Robin Murphy diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4810f61..2f1304b 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1770,6 +1770,14 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, return ops->unmap(ops, iova, size); } +static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain) +{ + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); + + if (smmu_domain->smmu) + arm_smmu_tlb_inv_context(smmu_domain); +} + static void arm_smmu_iotlb_sync(struct iommu_domain *domain) { struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; @@ -1998,7 +2006,7 @@ static void arm_smmu_put_resv_regions(struct device *dev, .map = arm_smmu_map, .unmap = arm_smmu_unmap, .map_sg = default_iommu_map_sg, - .flush_iotlb_all = arm_smmu_iotlb_sync, + .flush_iotlb_all = arm_smmu_flush_iotlb_all, .iotlb_sync = arm_smmu_iotlb_sync, .iova_to_phys = arm_smmu_iova_to_phys, .add_device = arm_smmu_add_device, From patchwork Mon Aug 6 12:27:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 143508 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3229283ljj; Mon, 6 Aug 2018 05:28:07 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeyd9mTaXONoEVsJftf8DvU7VZJcxMl4sIrTNyduuekzZXPNdFTTLRnUDejyBMXO9k6I8ny X-Received: by 2002:a63:3685:: with SMTP id d127-v6mr14425666pga.231.1533558487361; Mon, 06 Aug 2018 05:28:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533558487; cv=none; d=google.com; s=arc-20160816; b=NcR+wpYj+5CHjSyI/mN3iz40+zmbBhmNGHo4GJ0rqB8ZLYl/MXqWUibHrztYCSv14M NwrVHtjrUfLiR+SRs9zv4PqcprzSsr88dtpQ9zVgGHGI8cF3YOxk0NOS9K8VCaGhV4b0 ZigNik/fUPwaSV+gzSS1Vqsv84AeaVfKLAhBNlFp9MjB/ADtbUGvxUimFqxVzxkSBJft 36r6Efrj/xhc6WBjfhUaFYFhbA47emcT9RHeYrY8KQd9aLOtMacFm8rOALPvUTTvECP/ 4qRZ13oCKjW2jpILi9TeQiGPwZMBSiXjG11e1767qeIz0OEx2TnfTpBHb13LXRhDHom+ aY2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=3trtjWYqYsF42ROh48uxpdt1bQRcIxCkCQOzeY4oCO0=; b=FtAXNF9RPYtT7+WreY6nfdy9HcY+HdZat6q38GJW1AK9gpIHuApSNytaenC5laH0ZT rWKeMSP9Tifdt/3zCirEh0LtSM8OHWEV7QbfWNq2FMooMHKvGYgqqkSD2FtvQtzxLxo8 uFZdb62WbPa2MF4DDGIcVFHWCmI/V3YUNDUrB4B6QqTvCi/2hgSN+oGlCdD5yUE6wp6M 0wcLTFOw4YGYx71QmN/oMUiUnzbzA9rTAJG7SufAuwbwrz0935ipJoe08smokl8mdkeR PNJ/CcWOpmMNRKLmpfCSZdXIupmR7dkF66CgnBptuHK8yBazsQu+yiXQPznrfWY5kSGX rL6w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id cf10-v6si9936082plb.9.2018.08.06.05.28.06; Mon, 06 Aug 2018 05:28:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731540AbeHFOgp (ORCPT + 31 others); Mon, 6 Aug 2018 10:36:45 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:50770 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730733AbeHFOgp (ORCPT ); Mon, 6 Aug 2018 10:36:45 -0400 Received: from DGGEMS407-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 072B55B8E7365; Mon, 6 Aug 2018 20:27:46 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP Server id 14.3.399.0; Mon, 6 Aug 2018 20:27:39 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , LinuxArm , Hanjun Guo , Libin Subject: [PATCH v4 2/5] iommu/dma: add support for non-strict mode Date: Mon, 6 Aug 2018 20:27:01 +0800 Message-ID: <1533558424-16748-3-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> References: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1. Save the related domain pointer in struct iommu_dma_cookie, make iovad capable call domain->ops->flush_iotlb_all to flush TLB. 2. During the iommu domain initialization phase, base on domain->non_strict field to check whether non-strict mode is supported or not. If so, call init_iova_flush_queue to register iovad->flush_cb callback. 3. All unmap(contains iova-free) APIs will finally invoke __iommu_dma_unmap -->iommu_dma_free_iova. If the domain is non-strict, call queue_iova to put off iova freeing. Signed-off-by: Zhen Lei --- drivers/iommu/dma-iommu.c | 23 +++++++++++++++++++++++ drivers/iommu/iommu.c | 1 + include/linux/iommu.h | 1 + 3 files changed, 25 insertions(+) -- 1.8.3 diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index ddcbbdb..213e62a 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -55,6 +55,7 @@ struct iommu_dma_cookie { }; struct list_head msi_page_list; spinlock_t msi_lock; + struct iommu_domain *domain; }; static inline size_t cookie_msi_granule(struct iommu_dma_cookie *cookie) @@ -257,6 +258,17 @@ static int iova_reserve_iommu_regions(struct device *dev, return ret; } +static void iommu_dma_flush_iotlb_all(struct iova_domain *iovad) +{ + struct iommu_dma_cookie *cookie; + struct iommu_domain *domain; + + cookie = container_of(iovad, struct iommu_dma_cookie, iovad); + domain = cookie->domain; + + domain->ops->flush_iotlb_all(domain); +} + /** * iommu_dma_init_domain - Initialise a DMA mapping domain * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() @@ -308,6 +320,14 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, } init_iova_domain(iovad, 1UL << order, base_pfn); + + if (domain->non_strict) { + BUG_ON(!domain->ops->flush_iotlb_all); + + cookie->domain = domain; + init_iova_flush_queue(iovad, iommu_dma_flush_iotlb_all, NULL); + } + if (!dev) return 0; @@ -390,6 +410,9 @@ static void iommu_dma_free_iova(struct iommu_dma_cookie *cookie, /* The MSI case is only ever cleaning up its most recent allocation */ if (cookie->type == IOMMU_DMA_MSI_COOKIE) cookie->msi_iova -= size; + else if (cookie->domain && cookie->domain->non_strict) + queue_iova(iovad, iova_pfn(iovad, iova), + size >> iova_shift(iovad), 0); else free_iova_fast(iovad, iova_pfn(iovad, iova), size >> iova_shift(iovad)); diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 63b3756..7811fde 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1263,6 +1263,7 @@ static struct iommu_domain *__iommu_domain_alloc(struct bus_type *bus, domain->ops = bus->iommu_ops; domain->type = type; + domain->non_strict = 0; /* Assume all sizes by default; the driver may override this later */ domain->pgsize_bitmap = bus->iommu_ops->pgsize_bitmap; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 19938ee..0a0fb48 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -88,6 +88,7 @@ struct iommu_domain_geometry { struct iommu_domain { unsigned type; + int non_strict; const struct iommu_ops *ops; unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ iommu_fault_handler_t handler; From patchwork Mon Aug 6 12:27:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 143506 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3229088ljj; Mon, 6 Aug 2018 05:27:57 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfT7RegEy6YSBafOfrXXNWDW06PVAKWGun7zMIoomJ6Ke1Ig29xWqGae0uCA528YWOsbtVV X-Received: by 2002:a62:9992:: with SMTP id t18-v6mr17002239pfk.239.1533558477281; Mon, 06 Aug 2018 05:27:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533558477; cv=none; d=google.com; s=arc-20160816; b=Ft4rXdFdiUu8ynftmbm95MeUzngE+A2505hwVqpH/Tn9dzvx2X8CxXagkpXAKPvw3X +V/YU8xXWx80ERKs46rWG2K6sKSNCecbf5dc5LFui/1UE8iivzUN6F+TXsi5MJrHObxW SjtFi/EugWcTYbUXS6gmQt4f+KG0u0cCv7f3+dYmSZBBE2u4u6JNj6Z/ZD/XsMef80qO QXEKZja2QLNRn+zfuIoKDufx1lciblG27QNYcVCXXnKzFza3pS+Zmk6tWII30KnLyFLU amli+jV7EMowSpzil0W0D1rpma7NRw4Cm6sNUzgrOE8LiUf3vKX+M/1b+Lg8XWAC7DCd WqZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=HG0jY7L8aZxXL2wnOiOGmXtjyDKMD/jfextZ1rPrxGk=; b=gIZvLZ1PVf0t5X6HJ4SxQQA3LvZxAUKn25u8dw2dl0EDgNEuccoSAhzmcisMowjOf5 kfCBlaYyCrEPJWOpnRbBzXlWSj6ymMUdX70DAuBH1RyJc6Y19/Rpnhcj+i/vcMtEc3mQ kkLUavQwyyhVS3P8bhuq8DUlhNPtTUNLwNZP28R981IkTDvVHWZhZ76Aya7dZxtkjv6l ZGD+u8nnmLx/66tb08ZNbna5hQk9hPNbXbt6OGAPFcRJOgskM6k6zO5JcZwG4xQU7Usm 4A0oZruhKvbt+l7H4hrKPR0qnQDmrYRytZ5poFBon7TNDS7fAFNq+OTyby/IgW+sIw8B 1Kqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d27-v6si12260874pgm.67.2018.08.06.05.27.56; Mon, 06 Aug 2018 05:27:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731985AbeHFOgr (ORCPT + 31 others); Mon, 6 Aug 2018 10:36:47 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:40109 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730733AbeHFOgr (ORCPT ); Mon, 6 Aug 2018 10:36:47 -0400 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id A353BA7BA67F5; Mon, 6 Aug 2018 20:27:50 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.399.0; Mon, 6 Aug 2018 20:27:41 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , LinuxArm , Hanjun Guo , Libin Subject: [PATCH v4 3/5] iommu/io-pgtable-arm: add support for non-strict mode Date: Mon, 6 Aug 2018 20:27:02 +0800 Message-ID: <1533558424-16748-4-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> References: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To support the non-strict mode, now we only tlbi and sync for the strict mode. But for the non-leaf case, always follow strict mode. Signed-off-by: Zhen Lei --- drivers/iommu/io-pgtable-arm.c | 27 ++++++++++++++++++--------- drivers/iommu/io-pgtable.h | 3 +++ 2 files changed, 21 insertions(+), 9 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 010a254..bb61bef 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -292,7 +292,7 @@ static void __arm_lpae_set_pte(arm_lpae_iopte *ptep, arm_lpae_iopte pte, static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, unsigned long iova, size_t size, int lvl, - arm_lpae_iopte *ptep); + arm_lpae_iopte *ptep, bool strict); static void __arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, phys_addr_t paddr, arm_lpae_iopte prot, @@ -319,6 +319,7 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, arm_lpae_iopte prot, int lvl, arm_lpae_iopte *ptep) { + size_t unmapped; arm_lpae_iopte pte = *ptep; if (iopte_leaf(pte, lvl)) { @@ -334,7 +335,8 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, size_t sz = ARM_LPAE_BLOCK_SIZE(lvl, data); tblp = ptep - ARM_LPAE_LVL_IDX(iova, lvl, data); - if (WARN_ON(__arm_lpae_unmap(data, iova, sz, lvl, tblp) != sz)) + unmapped = __arm_lpae_unmap(data, iova, sz, lvl, tblp, true); + if (WARN_ON(unmapped != sz)) return -EINVAL; } @@ -576,15 +578,17 @@ static size_t arm_lpae_split_blk_unmap(struct arm_lpae_io_pgtable *data, } if (unmap_idx < 0) - return __arm_lpae_unmap(data, iova, size, lvl, tablep); + return __arm_lpae_unmap(data, iova, size, lvl, tablep, true); io_pgtable_tlb_add_flush(&data->iop, iova, size, size, true); + io_pgtable_tlb_sync(&data->iop); + return size; } static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, unsigned long iova, size_t size, int lvl, - arm_lpae_iopte *ptep) + arm_lpae_iopte *ptep, bool strict) { arm_lpae_iopte pte; struct io_pgtable *iop = &data->iop; @@ -609,7 +613,7 @@ static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, io_pgtable_tlb_sync(iop); ptep = iopte_deref(pte, data); __arm_lpae_free_pgtable(data, lvl + 1, ptep); - } else { + } else if (strict) { io_pgtable_tlb_add_flush(iop, iova, size, size, true); } @@ -625,12 +629,13 @@ static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, /* Keep on walkin' */ ptep = iopte_deref(pte, data); - return __arm_lpae_unmap(data, iova, size, lvl + 1, ptep); + return __arm_lpae_unmap(data, iova, size, lvl + 1, ptep, strict); } static size_t arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova, size_t size) { + bool strict; struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops); arm_lpae_iopte *ptep = data->pgd; int lvl = ARM_LPAE_START_LVL(data); @@ -638,7 +643,9 @@ static size_t arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova, if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias))) return 0; - return __arm_lpae_unmap(data, iova, size, lvl, ptep); + strict = !(data->iop.cfg.quirks & IO_PGTABLE_QUIRK_NON_STRICT); + + return __arm_lpae_unmap(data, iova, size, lvl, ptep, strict); } static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops, @@ -771,7 +778,8 @@ static void arm_lpae_restrict_pgsizes(struct io_pgtable_cfg *cfg) u64 reg; struct arm_lpae_io_pgtable *data; - if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | IO_PGTABLE_QUIRK_NO_DMA)) + if (cfg->quirks & ~(IO_PGTABLE_QUIRK_ARM_NS | IO_PGTABLE_QUIRK_NO_DMA | + IO_PGTABLE_QUIRK_NON_STRICT)) return NULL; data = arm_lpae_alloc_pgtable(cfg); @@ -863,7 +871,8 @@ static void arm_lpae_restrict_pgsizes(struct io_pgtable_cfg *cfg) struct arm_lpae_io_pgtable *data; /* The NS quirk doesn't apply at stage 2 */ - if (cfg->quirks & ~IO_PGTABLE_QUIRK_NO_DMA) + if (cfg->quirks & ~(IO_PGTABLE_QUIRK_NO_DMA | + IO_PGTABLE_QUIRK_NON_STRICT)) return NULL; data = arm_lpae_alloc_pgtable(cfg); diff --git a/drivers/iommu/io-pgtable.h b/drivers/iommu/io-pgtable.h index 2df7909..beb14a3 100644 --- a/drivers/iommu/io-pgtable.h +++ b/drivers/iommu/io-pgtable.h @@ -71,12 +71,15 @@ struct io_pgtable_cfg { * be accessed by a fully cache-coherent IOMMU or CPU (e.g. for a * software-emulated IOMMU), such that pagetable updates need not * be treated as explicit DMA data. + * IO_PGTABLE_QUIRK_NON_STRICT: Put off TLBs invalidation and release + * memory first. */ #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) #define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2) #define IO_PGTABLE_QUIRK_ARM_MTK_4GB BIT(3) #define IO_PGTABLE_QUIRK_NO_DMA BIT(4) + #define IO_PGTABLE_QUIRK_NON_STRICT BIT(5) unsigned long quirks; unsigned long pgsize_bitmap; unsigned int ias; From patchwork Mon Aug 6 12:27:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 143507 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3229128ljj; Mon, 6 Aug 2018 05:27:59 -0700 (PDT) X-Google-Smtp-Source: AAOMgpeor9W1CJZJkk85gpLArcHgaCKy7wwZRTbxUAeE351UA21xLpRiQpQnpPYl/YnLuWZhfd8M X-Received: by 2002:a62:1089:: with SMTP id 9-v6mr16556156pfq.30.1533558478860; Mon, 06 Aug 2018 05:27:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533558478; cv=none; d=google.com; s=arc-20160816; b=cB9qWAO0yQwUuvM1GXaQPDXtO3uLKCtntrnibtuE5f2+Qo93yibYplbe0a/E+ZzJb4 DuqZPMaSLA9kJqBXqzw+1MJbVIJpCPe9nAIcDYA8ljon64I+nYgoKArh+AyrUTeg1TUR jVZxJZwVCMDfkcPM3TYOYGKuZn/dbzjocPTPI17nzpP+kK4SO3YyAfix6siXQrC5n66b IpO9sD670Eib2LgCvdmCWgUbNDtwdMOj1NrX3HR2UqHTFu++zvzHKCATmMlBssxkGwXg 1zo0fxjFWmMVa4Brb1FQozHUFIKF8ub2QBcX6OvN4spPufL6930GBHZv69T72WKo3nbg vndQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id 4-v6si12562494pgn.90.2018.08.06.05.27.58; Mon, 06 Aug 2018 05:27:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732115AbeHFOgt (ORCPT + 31 others); Mon, 6 Aug 2018 10:36:49 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:10637 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731249AbeHFOgt (ORCPT ); Mon, 6 Aug 2018 10:36:49 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 46949A9309A02; Mon, 6 Aug 2018 20:27:48 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.399.0; Mon, 6 Aug 2018 20:27:43 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , LinuxArm , Hanjun Guo , Libin Subject: [PATCH v4 4/5] iommu/arm-smmu-v3: add support for non-strict mode Date: Mon, 6 Aug 2018 20:27:03 +0800 Message-ID: <1533558424-16748-5-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> References: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dynamically choose strict or non-strict mode for page table config based on the iommu domain type. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 2f1304b..904bc1e 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1622,6 +1622,11 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain) if (smmu->features & ARM_SMMU_FEAT_COHERENCY) pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_NO_DMA; + if (domain->type == IOMMU_DOMAIN_DMA) { + domain->non_strict = 1; + pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT; + } + pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain); if (!pgtbl_ops) return -ENOMEM; @@ -1782,7 +1787,7 @@ static void arm_smmu_iotlb_sync(struct iommu_domain *domain) { struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; - if (smmu) + if (smmu && !domain->non_strict) __arm_smmu_tlb_sync(smmu); } From patchwork Mon Aug 6 12:27:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 143505 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3229033ljj; Mon, 6 Aug 2018 05:27:55 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcuxwpROhGUPl9vBG5ifVyPAiCQB58iGRFZjZTtP/coSYPLOXuiVOc27kDNoIPwED/MwZdn X-Received: by 2002:a63:6604:: with SMTP id a4-v6mr14062602pgc.404.1533558475084; Mon, 06 Aug 2018 05:27:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533558475; cv=none; d=google.com; s=arc-20160816; b=FcyqZRz6dUJ607v3qsIGDvS/X4MMpizNoefF6uxkaIElhmQJpnoY7T0HW/aA1No1kU mpfFD0wWMMRVCuoJNOY0gd3dadR72EH201rZCLRzLHtoV9SIGidqHRQg9nAvZKgyuxqE wlBYvVNRc5W6kRTgi/yhcYGhkUWpShs731g+pHkJ3sFQcJhuUBNZV7HZjC8JSzgdwDdX s5YX2l9OA3QX2pKsQOyVEzkMnXkBUjmizSaq+R1yt0MxCwarfDhD7BFGWiJ0DrmcB1IO iOLZcyYNzzqp7bclZ9AYrlrVV5Cmb0dHC2IwhMAPL4RAmgu4pRUgNc5cH7bzXV/t0RWZ OpAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=GqJOQfb0lLlj/VnUpIWiOWjjtek7o9QGyTgYPBIN8+U=; b=jBvwaoAOz9Gu9zuekMBTtWhEQlLlDaYj0SA160KzuhD73tRFnXaujHEyW6VrkhlDrY H0NN9TKDVzrPxXWOLgmOclmITH05E+mIfi1Umgu65CVgxtoGJyH9enTO5IoEnmM0Tm5v ZdIoitXqXTR+C/aRUegLd7yTxu/3aoTAoqauco9/yujVpooSsaj4zURwog/v2vDesmpe y3p/hVIMm+mssMp+IKSV/DXs4heM9dEOSEsUvX2LcXukBcl+bWY7mf1GrX5jn2YL1jd0 b5gsEFgx7Q5qFAIso3M8P0W974m2a3g963OHuAhIwOSnVh29qJ2whWL3mJrqx5/xh7Dn zBLA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h1-v6si9993644pld.152.2018.08.06.05.27.54; Mon, 06 Aug 2018 05:27:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731738AbeHFOgp (ORCPT + 31 others); Mon, 6 Aug 2018 10:36:45 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:50796 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726901AbeHFOgo (ORCPT ); Mon, 6 Aug 2018 10:36:44 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 83F3F1D0FA220; Mon, 6 Aug 2018 20:27:49 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.399.0; Mon, 6 Aug 2018 20:27:44 +0800 From: Zhen Lei To: Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei , LinuxArm , Hanjun Guo , Libin Subject: [PATCH v4 5/5] iommu/arm-smmu-v3: add bootup option "arm_iommu" Date: Mon, 6 Aug 2018 20:27:04 +0800 Message-ID: <1533558424-16748-6-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> References: <1533558424-16748-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a bootup option to make the system manager can choose which mode to be used. The default mode is strict. Signed-off-by: Zhen Lei --- Documentation/admin-guide/kernel-parameters.txt | 9 +++++++++ drivers/iommu/arm-smmu-v3.c | 17 ++++++++++++++++- 2 files changed, 25 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 533ff5c..426e989 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1720,6 +1720,15 @@ nobypass [PPC/POWERNV] Disable IOMMU bypass, using IOMMU for PCI devices. + arm_iommu= [ARM64] + non-strict [Default Off] + Put off TLBs invalidation and release memory first. + It's good for scatter-gather performance but lacks full + isolation, an untrusted device can access the reused + memory because the TLBs may still valid. Please take + full consideration before choosing this mode. + Note that, VFIO will always use strict mode. + iommu.passthrough= [ARM64] Configure DMA to bypass the IOMMU by default. Format: { "0" | "1" } diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 904bc1e..9a30892 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -631,6 +631,21 @@ struct arm_smmu_option_prop { { 0, NULL}, }; +static u32 smmu_non_strict __read_mostly; + +static int __init arm_smmu_setup(char *str) +{ + if (!strncmp(str, "non-strict", 10)) { + smmu_non_strict = 1; + pr_warn("WARNING: iommu non-strict mode is chosen.\n" + "It's good for scatter-gather performance but lacks full isolation\n"); + add_taint(TAINT_WARN, LOCKDEP_STILL_OK); + } + + return 0; +} +early_param("arm_iommu", arm_smmu_setup); + static inline void __iomem *arm_smmu_page1_fixup(unsigned long offset, struct arm_smmu_device *smmu) { @@ -1622,7 +1637,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain) if (smmu->features & ARM_SMMU_FEAT_COHERENCY) pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_NO_DMA; - if (domain->type == IOMMU_DOMAIN_DMA) { + if ((domain->type == IOMMU_DOMAIN_DMA) && smmu_non_strict) { domain->non_strict = 1; pgtbl_cfg.quirks |= IO_PGTABLE_QUIRK_NON_STRICT; }