From patchwork Fri Aug 10 09:51:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143903 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3142171ljj; Fri, 10 Aug 2018 02:52:28 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwVpWBMK1D6eZPBLe3x8yVhdDjYGuU83Y7VEqR0qp/m5Rfc1axJuJFJQkaK5Huz0LMW10rI X-Received: by 2002:a17:902:599b:: with SMTP id p27-v6mr5434515pli.191.1533894748614; Fri, 10 Aug 2018 02:52:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894748; cv=none; d=google.com; s=arc-20160816; b=DkK+0q0MAZbHVdoAruDd3tXHF87tvmvWt4JIhNZBweeqsqmBHac+gf3rHnwLeZZShU mLgvFIu1UtRvBrRZDJnpfuc3iOK+vMQVQrHNxn0U/Yl2kt8wriyIlijFAU6/l0VSApqz Zz64qMxHeZnaWkFRKFivQBumZDe+eCBGRUzmXdsO250p+jp63uyaRU2r7t6Yeu4YFqcY adSlD7S9Bzq9ycI1qn36WE+5ogmJTMEEUzVrmyOTq+MURiT+xlCw+E9q3flCIXOuXxhW hJfsvZ0Tlmb2UD7CPVlJ+ZW0ShlW1AIwTrGLwOnUKTQD+Z3TAu3dDZLTOeKVgzmohlc0 FJgQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=za5CxvSp2kq8k58A6b/SgPjjdl8NPy5NiTzG8pBNcTw=; b=uZyI3lKAzztFhcvIAiB62+Lk1R8ngeHlKE/eZIAj2wjHNFyFMKlD4pSH9JPRUZLZKG Is1R2wL3PbZg+vnYwYskdYaR0BvsHflxdu0Vbdnp9+TVciCTUNHA+xxzljfgx3CBwsdz dPB//4Du2aN2d3rzM7euLuyiQEBmSxaPVs8w9tp7N930BLXROcea9n6E5s+U2PQfOAty ioTdZOcQMZf5a79o1MbX7oqFWygh2rP3m8bWvmTKasFiduE0G3pW4LG/lC6dxOPS907P bisX89J3TaEuuqKoo4M+2JWB0gd9NCoJRGX1wIQflVvCtoYJoLUnzT5+khmQLRMIYBi8 xS1w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="MDR/wORi"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u189-v6si8618620pgb.635.2018.08.10.02.52.28; Fri, 10 Aug 2018 02:52:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="MDR/wORi"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727639AbeHJMVf (ORCPT + 5 others); Fri, 10 Aug 2018 08:21:35 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:45555 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727637AbeHJMVf (ORCPT ); Fri, 10 Aug 2018 08:21:35 -0400 Received: by mail-pl0-f66.google.com with SMTP id j8-v6so3832447pll.12 for ; Fri, 10 Aug 2018 02:52:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=za5CxvSp2kq8k58A6b/SgPjjdl8NPy5NiTzG8pBNcTw=; b=MDR/wORiIicegXE/lZK20080EUGevP30xgio1IZYAVaXU2kPY3gAwlFD4CdURu1UML 1ebLkImhU/zXnpZFmZh++SLYUh/OxZgxVHmF9Y6q2pNlZP5HUzqVgCClLtKcoPPTxqOx 32SUt2A8BEYeyxhRF4qqu8kVeRa4Jt7g4w4Us= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=za5CxvSp2kq8k58A6b/SgPjjdl8NPy5NiTzG8pBNcTw=; b=HbsJRhhOuNADBslzyZu3ZNb4MrI+Gs1VAloYmLaijGKhw4nTwPn8psCWqksu7sKjos fbMU5ZpDVofRD1jWSL9GPttpOw2ccHbOtF66GLawOPxkmdO5bS4LLMvwdr19Q/kWJ4kP TX3LKoyTlosSrSdXXnsMsysp0DQMyNXiiVJ3GiSiryadBqxESoJ5MEVuyPHsLXRMPAr5 WWH9QGpOhd3HwVtSxeTRLM4S2WqZ7Fq51vhCIjRBMe9JmH6Za9Ygk1NrUk0fxfCLtc0M 9MdUtruLNs6380LuMH41buv8YY4Gl8hx3CwBcZUxiS6IjktKfRdmGOIfC/9+YYqxUJq3 mD7Q== X-Gm-Message-State: AOUpUlG3o0pG64uVsg0MdMc+FsG5DdH618wpb1rtRi4ZWrWIaKo7gAe3 OF4kbzoKhGMuHYzR45VHWzhp X-Received: by 2002:a17:902:6f02:: with SMTP id w2-v6mr5450151plk.216.1533894747003; Fri, 10 Aug 2018 02:52:27 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.52.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:52:26 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 1/9] clk: actions: Cache regmap info in private clock descriptor Date: Fri, 10 Aug 2018 15:21:05 +0530 Message-Id: <20180810095113.25292-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In order to support the reset controller, regmap info needs to be cached in the private clock descriptor, owl_clk_desc. Hence, save that and also make the clock descriptor struct non const. Signed-off-by: Manivannan Sadhasivam --- drivers/clk/actions/owl-common.c | 3 ++- drivers/clk/actions/owl-common.h | 3 ++- drivers/clk/actions/owl-s700.c | 4 ++-- drivers/clk/actions/owl-s900.c | 4 ++-- 4 files changed, 8 insertions(+), 6 deletions(-) -- 2.17.1 diff --git a/drivers/clk/actions/owl-common.c b/drivers/clk/actions/owl-common.c index 61c1071b5180..32dd29e0a37e 100644 --- a/drivers/clk/actions/owl-common.c +++ b/drivers/clk/actions/owl-common.c @@ -39,7 +39,7 @@ static void owl_clk_set_regmap(const struct owl_clk_desc *desc, } int owl_clk_regmap_init(struct platform_device *pdev, - const struct owl_clk_desc *desc) + struct owl_clk_desc *desc) { void __iomem *base; struct regmap *regmap; @@ -57,6 +57,7 @@ int owl_clk_regmap_init(struct platform_device *pdev, } owl_clk_set_regmap(desc, regmap); + desc->regmap = regmap; return 0; } diff --git a/drivers/clk/actions/owl-common.h b/drivers/clk/actions/owl-common.h index 4fd726ec54a6..56f01f7774aa 100644 --- a/drivers/clk/actions/owl-common.h +++ b/drivers/clk/actions/owl-common.h @@ -26,6 +26,7 @@ struct owl_clk_desc { struct owl_clk_common **clks; unsigned long num_clks; struct clk_hw_onecell_data *hw_clks; + struct regmap *regmap; }; static inline struct owl_clk_common * @@ -35,7 +36,7 @@ static inline struct owl_clk_common * } int owl_clk_regmap_init(struct platform_device *pdev, - const struct owl_clk_desc *desc); + struct owl_clk_desc *desc); int owl_clk_probe(struct device *dev, struct clk_hw_onecell_data *hw_clks); #endif /* _OWL_COMMON_H_ */ diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c index 5e9531392ee5..e7cacd677275 100644 --- a/drivers/clk/actions/owl-s700.c +++ b/drivers/clk/actions/owl-s700.c @@ -569,7 +569,7 @@ static struct clk_hw_onecell_data s700_hw_clks = { .num = CLK_NR_CLKS, }; -static const struct owl_clk_desc s700_clk_desc = { +static struct owl_clk_desc s700_clk_desc = { .clks = s700_clks, .num_clks = ARRAY_SIZE(s700_clks), @@ -578,7 +578,7 @@ static const struct owl_clk_desc s700_clk_desc = { static int s700_clk_probe(struct platform_device *pdev) { - const struct owl_clk_desc *desc; + struct owl_clk_desc *desc; desc = &s700_clk_desc; owl_clk_regmap_init(pdev, desc); diff --git a/drivers/clk/actions/owl-s900.c b/drivers/clk/actions/owl-s900.c index 7f60ed6afe63..bb7ee872d316 100644 --- a/drivers/clk/actions/owl-s900.c +++ b/drivers/clk/actions/owl-s900.c @@ -684,7 +684,7 @@ static struct clk_hw_onecell_data s900_hw_clks = { .num = CLK_NR_CLKS, }; -static const struct owl_clk_desc s900_clk_desc = { +static struct owl_clk_desc s900_clk_desc = { .clks = s900_clks, .num_clks = ARRAY_SIZE(s900_clks), @@ -693,7 +693,7 @@ static const struct owl_clk_desc s900_clk_desc = { static int s900_clk_probe(struct platform_device *pdev) { - const struct owl_clk_desc *desc; + struct owl_clk_desc *desc; desc = &s900_clk_desc; owl_clk_regmap_init(pdev, desc); From patchwork Fri Aug 10 09:51:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143904 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3142331ljj; Fri, 10 Aug 2018 02:52:39 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxaaDOgSlu1LXvIAwTXAW623yKhaigCJUXgRJMTvM+2DsNrp6VdiKbxmcNi8NB3Qrc0m9CL X-Received: by 2002:a17:902:ab94:: with SMTP id f20-v6mr5470825plr.231.1533894759513; Fri, 10 Aug 2018 02:52:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894759; cv=none; d=google.com; s=arc-20160816; b=DgDTdDj58uOlrjbRDPwMB98PmVW7jwysHljzpMBcQRN2T2WtK2hdO5sXkyIJIk6uxX Bu7OszD3YkomaoNFRHXpe+Anhba2KJgG5a+FHQTKcmXyieanRuPNmCiRIvVvot34EfA0 H+vFjJMf024YWYUvJYArTt0Kh7/3j1rxl7MM3QVP0zY5aQMZe0mM4MVroWIi446TaF9w DifFwQX8p9OPiS8RICYM1et/Ny5Yniw+1BvtgKRCILwcA97RR5Nk5uoCX/UfpMAyhxVM eq5bNLGun17Ch1cgumUu96jAvMe8lpEnXt1AQ1Ke26MtCkdrz3cHH0BW0cs0L5ZY86+f u8MA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=/2SNt9Nhz3v7D4RvDwtle5+O7jcsvrVGidUkEkSh/JQ=; b=LzVkZMAatHDccdghpFeupMGIy7vxQqX9gQWV0sG/dK6yQl0z1k/2gDTgf1bl/GXezm xQjIabzPoeisL/Zj0NvFSw7sdky95w3aj6mkzLN1MNeMeDL8ebJHkXTHehH9LjIPMuou nl/ppJ625nN46lz1U62xYZopJhRVjfl9uxVE1dZQhHmj0fGtfrQX61MQxd54NPMXS3W7 kRidDxFZX2eWGjnm1amUnnFXArzL1UfW7OxEgdVaMzo0kygfl6VFMZQqrshJMJ1DMFUP cmq4l3M1LmvwumhZs8C/uJnFr54y+mG01JtUhf1woho10F8EYKsEHYuQVRVQfys5Ot7M Wzmg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f70Zh6db; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j38-v6si8424965pgj.613.2018.08.10.02.52.39; Fri, 10 Aug 2018 02:52:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f70Zh6db; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727748AbeHJMVq (ORCPT + 5 others); Fri, 10 Aug 2018 08:21:46 -0400 Received: from mail-pf1-f193.google.com ([209.85.210.193]:38470 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727206AbeHJMVq (ORCPT ); Fri, 10 Aug 2018 08:21:46 -0400 Received: by mail-pf1-f193.google.com with SMTP id x17-v6so4291208pfh.5 for ; Fri, 10 Aug 2018 02:52:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/2SNt9Nhz3v7D4RvDwtle5+O7jcsvrVGidUkEkSh/JQ=; b=f70Zh6dbHcJj90PYsdsGnMbY4EklUDwq31RUxdBDRvdLHnsfNPdiQuqQjL1saJ2TWg v06/aefq2lkqE+n7QIrBGRhGKLtEo5TJHrLKsqALtAVoirhs6YJG1kvgpSdd8vEWYPt8 4XLZoO7Sd9SLUQwfW4yYL2+NIkxTyqrCk3tG4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/2SNt9Nhz3v7D4RvDwtle5+O7jcsvrVGidUkEkSh/JQ=; b=LOKadCZIlZeNYzP4aIoIu8nIKz8wZZ5Ifo+pME2/e5kpYGcyhQTzbrhHADkjkA+maL BoFd9aP4sCcJfx6tGDAak+S9HfgGZ3seMugsn6u+vFnNDXyxK2uXmpRGel7qQF9xzix+ jkuy5J7IsZ4qidT6dQHPsmBS79bjjYESnOhxNsbi6ZeYRcRT5WMUr/D9QrVIz9kjc8wP K/MNVOJTycf1j51rWx6Wsu7iKngMB8n6gCQrD3E1QRpULgKR0bGirgiuXYa8ZuA85W+l OkAImYgxHKSM0/5TGyTilw053HMCzwfrq+86mare0UIvKpVi4gxET18Whvw5lCEq1fwu x2wQ== X-Gm-Message-State: AOUpUlELUXiZsD97pHcUetCCFmMi+W1OhNM2t6Qyy8YtVBLvUoEhUHQa 4gd4CTLmJ/a34W88gs38EO03 X-Received: by 2002:a63:ce43:: with SMTP id r3-v6mr5704786pgi.439.1533894757291; Fri, 10 Aug 2018 02:52:37 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.52.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:52:36 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 2/9] dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs Date: Fri, 10 Aug 2018 15:21:06 +0530 Message-Id: <20180810095113.25292-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Reset Controller bindings to clock bindings for Actions Semi Owl SoCs, S700 and S900. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/clock/actions,owl-cmu.txt | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt b/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt index d1e60d297387..2ef86ae96df8 100644 --- a/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt +++ b/Documentation/devicetree/bindings/clock/actions,owl-cmu.txt @@ -13,6 +13,7 @@ Required Properties: region. - clocks: Reference to the parent clocks ("hosc", "losc") - #clock-cells: should be 1. +- #reset-cells: should be 1. Each clock is assigned an identifier, and client nodes can use this identifier to specify the clock which they consume. @@ -36,6 +37,7 @@ Example: Clock Management Unit node: reg = <0x0 0xe0160000 0x0 0x1000>; clocks = <&hosc>, <&losc>; #clock-cells = <1>; + #reset-cells = <1>; }; Example: UART controller node that consumes clock generated by the clock From patchwork Fri Aug 10 09:51:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143905 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3142450ljj; Fri, 10 Aug 2018 02:52:50 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwfEoQSoqJUf4cZ0SuQvk3uYo+K569dhVmIMCZaQ0JaDrB9v4FINxL67XTJE8LUDXwlL2KK X-Received: by 2002:a17:902:8a4:: with SMTP id 33-v6mr5642246pll.82.1533894770814; Fri, 10 Aug 2018 02:52:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894770; cv=none; d=google.com; s=arc-20160816; b=aHx922XXgJi8UwoVeMEc3uIZQaHyZt9+kBGX+B5Ra/bHTsCvJ4IYK4nuSlQ+j5ekvb kbN0YmJZ8e4PU1uwV9EIy4jXcqK7Y8KviGpxG15xCL/RUzzZ/UUf4P7CXNvOQbDnBM4q NhrConoL/lE8b82GGaEA745cE7KnyTrmFK0IrD+7a9/Dw7mUBXg2g+7EfXxC0HN3bPVS hAlvLV+tqGn3CxddtzD7WrvU4a0NJMIx5rx/PU7bkTOSxM7HUXICUhJnr5k5W8d1MdEe swB9hp5NWBHtEVoq9zdCzH8ldOUsqqrMvcCujJKgbexAk97n95RVJa9kN+Dy1apISxWQ /MnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=NS8UBL4W/CarR63b2sZoTAS5k7ni5obK/2A4TXpVF1Q=; b=uLEKECnYES1KCq0qA886OYAOC9Y1rIILCgNTXzV9Ey4O1z7B0D2bRQX7wZsyMqCZgF JRJ5Va1gLCPbOUUmtZNk7tU0V4sYUxT2uAEGrakXfAX/nwgJfRML2HmdVjR+jfxvM7co 965EDm0cbaKtYJaD2s7LKpK1rFEXqscSQyKYgH8QTK2/mUjv7JuU/fz/soX+g09QoyST DbfLhRDNFgf12M4xH9YqtaI+SZV1MRxPt5+h0OYwLOlxuYalB77e7pK+ziPMy5p8BEDH tUTJTb7C7CTpYICzfmuOAW1UIJ7IEGLD1t2rmeRaHMH2aqf2L/c6rc9cANpQ7isAXM5B agwg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Gx/ZiKv2"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r23-v6si9587916pgb.623.2018.08.10.02.52.50; Fri, 10 Aug 2018 02:52:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Gx/ZiKv2"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727806AbeHJMV5 (ORCPT + 5 others); Fri, 10 Aug 2018 08:21:57 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:36602 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727236AbeHJMV5 (ORCPT ); Fri, 10 Aug 2018 08:21:57 -0400 Received: by mail-pl0-f66.google.com with SMTP id e11-v6so3845283plb.3 for ; Fri, 10 Aug 2018 02:52:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NS8UBL4W/CarR63b2sZoTAS5k7ni5obK/2A4TXpVF1Q=; b=Gx/ZiKv2inFXe0wTJnychBnLtRNT01PImry3eVPP/+45vTNgHgmtA199x5fiLUrzzz i+9icVR+oT3dvMoWKtA8cZnbRA3793spjQx7LMD64AJbMyfN97otwIxti1q4HvJGKY09 0D45s2o/SSiZXh5DDjOP/4UmXTXlg3LD1sEq4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NS8UBL4W/CarR63b2sZoTAS5k7ni5obK/2A4TXpVF1Q=; b=lmRKfirPJjvsJ8RWyc/ub/GHw2YeSVxRV0r+gCUBgAEUs6UXwIYa+KBiqdBh/Exh6Y OC/JR5qZNoUo4qN1/9egBTAy+o8pHts509pbKjImNevGP920s7lgjYVn0zu4Asn24bwP /2nu07tphDqz7nY0xY3zmxqWcTxkGXRP4yRvoTvE/WqzNyNCV7G+qGUJTziGhDlWPpqt Lda3scGgzDge5MjnaNyJD/Wo3hWyFmBF8HGa8K8o1diuGfxyR+vLeqni+laiiQJjs7qf VzIEm6R4WjPvSys1P2Emo97xdVZJZeSX/UmLg/a9gokZ0W92BI28KPIqqLurlhafE29u gIrQ== X-Gm-Message-State: AOUpUlFXh38s+UfBO3WmLfWPtUec5GAWhUEZn59n8rSITvrEpzP/zJXd dkY2N2rUbe49wTAlmjS+mCWC X-Received: by 2002:a17:902:3204:: with SMTP id y4-v6mr5521591plb.195.1533894769320; Fri, 10 Aug 2018 02:52:49 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.52.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:52:48 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 3/9] dt-bindings: reset: Add binding constants for Actions Semi S700 RMU Date: Fri, 10 Aug 2018 15:21:07 +0530 Message-Id: <20180810095113.25292-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding constants for Actions Semi S700 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../dt-bindings/reset/actions,s700-reset.h | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 include/dt-bindings/reset/actions,s700-reset.h -- 2.17.1 diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h new file mode 100644 index 000000000000..5e3b16b8ef53 --- /dev/null +++ b/include/dt-bindings/reset/actions,s700-reset.h @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +// +// Device Tree binding constants for Actions Semi S700 Reset Management Unit +// +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_ACTIONS_S700_RESET_H +#define __DT_BINDINGS_ACTIONS_S700_RESET_H + +#define RESET_AUDIO 0 +#define RESET_CSI 1 +#define RESET_DE 2 +#define RESET_DSI 3 +#define RESET_GPIO 4 +#define RESET_I2C0 5 +#define RESET_I2C1 6 +#define RESET_I2C2 7 +#define RESET_I2C3 8 +#define RESET_KEY 9 +#define RESET_LCD0 10 +#define RESET_SI 11 +#define RESET_SPI0 12 +#define RESET_SPI1 13 +#define RESET_SPI2 14 +#define RESET_SPI3 15 +#define RESET_UART0 16 +#define RESET_UART1 17 +#define RESET_UART2 18 +#define RESET_UART3 19 +#define RESET_UART4 20 +#define RESET_UART5 21 +#define RESET_UART6 22 + +#endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */ From patchwork Fri Aug 10 09:51:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143906 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3142652ljj; Fri, 10 Aug 2018 02:53:04 -0700 (PDT) X-Google-Smtp-Source: AA+uWPw3hQPwNdvA8UuM9r9iUZ7lntr8Uc96BqQzp9j8GZTIkXecAp4ALiQqGrBsAXm8xQgU5jej X-Received: by 2002:a63:ce12:: with SMTP id y18-v6mr5784261pgf.144.1533894784131; Fri, 10 Aug 2018 02:53:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894784; cv=none; d=google.com; s=arc-20160816; b=BX6DcifEubtthKjfEQsHirUNAg1OTPZVNjsFBKfqR05ayo5zwgxT/LYjn3j2R4TZn0 U2bFnTrSOWJDBIRCU7hZrZ7EI/+Os1Fy8MJSyVU+ERRzovAPdL9luNSxqxI1t8EsnGi6 mghxE/K0B3Qgv/uXG0ulJWv69fQsI/Ld35V/6wsmFYIKvkyR6R5SkZfVvBbNyWRwbDRN pPqtWxQicWUOjACMUeHVKW5csqFlv/9lD8Z7wrDZ6XGbydoNWUmY3AUaKKWSgkzmL4C9 paWBl2KcH8wGVw34oSJYH/Pl17UytqBC/JJdzSq4cqCj222uWyyiVuXsJROf0gk3vveF I7mA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=m7omJghwxry92mB545Mlp7I5QhKBRVC7Mla03NRy+O4=; b=Mwdre8x/MvrvOEoIOnXfQZRh1KhTm627f6w8BkyO2EJYcbxwCnpY1/d8xFE56dCKUB CBezfvEaS6XxvAiYs0vqrGcR88ScflL3YYQcQZQhw7IJXQrjuCK1zn3PkvqS3/G+p/bd GZNpU6z3EduQFJsuvKG/Q0CEsDtz11+K81Djna8wL4YhKCv8mdDUx1mzYqgX/1rj7KaQ W/PJ712MorxMEwLIuiCmSKoGTq9b9bdTNHlA3S182kjsYhnls/fxs8fSslxvx6NcY31G rlLvFPl3R8uhMwwXSok8/v/elqA89m34xdWIeKrl6peAbX2RMVyVbTMM1wxzTgJPjv+u /6MQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YuXdaSZP; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bc6-v6si5181279plb.115.2018.08.10.02.53.03; Fri, 10 Aug 2018 02:53:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YuXdaSZP; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727732AbeHJMWK (ORCPT + 5 others); Fri, 10 Aug 2018 08:22:10 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:39364 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727795AbeHJMWK (ORCPT ); Fri, 10 Aug 2018 08:22:10 -0400 Received: by mail-pg1-f195.google.com with SMTP id a11-v6so4165212pgw.6 for ; Fri, 10 Aug 2018 02:53:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=m7omJghwxry92mB545Mlp7I5QhKBRVC7Mla03NRy+O4=; b=YuXdaSZPOcUZGWicnsdd5aQ0bxt9kAq5u11vC0dNJA6nntRT7TtR+wZpTtWo7S0SiM K9NPtvPF1J6gyxNmMfM+Ib6Hrcx6AjTdTPc21H1nrd9VXePJOGGOCzVA9VIY8Xx2fCop K8HggOPeYhYh+wmAF4vWryB4F+1OhSaG9S5Qo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m7omJghwxry92mB545Mlp7I5QhKBRVC7Mla03NRy+O4=; b=FJsLI6reeMlukwpK06K3KvpHJQ9CiO3ISzDm41+leXGisVyBwir46M39MyZdlzdeBH y6DpC6SovE/WZ39QvgnvdIswiZfzCpey8vgbabiRf9Bszl6T5s/sV4XobK8ZwM3mCHLJ 6vwef7935vZ5bYgThmUeIGJzyT+w+86CdIlCQVYenLv4dIea0P8SSsRh0pkp62jYQto2 LtbjzGLG2zhxPqG2kQuF/aXwC3duCDz4J0gLNYoti5cLR9/iOJhZKYu7jga0Jv4LE27W 3ehJ/YlJ4wdnJ7ZzNaz2yHZmvhe681/48WRHvLi4kUC5DiXwuBOpnxCUk+Uw09gHmp+6 HWbQ== X-Gm-Message-State: AOUpUlHTHQIMKJaDxsv8YtpTGd8aa9pL3Eb1C4lkdXDo1tZMfeXBUVRT bkAO5xB1Ch6AZ97M3mMangmF X-Received: by 2002:a63:7252:: with SMTP id c18-v6mr5592481pgn.186.1533894781179; Fri, 10 Aug 2018 02:53:01 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.52.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:53:00 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 4/9] dt-bindings: reset: Add binding constants for Actions Semi S900 RMU Date: Fri, 10 Aug 2018 15:21:08 +0530 Message-Id: <20180810095113.25292-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device tree binding constants for Actions Semi S900 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../dt-bindings/reset/actions,s900-reset.h | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 include/dt-bindings/reset/actions,s900-reset.h -- 2.17.1 diff --git a/include/dt-bindings/reset/actions,s900-reset.h b/include/dt-bindings/reset/actions,s900-reset.h new file mode 100644 index 000000000000..42c19d02e43b --- /dev/null +++ b/include/dt-bindings/reset/actions,s900-reset.h @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +// +// Device Tree binding constants for Actions Semi S900 Reset Management Unit +// +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H +#define __DT_BINDINGS_ACTIONS_S900_RESET_H + +#define RESET_CHIPID 0 +#define RESET_CPU_SCNT 1 +#define RESET_SRAMI 2 +#define RESET_DDR_CTL_PHY 3 +#define RESET_DMAC 4 +#define RESET_GPIO 5 +#define RESET_BISP_AXI 6 +#define RESET_CSI0 7 +#define RESET_CSI1 8 +#define RESET_DE 9 +#define RESET_DSI 10 +#define RESET_GPU3D_PA 11 +#define RESET_GPU3D_PB 12 +#define RESET_HDE 13 +#define RESET_I2C0 14 +#define RESET_I2C1 15 +#define RESET_I2C2 16 +#define RESET_I2C3 17 +#define RESET_I2C4 18 +#define RESET_I2C5 19 +#define RESET_IMX 20 +#define RESET_NANDC0 21 +#define RESET_NANDC1 22 +#define RESET_SD0 23 +#define RESET_SD1 24 +#define RESET_SD2 25 +#define RESET_SD3 26 +#define RESET_SPI0 27 +#define RESET_SPI1 28 +#define RESET_SPI2 29 +#define RESET_SPI3 30 +#define RESET_UART0 31 +#define RESET_UART1 32 +#define RESET_UART2 33 +#define RESET_UART3 34 +#define RESET_UART4 35 +#define RESET_UART5 36 +#define RESET_UART6 37 +#define RESET_HDMI 38 +#define RESET_LVDS 39 +#define RESET_EDP 40 +#define RESET_USB2HUB 41 +#define RESET_USB2HSIC 42 +#define RESET_USB3 43 +#define RESET_PCM1 44 +#define RESET_AUDIO 45 +#define RESET_PCM0 46 +#define RESET_SE 47 +#define RESET_GIC 48 +#define RESET_DDR_CTL_PHY_AXI 49 +#define RESET_CMU_DDR 50 +#define RESET_DMM 51 +#define RESET_HDCP2TX 52 +#define RESET_ETHERNET 53 + +#endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */ From patchwork Fri Aug 10 09:51:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143907 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3142775ljj; Fri, 10 Aug 2018 02:53:14 -0700 (PDT) X-Google-Smtp-Source: AA+uWPzJXYUkTA4z3ynFgbj1qzHbQf/maqW0Otv/i8dNxpYRjZ5mQAonauv72m83fY9KgLzsNgKX X-Received: by 2002:a17:902:7683:: with SMTP id m3-v6mr5426175pll.255.1533894794788; Fri, 10 Aug 2018 02:53:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894794; cv=none; d=google.com; s=arc-20160816; b=U5AieUN9as+pXBmS9+Zxyi9O7Z07gRSsO9W4ioavUrpINwRk4mXiorUhIHS9EXdZqF JLKyxcvbe1iMe9xeXPO9uUOAacsMolKOaCNQmzMc8cfDRjmFsrObgITMnDTUz9/tTh5N zryEkepa7ydn8TE0u2NHJ8WpgVzHKCsrfeyZvOIkqcdVW4pvX0xKI2g0qC00mlFVbl+A fvMrS8sTHI6vl1em4PLBc8WdGjYg/ZrpDuavFheEEu3kNPvBAErCpYKdpIXF22OQjZTA iFs4Pd62UWaPzzU/kSZtedFIPonJrad4xoEYYB+psQNum5f+fuiYkLgIpYvu5kVt6UdW 9feg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=a051E4GqSMvmAhDqqTiyyKiddvx4SdUz+36qdsU6cPc=; b=KDI/XY2isgxprU9mgDqUELqqJGZOshvnF9X7Hg8EJ2zOruJ6096/72SdlgB21wLKk1 16anvlF/uNOq3Wo+/OXB0doyhLFTfU4k8FYr2KGSdOWJww7R6PyiNhs2GNijH63e62yk hUKwodc5jtNZoBFCVOLPmi/K2oqAxQ7a7CfkF8YCNZpw+U2hqfj459YgTQCEnk4omJbM 8d7WuM0rf6U4twsjmWpXRK1se+YSHpSR7lwrV0wxrxNHcEoWmhde0aVT3zQNcyALN+yg i7WnAazFZHasRNHIE7sb9a4vgI4ogW+BBlNi8Zuxu8Xhg6SCMhdmb7L5ypVN/bfFm7Yu NS4g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z+M8RKSb; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a20-v6si7814348pls.237.2018.08.10.02.53.14; Fri, 10 Aug 2018 02:53:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z+M8RKSb; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727795AbeHJMWV (ORCPT + 5 others); Fri, 10 Aug 2018 08:22:21 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:34777 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727209AbeHJMWV (ORCPT ); Fri, 10 Aug 2018 08:22:21 -0400 Received: by mail-pl0-f68.google.com with SMTP id f6-v6so3848681plo.1 for ; Fri, 10 Aug 2018 02:53:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=a051E4GqSMvmAhDqqTiyyKiddvx4SdUz+36qdsU6cPc=; b=Z+M8RKSbwAwq6JFssKZQVhbVmb7zuGlIWivUzvwhLk/EoehPDEfQ5jdFW1tMJE3PvA MD2w1jamgkVjtT/XHEbx2/wesWGS1YT6zBHrXYRFftWVhqfcBHEjcao79QDywiUwtugq bgdPJm8Ox2YhO+r10ZGeBc9qvOBYRYR8qpaH4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=a051E4GqSMvmAhDqqTiyyKiddvx4SdUz+36qdsU6cPc=; b=dkqhG2QN/BEHPb8nmCs5yeXdd6lyXfpRps1cQc3eQEP7L3N+Yy7nY+Mu+exhZtlYLb BBT/kgeXAjnPaW7hwbeID3s+eOIvfE/l7dHnPE2ho4KNA/UwOlriCMLjeozzQ2xKulaK VNZvh1lkQfUIxe5MV9KWtrYlI4ZXO+CQbwuIG2HU64UNW1yiW8yLEsM7hNsG6uyfOk4Q JdZdDMf/KDvPf56Oma+Zq0M8rotrrwCpurFvWd+Sbshn/w9HiAOItKaZyqb7bJN/vfMI almvOMDKDJnEajqPsLWVwiGid/750DNTEDTSscNAsdoCYS7fiPGr/uS1sLPgj7KG/I/J QE3g== X-Gm-Message-State: AOUpUlGm6WJfOeWUmGshAM2MYvpWPW8+ih0KHhIUzIHJlGOykkhmPyh6 Jq5/k4gNyNzyZu1l33o1tFvB X-Received: by 2002:a17:902:740b:: with SMTP id g11-v6mr5544869pll.85.1533894792969; Fri, 10 Aug 2018 02:53:12 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.53.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:53:12 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 5/9] arm64: dts: actions: Add Reset Controller support for S700 SoC Date: Fri, 10 Aug 2018 15:21:09 +0530 Message-Id: <20180810095113.25292-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add reset controller property and bindings header for the Actions Semi S700 SoC DTS. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s700.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index 59d29e4ca404..30c4c6ea89ea 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -5,6 +5,7 @@ #include #include +#include / { compatible = "actions,s700"; @@ -165,6 +166,7 @@ reg = <0x0 0xe0168000 0x0 0x1000>; clocks = <&hosc>, <&losc>; #clock-cells = <1>; + #reset-cells = <1>; }; sps: power-controller@e01b0100 { From patchwork Fri Aug 10 09:51:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143908 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3142926ljj; Fri, 10 Aug 2018 02:53:25 -0700 (PDT) X-Google-Smtp-Source: AA+uWPzCw6FGL8b3VoxvbBzeGQD0+ya+H98yBBG99xs78A8r0irmozTdh7wItX/jxOLmfGtM1Eyu X-Received: by 2002:a17:902:6105:: with SMTP id t5-v6mr5589648plj.92.1533894805579; Fri, 10 Aug 2018 02:53:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894805; cv=none; d=google.com; s=arc-20160816; b=jV4qpcDiGMgSrfXybs+WjVr53lVNC/wvd/hha8z3KZDzH52dKw19rlhycTDsuIkFv5 +pnDPJchr2GsimKEAlw5FCDwUsPR/kJ8PGrUZIWGEgI95+fSgztxA+mx6w2PkOyYKyjd surASwGhRJnG3eh0/UgWS6rzcyqkZq//T2lHc+qS5RrDZa+Ms6Rn2/r4Vf5sgqHqixPi IEwhXEqSf+5i6HXyzFKNgLUoITsjzowY8rF2MvAlq2utk9qsUTXLusN+HK0fT0TpVnDu q4rb6Z3jmzsxfKFfdgV3vEWO9Hq5GlIGntCBGsJCoDpdxqmF759pnXHL7Jqt7mY6eUiw RaMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=DwKugHCgj7TpoVeG3f0Y/2LdewKxgh4h4yjO9QRfsGI=; b=XifHA6oPaLLNHsM3xXbfl1DkGSvXI1kGpHOTZ8bCeJIHQqHgWBX8KkYMezitWg/c1g zneqBL6Rh3qt5G62LH8wlau989iTbaLIH6Pud+PpIUcPSXUQudBkYboiS7SxsT9Vn9O7 V43Q7CDi4EcsKYBl4c2CZvJ2yT3+VTMi1pEoQq8CYPg8auN8S0pV0XUC/Oe3xTConIQh tj5dz+ItOqq2HZrsgbarDMqWUCh1bdHBJbIrNi1JhhrEvldrQCtn53RVM0AOEx5z3h7D L7fDV85GKngBfj6LurUC8EnyLw2mmPdRJHwqHCpalAukDjK2qoGtxyc20fckewX9jqT+ eQZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GGzonvUF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m126-v6si11215170pfb.126.2018.08.10.02.53.25; Fri, 10 Aug 2018 02:53:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GGzonvUF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727748AbeHJMWc (ORCPT + 5 others); Fri, 10 Aug 2018 08:22:32 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:34898 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727543AbeHJMWc (ORCPT ); Fri, 10 Aug 2018 08:22:32 -0400 Received: by mail-pf1-f196.google.com with SMTP id p12-v6so4300100pfh.2 for ; Fri, 10 Aug 2018 02:53:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DwKugHCgj7TpoVeG3f0Y/2LdewKxgh4h4yjO9QRfsGI=; b=GGzonvUF2OOViZIuHzjTHGOGvFHbqBl53HWKD/tv73dIQX5FCb3GLLr0FuY4sllsix ry0HAI66zHg12LUwcglH4NkEvn3hT+QSdEmEwg3C3F6uHPtyRZdE2pECvxu+d2W4vT5l /EOy8/omAC5eBy+o2hNWITlQEEetFDaWd/vGE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DwKugHCgj7TpoVeG3f0Y/2LdewKxgh4h4yjO9QRfsGI=; b=frgs25L6Tgwt6FxduMWXhGJ+9Nj3Ek0JBpyncFpXQ1zV1DlrCXT525ebRUUk+wYiqH d3UyyrDTyKsPt7TW9H28vDGbA/2VTkuTWm5RKmnsBEGAxG0uNnPIbJ8GN9gqYDuPXJ/y mwr1hHe1v1ky/hu7H1Om012q+RS4Q0nldSaMQZmvldPB1JvtnzPlRzPxDOIUI8WFECgq PiYq1zekph+tHTy08ZJypTlLTAxp34dSDuvkfYOXUCSjiTNawq6i5BzVwJcN2FWR2sCC UWMUqJTOrbwrYpI/CeLsRBIAqe7IipDf3i7w8BHFqfwnfqT5ioys+Ol0by/rMv6DXQt3 QEiA== X-Gm-Message-State: AOUpUlEDFhwnzpe6vChmPIrWcsSqtXA95x+KJvlONOIC0D1l6VZttfOL FWjVias52DP7z+7ouNFUkO+N X-Received: by 2002:a63:ce43:: with SMTP id r3-v6mr5707205pgi.439.1533894804162; Fri, 10 Aug 2018 02:53:24 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.53.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:53:23 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 6/9] arm64: dts: actions: Add Reset Controller support for S900 SoC Date: Fri, 10 Aug 2018 15:21:10 +0530 Message-Id: <20180810095113.25292-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add reset controller property and bindings header for the Actions Semi S900 SoC DTS. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/actions/s900.dtsi index aa3a49b0d646..4fbb39fd7971 100644 --- a/arch/arm64/boot/dts/actions/s900.dtsi +++ b/arch/arm64/boot/dts/actions/s900.dtsi @@ -6,6 +6,7 @@ #include #include +#include / { compatible = "actions,s900"; @@ -172,6 +173,7 @@ reg = <0x0 0xe0160000 0x0 0x1000>; clocks = <&hosc>, <&losc>; #clock-cells = <1>; + #reset-cells = <1>; }; pinctrl: pinctrl@e01b0000 { From patchwork Fri Aug 10 09:51:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143909 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3143086ljj; Fri, 10 Aug 2018 02:53:38 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxLRlri3iZ7u6gdNetTiOMcCM49mebiC1r+FzlDRAJH/c9wv5nsTPodCpEWYSuNrHrHvw52 X-Received: by 2002:a65:5545:: with SMTP id t5-v6mr5784826pgr.157.1533894818661; Fri, 10 Aug 2018 02:53:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894818; cv=none; d=google.com; s=arc-20160816; b=uiDJn8DdSMIDzhRJhpukULJ+ysZotPP9IrwqhsXcgTFKDPSIOtu5c+xE6qxX1dGAO/ znRwfTej/xjskqF7ZXHw6WJg6YpuWGLzOElK6LL4YoA2m6QWLQ7ZJcn7KWa7p+5okko5 XBjzfZ/w5dT2d9eZ8sTA6SPUuw2xKt/e0QqhlofV21RrnPOFI4KJOI7QD/gcNsx4Wuu7 SQ7fib4mMNUFq49lvZdj+DIAI3X52kgTEbquKWC+8aNO+3giav4YBBetAQI1xn1hrFmP eDajramq8Y/ixAFiI5EPVJ8CWM/VkLu0zGNgrz/ahSMvEbzmZgmyc4yL7pO3n3v6euxz 1ReA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=aSAAa+s6BC6vmUVrsIHnMhod2TH+xc3yY1ux/OMaXVk=; b=KqnLxkT9H6XWIF49nwasFNLaxiCkf9wTaBUWzpum0NnJ3mOivGCdfhStilOMQzhceu qItgZciSk9bNqhGcQP/C5p2j9zhtTSMn2C87XbgUl73w+mlIh/x/vCE3g4awxX0sjRTh j1EK4TSFvToFScCkZ46p/6m7RLCqhfj5SmZ/A/LkmLpfFIg9lLJv0o5aoQJlShC0ZkiC /i2mbUbQOhopU1wUXpglbD9KgogE4lJKSVMHqHoe48yTZV0ZpcrTXhNcN1ycPkl6P0um J1QCtJwB6dh8oFVJUzqi51ZOSEnMG0MiiJuJYoBbwc15i2kD+qTDVIz/wfE2VwxKojc0 P7BA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ry8W+mNi; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 31-v6si9583201pla.129.2018.08.10.02.53.38; Fri, 10 Aug 2018 02:53:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ry8W+mNi; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728011AbeHJMWq (ORCPT + 5 others); Fri, 10 Aug 2018 08:22:46 -0400 Received: from mail-pl0-f65.google.com ([209.85.160.65]:33318 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727486AbeHJMWp (ORCPT ); Fri, 10 Aug 2018 08:22:45 -0400 Received: by mail-pl0-f65.google.com with SMTP id b90-v6so3851480plb.0 for ; Fri, 10 Aug 2018 02:53:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aSAAa+s6BC6vmUVrsIHnMhod2TH+xc3yY1ux/OMaXVk=; b=Ry8W+mNiPbEr7ySiW6xp3QCzonGbNdhrFXMQc9y0rPup1Kykmlv1P3eBScv/3QPzhA x4AXJmUbLX7XDHFGC8IfQI/y9CZSP+/ooQ4yl9c7J3qLogdn/G+UVHJUb5JB2AWmr9Pt TLjd+DXU/aW9g6cUjolrqn4Ne2/jxbSuwaCTU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aSAAa+s6BC6vmUVrsIHnMhod2TH+xc3yY1ux/OMaXVk=; b=QACUL7+Z3/0fD+Z2DbEOuvtlxd9UO9ftTOks/l+7ba02729XwFDTV2sJPQ3qICw73I XwVEniK/0INSpVZFfEcxx3i0rrIGylHBo15LxlBQyRJ7Z8ZGVg6YGWVjNfebFOLrx3UG DH12PV/1bmKpLW4AV2nTF6ECgrg1nOO7YPO4xUNOg3YnxBcAxko2DjcQDZ3/28PlhMd1 Fc0Rf3GqnI924moY1J2LdpH4fZFk28BFPTx4xMBCPJhoRsLqb3GzbM6oJz8xWWiwaN6j ax06ldnNAbNyiuTzRJmiOMr0h2qzxR1jnNcS+Ax9S+6yLETiRDC9ZFybfhOSvI7UYRSV Nz6g== X-Gm-Message-State: AOUpUlG3EqCjGlKoSQRBx42prChxpo4Ok61p3WsuPFJPeG98wWkIWlte JuSx6u5E5eoVgs/NLcW3g9ki X-Received: by 2002:a17:902:a58b:: with SMTP id az11-v6mr5441735plb.36.1533894816716; Fri, 10 Aug 2018 02:53:36 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.53.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:53:36 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 7/9] clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support Date: Fri, 10 Aug 2018 15:21:11 +0530 Message-Id: <20180810095113.25292-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Reset Management Unit (RMU) support for Actions Semi Owl SoCs. Signed-off-by: Manivannan Sadhasivam --- drivers/clk/actions/Kconfig | 1 + drivers/clk/actions/Makefile | 1 + drivers/clk/actions/owl-common.h | 2 + drivers/clk/actions/owl-reset.c | 66 ++++++++++++++++++++++++++++++++ drivers/clk/actions/owl-reset.h | 31 +++++++++++++++ 5 files changed, 101 insertions(+) create mode 100644 drivers/clk/actions/owl-reset.c create mode 100644 drivers/clk/actions/owl-reset.h -- 2.17.1 diff --git a/drivers/clk/actions/Kconfig b/drivers/clk/actions/Kconfig index dc38c85a4833..04f0a6355726 100644 --- a/drivers/clk/actions/Kconfig +++ b/drivers/clk/actions/Kconfig @@ -2,6 +2,7 @@ config CLK_ACTIONS bool "Clock driver for Actions Semi SoCs" depends on ARCH_ACTIONS || COMPILE_TEST select REGMAP_MMIO + select RESET_CONTROLLER default ARCH_ACTIONS if CLK_ACTIONS diff --git a/drivers/clk/actions/Makefile b/drivers/clk/actions/Makefile index 78c17d56f991..ccfdf9781cef 100644 --- a/drivers/clk/actions/Makefile +++ b/drivers/clk/actions/Makefile @@ -7,6 +7,7 @@ clk-owl-y += owl-divider.o clk-owl-y += owl-factor.o clk-owl-y += owl-composite.o clk-owl-y += owl-pll.o +clk-owl-y += owl-reset.o # SoC support obj-$(CONFIG_CLK_OWL_S700) += owl-s700.o diff --git a/drivers/clk/actions/owl-common.h b/drivers/clk/actions/owl-common.h index 56f01f7774aa..5a866a8b913d 100644 --- a/drivers/clk/actions/owl-common.h +++ b/drivers/clk/actions/owl-common.h @@ -26,6 +26,8 @@ struct owl_clk_desc { struct owl_clk_common **clks; unsigned long num_clks; struct clk_hw_onecell_data *hw_clks; + const struct owl_reset_map *resets; + unsigned long num_resets; struct regmap *regmap; }; diff --git a/drivers/clk/actions/owl-reset.c b/drivers/clk/actions/owl-reset.c new file mode 100644 index 000000000000..203f8f34a8d4 --- /dev/null +++ b/drivers/clk/actions/owl-reset.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Actions Semi Owl SoCs Reset Management Unit driver +// +// Copyright (c) 2018 Linaro Ltd. +// Author: Manivannan Sadhasivam + +#include +#include +#include + +#include "owl-reset.h" + +static int owl_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct owl_reset *reset = to_owl_reset(rcdev); + const struct owl_reset_map *map = &reset->reset_map[id]; + + return regmap_update_bits(reset->regmap, map->reg, map->bit, 0); +} + +static int owl_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct owl_reset *reset = to_owl_reset(rcdev); + const struct owl_reset_map *map = &reset->reset_map[id]; + + return regmap_update_bits(reset->regmap, map->reg, map->bit, map->bit); +} + +static int owl_reset_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + owl_reset_assert(rcdev, id); + udelay(1); + owl_reset_deassert(rcdev, id); + + return 0; +} + +static int owl_reset_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct owl_reset *reset = to_owl_reset(rcdev); + const struct owl_reset_map *map = &reset->reset_map[id]; + u32 reg; + int ret; + + ret = regmap_read(reset->regmap, map->reg, ®); + if (ret) + return ret; + + /* + * The reset control API expects 0 if reset is not asserted, + * which is the opposite of what our hardware uses. + */ + return !(map->bit & reg); +} + +const struct reset_control_ops owl_reset_ops = { + .assert = owl_reset_assert, + .deassert = owl_reset_deassert, + .reset = owl_reset_reset, + .status = owl_reset_status, +}; diff --git a/drivers/clk/actions/owl-reset.h b/drivers/clk/actions/owl-reset.h new file mode 100644 index 000000000000..10f5774979a6 --- /dev/null +++ b/drivers/clk/actions/owl-reset.h @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Actions Semi Owl SoCs Reset Management Unit driver +// +// Copyright (c) 2018 Linaro Ltd. +// Author: Manivannan Sadhasivam + +#ifndef _OWL_RESET_H_ +#define _OWL_RESET_H_ + +#include + +struct owl_reset_map { + u32 reg; + u32 bit; +}; + +struct owl_reset { + struct reset_controller_dev rcdev; + const struct owl_reset_map *reset_map; + struct regmap *regmap; +}; + +static inline struct owl_reset *to_owl_reset(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct owl_reset, rcdev); +} + +extern const struct reset_control_ops owl_reset_ops; + +#endif /* _OWL_RESET_H_ */ From patchwork Fri Aug 10 09:51:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 143910 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp3143201ljj; Fri, 10 Aug 2018 02:53:48 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxIA8b2qiAMqhBS345YITZu6VSS2Bsn3N09CY90aTGf4uR4KZBFM4QXvk2MbeDmrgcUMdgO X-Received: by 2002:aa7:86d7:: with SMTP id h23-v6mr6392164pfo.132.1533894828617; Fri, 10 Aug 2018 02:53:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533894828; cv=none; d=google.com; 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[209.132.180.67]) by mx.google.com with ESMTP id t8-v6si7202359plq.287.2018.08.10.02.53.48; Fri, 10 Aug 2018 02:53:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="X4q/EnaT"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728036AbeHJMW4 (ORCPT + 5 others); Fri, 10 Aug 2018 08:22:56 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:37603 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728030AbeHJMWz (ORCPT ); Fri, 10 Aug 2018 08:22:55 -0400 Received: by mail-pl0-f67.google.com with SMTP id d5-v6so3849996pll.4 for ; Fri, 10 Aug 2018 02:53:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MBvuFBV5qOIqECOgSkO0pJBwuy9QapS51eF1dTzfyKM=; b=X4q/EnaTj5HPDdqWNia1bWuuReYbl+ISTTpJpcQL0Px9yOKJyvqbL3y8BKgH5NEw8g lG7qOQbIDSose8IC/UeflAyQdAA9yPLA+q4RRZ05cotp5LAB+0m5Opq+WVVQ5aTzfxiz K20bv7LfFQ8IqGNOquTEmbDnw9A8/N9AFQgPA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MBvuFBV5qOIqECOgSkO0pJBwuy9QapS51eF1dTzfyKM=; b=YwPrIU61oWiAL5itQG+nsXqHXgB5zhC4NRj8GzdpmM3B93fIqe+TmyMzbOLqPIUaaD cv/IstbpVqDAAb2J3lqgHRpuFMc9Shm+PMjCINuVDnZPv1QWAGqguvS6hGhWmSAun5Ha 13hJwQX6GRDwr3wp4zJzKcN5I+aiPA00n8Um+6FB4Bj/X/8lWIdkXZHBDcK2B81pASDF 9mty8Ce7BsndKKiNcoZKo6YZI5L/Dw+Bddn92fu0QSvElDBLPZg4ctsrN0hP9IDev4YT tXcUWEzrhCnl0fvQj/Ce7gzjTaJaWMYdws0oVVZ61EUx3nJJyEvIe39FTU8chpnZMM54 bERg== X-Gm-Message-State: AOUpUlEp2p4HA92JIHYl8GnzAXr+dy9mEitDpj0fEXN+lJfapM/b07FR DtxYzYAg9EL2xbyPEI1by8L9 X-Received: by 2002:a17:902:c6b:: with SMTP id 98-v6mr5446981pls.233.1533894827058; Fri, 10 Aug 2018 02:53:47 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6391:e983:9562:f5f7:1a60:4363]) by smtp.gmail.com with ESMTPSA id n83-v6sm25315120pfk.19.2018.08.10.02.53.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Aug 2018 02:53:46 -0700 (PDT) From: Manivannan Sadhasivam To: p.zabel@pengutronix.de, mturquette@baylibre.com, sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com, Manivannan Sadhasivam Subject: [PATCH v3 8/9] clk: actions: Add Actions Semi S700 SoC Reset Management Unit support Date: Fri, 10 Aug 2018 15:21:12 +0530 Message-Id: <20180810095113.25292-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> References: <20180810095113.25292-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Reset Management Unit (RMU) support for Actions Semi S700 SoC. Signed-off-by: Manivannan Sadhasivam --- drivers/clk/actions/owl-s700.c | 51 ++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) -- 2.17.1 diff --git a/drivers/clk/actions/owl-s700.c b/drivers/clk/actions/owl-s700.c index e7cacd677275..a2f34d13fb54 100644 --- a/drivers/clk/actions/owl-s700.c +++ b/drivers/clk/actions/owl-s700.c @@ -20,8 +20,10 @@ #include "owl-gate.h" #include "owl-mux.h" #include "owl-pll.h" +#include "owl-reset.h" #include +#include #define CMU_COREPLL (0x0000) #define CMU_DEVPLL (0x0004) @@ -569,20 +571,69 @@ static struct clk_hw_onecell_data s700_hw_clks = { .num = CLK_NR_CLKS, }; +static const struct owl_reset_map s700_resets[] = { + [RESET_DE] = { CMU_DEVRST0, BIT(0) }, + [RESET_LCD0] = { CMU_DEVRST0, BIT(1) }, + [RESET_DSI] = { CMU_DEVRST0, BIT(2) }, + [RESET_CSI] = { CMU_DEVRST0, BIT(13) }, + [RESET_SI] = { CMU_DEVRST0, BIT(14) }, + [RESET_I2C0] = { CMU_DEVRST1, BIT(0) }, + [RESET_I2C1] = { CMU_DEVRST1, BIT(1) }, + [RESET_I2C2] = { CMU_DEVRST1, BIT(2) }, + [RESET_I2C3] = { CMU_DEVRST1, BIT(3) }, + [RESET_SPI0] = { CMU_DEVRST1, BIT(4) }, + [RESET_SPI1] = { CMU_DEVRST1, BIT(5) }, + [RESET_SPI2] = { CMU_DEVRST1, BIT(6) }, + [RESET_SPI3] = { CMU_DEVRST1, BIT(7) }, + [RESET_UART0] = { CMU_DEVRST1, BIT(8) }, + [RESET_UART1] = { CMU_DEVRST1, BIT(9) }, + [RESET_UART2] = { CMU_DEVRST1, BIT(10) }, + [RESET_UART3] = { CMU_DEVRST1, BIT(11) }, + [RESET_UART4] = { CMU_DEVRST1, BIT(12) }, + [RESET_UART5] = { CMU_DEVRST1, BIT(13) }, + [RESET_UART6] = { CMU_DEVRST1, BIT(14) }, + [RESET_KEY] = { CMU_DEVRST1, BIT(24) }, + [RESET_GPIO] = { CMU_DEVRST1, BIT(25) }, + [RESET_AUDIO] = { CMU_DEVRST1, BIT(29) }, +}; + static struct owl_clk_desc s700_clk_desc = { .clks = s700_clks, .num_clks = ARRAY_SIZE(s700_clks), .hw_clks = &s700_hw_clks, + + .resets = s700_resets, + .num_resets = ARRAY_SIZE(s700_resets), }; static int s700_clk_probe(struct platform_device *pdev) { struct owl_clk_desc *desc; + struct owl_reset *reset; + int ret; desc = &s700_clk_desc; owl_clk_regmap_init(pdev, desc); + /* + * FIXME: Reset controller registration should be moved to + * common code, once all SoCs of Owl family supports it. + */ + reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL); + if (!reset) + return -ENOMEM; + + reset->rcdev.of_node = pdev->dev.of_node; + reset->rcdev.ops = &owl_reset_ops; + reset->rcdev.nr_resets = desc->num_resets; + reset->reset_map = desc->resets; + reset->regmap = desc->regmap; + + ret = devm_reset_controller_register(&pdev->dev, &reset->rcdev); + if (ret) + dev_err(&pdev->dev, "Failed to register reset controller\n"); + return owl_clk_probe(&pdev->dev, desc->hw_clks); }