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[2607:f8b0:400e:c00::22c]) by mx.google.com with ESMTPS id b6si1880034pgk.409.2017.05.12.14.18.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 14:18:24 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c00::22c as permitted sender) client-ip=2607:f8b0:400e:c00::22c; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c00::22c as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pf0-x22c.google.com with SMTP id n23so30714779pfb.2 for ; Fri, 12 May 2017 14:18:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d8T9ct5JKv9js/MHFJmqW9EOTWPTcK5+4yp8FAlTGQw=; b=Ib/ojMj5UDyzMF/jMkwQtLX7my7h2/HqnMegpZTP/P9EQAetB1hOXK14Vk9Q+vEHpQ n89kQ43vBsYtbpDgBzgLnwSWT6iEuTEFSLhUssVh/RwZWYrulr+WDJsEEf/rDQm6kEbk F9yxbTgMSwtM2viSzimWEgQ/J9LlhtlT5GR58= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d8T9ct5JKv9js/MHFJmqW9EOTWPTcK5+4yp8FAlTGQw=; b=HvJfFa0dRANOTPSxIxqLYxGaPDIXyqwEm1DO3wkgGPH9jPdsnMq/MHCoK82E6GBNYG cNCh548zf2egxqCZMj39is6D1LSC/YZ57eIurRRNlmVDi8HutL1DXHEAiHh9ReinHaGa EZoA2/BGgxItvi7s8pX4eAz4+H76QRJBVkNelXGii/04wzrdNv/L7FCqa74TwdFIfz/6 vdKtgIEN2AyumiZ8JcHsUp+81tvq9Ni/z1JwdWdDsOHh/oHLqPDUmFVWKtOAzKGLP+xx IPGtohr65sY/wo6BC4TLpPXEq/oZPMEGnYsNv/sU6LEs/4BOYmJl0nHclElIcg0dwKeN ZVuQ== X-Gm-Message-State: AODbwcAQeHJ4N3aDnIVEL8XbJYkcevxKaLZAbMKv3GwCClKUvhNenyBV kNiLM0rBBBxl+dv5MeU= X-Received: by 10.98.35.142 with SMTP id q14mr6626149pfj.220.1494623904036; Fri, 12 May 2017 14:18:24 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id s68sm8536477pfj.5.2017.05.12.14.18.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 12 May 2017 14:18:22 -0700 (PDT) From: John Stultz To: lkml Cc: Stephen Boyd , Bjorn Andersson , Srinivas Kandagatla , Nicolas Dechesne , Andy Gross , Rob Clark , Vinay Simha , David Brown , Rob Herring , John Stultz Subject: [PATCH 1/2] ARM: dts: qcom-apq8064: Collapse usb support into one node Date: Fri, 12 May 2017 14:18:17 -0700 Message-Id: <1494623898-27230-2-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494623898-27230-1-git-send-email-john.stultz@linaro.org> References: <1494623898-27230-1-git-send-email-john.stultz@linaro.org> From: Stephen Boyd We currently have three device nodes for the same USB hardware block, as evident by the reuse of the same reg address multiple times. Now that the chipidea driver fully supports OTG with the MSM wrapper we can collapse the three nodes into one USB device node, reflecting the true nature of the hardware. Since we're here, we also mark the irq trigger flags correctly, as IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_NONE. Cc: Bjorn Andersson Cc: Srinivas Kandagatla Cc: Nicolas Dechesne Cc: Stephen Boyd Cc: Andy Gross Cc: Rob Clark Cc: Vinay Simha Cc: David Brown Cc: Rob Herring Signed-off-by: Stephen Boyd Signed-off-by: John Stultz --- .../arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts | 49 +++---- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 21 +-- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 54 ++++---- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 54 ++++---- .../arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts | 16 +-- arch/arm/boot/dts/qcom-apq8064.dtsi | 154 ++++++++++++--------- 6 files changed, 169 insertions(+), 179 deletions(-) -- 2.7.4 Acked-by: Bjorn Andersson diff --git a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts index 8f5de02..c5f561f 100644 --- a/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts +++ b/arch/arm/boot/dts/qcom-apq8064-arrow-sd-600eval.dts @@ -319,44 +319,37 @@ target-supply = <&pm8921_lvs7>; }; - /* OTG */ - phy@12500000 { - status = "okay"; - dr_mode = "peripheral"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget@12500000 { - status = "okay"; - }; - - /* OTG */ usb@12500000 { status = "okay"; + dr_mode = "peripheral"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; usb@12520000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; usb@12530000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; amba { diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index e39440a..e5fef32 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -320,22 +320,15 @@ }; }; - /* OTG */ - phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - dr_mode = "otg"; - }; - - gadget@12500000 { - status = "okay"; - }; - - /* OTG */ usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; amba { diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 35f1d46..d736203 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -149,43 +149,37 @@ }; }; - /* OTG */ - usb1_phy: phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - usb3_phy: phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - usb4_phy: phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget1: gadget@12500000 { - status = "ok"; - }; - - /* OTG */ - usb1: usb@12500000 { + usb@12500000 { status = "ok"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; - usb3: usb@12520000 { + usb@12520000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; - usb4: usb@12530000 { + usb@12530000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; /* on board fixed 3.3v supply */ diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 881ce70..bbd1dac 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -243,43 +243,37 @@ target-supply = <&pm8921_s4>; }; - /* OTG */ - usb1_phy: phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - usb3_phy: phy@12520000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - usb4_phy: phy@12530000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l23>; - }; - - gadget1: gadget@12500000 { - status = "okay"; - }; - - /* OTG */ - usb1: usb@12500000 { + usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; - usb3: usb@12520000 { + usb@12520000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; - usb4: usb@12530000 { + usb@12530000 { status = "okay"; + dr_mode = "host"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l23>; + }; + }; }; pci@1b500000 { diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts index a34ba35..88a9aff4 100644 --- a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts @@ -349,15 +349,15 @@ }; }; - phy@12500000 { - status = "okay"; - vddcx-supply = <&pm8921_s3>; - v3p3-supply = <&pm8921_l3>; - v1p8-supply = <&pm8921_l4>; - }; - - gadget@12500000 { + usb@12500000 { status = "okay"; + dr_mode = "otg"; + ulpi { + phy { + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + }; }; gsbi@1a200000 { diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 14a6f5e..f3db185 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -197,7 +197,7 @@ clock-frequency = <27000000>; }; - sleep_clk { + sleep_clk: sleep_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; @@ -884,81 +884,97 @@ }; }; - usb1_phy: phy@12500000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12500000 0x400>; - interrupts = ; - status = "disabled"; - - clocks = <&gcc USB_HS1_XCVR_CLK>, - <&gcc USB_HS1_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS1_RESET>; - reset-names = "link"; - }; - - usb3_phy: phy@12520000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12520000 0x400>; - interrupts = ; - status = "disabled"; - dr_mode = "host"; - - clocks = <&gcc USB_HS3_XCVR_CLK>, - <&gcc USB_HS3_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS3_RESET>; - reset-names = "link"; - }; - - usb4_phy: phy@12530000 { - compatible = "qcom,usb-otg-ci"; - reg = <0x12530000 0x400>; - interrupts = ; - status = "disabled"; - dr_mode = "host"; - - clocks = <&gcc USB_HS4_XCVR_CLK>, - <&gcc USB_HS4_H_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc USB_HS4_RESET>; - reset-names = "link"; - }; - - gadget1: gadget@12500000 { - compatible = "qcom,ci-hdrc"; - reg = <0x12500000 0x400>; - status = "disabled"; - dr_mode = "peripheral"; - interrupts = ; - usb-phy = <&usb1_phy>; - }; - usb1: usb@12500000 { - compatible = "qcom,ehci-host"; - reg = <0x12500000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb1_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12500000 0x200>, + <0x12500200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS1_XCVR_CLK>, <&gcc USB_HS1_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS1_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS1_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs1_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs1_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb1 0>; + reset-names = "por"; + }; + }; }; usb3: usb@12520000 { - compatible = "qcom,ehci-host"; - reg = <0x12520000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb3_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12520000 0x200>, + <0x12520200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS3_XCVR_CLK>, <&gcc USB_HS3_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS3_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS3_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs3_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs3_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb3 0>; + reset-names = "por"; + }; + }; }; usb4: usb@12530000 { - compatible = "qcom,ehci-host"; - reg = <0x12530000 0x400>; - interrupts = ; - status = "disabled"; - usb-phy = <&usb4_phy>; + compatible = "qcom,ci-hdrc"; + reg = <0x12530000 0x200>, + <0x12530200 0x200>; + interrupts = ; + clocks = <&gcc USB_HS4_XCVR_CLK>, <&gcc USB_HS4_H_CLK>; + clock-names = "core", "iface"; + assigned-clocks = <&gcc USB_HS4_XCVR_CLK>; + assigned-clock-rates = <60000000>; + resets = <&gcc USB_HS4_RESET>; + reset-names = "core"; + phy_type = "ulpi"; + ahb-burst-config = <0>; + phys = <&usb_hs4_phy>; + phy-names = "usb-phy"; + status = "disabled"; + #reset-cells = <1>; + + ulpi { + usb_hs4_phy: phy { + compatible = "qcom,usb-hs-phy-apq8064", + "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&sleep_clk>, <&cxo_board>; + clock-names = "sleep", "ref"; + resets = <&usb4 0>; + reset-names = "por"; + }; + }; }; sata_phy0: phy@1b400000 { From patchwork Fri May 12 21:18:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 99731 Delivered-To: patches@linaro.org Received: by 10.140.96.100 with SMTP id j91csp512667qge; Fri, 12 May 2017 14:18:26 -0700 (PDT) X-Received: by 10.98.163.152 with SMTP id q24mr6582515pfl.217.1494623906274; Fri, 12 May 2017 14:18:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494623906; cv=none; d=google.com; s=arc-20160816; b=BONNqygbSZFTYZ5WNXk12H0Yc/hezN+Y/JJ+NAeMH+St7BF7sX3dfhVuYhXR6MjW0M +Y/3pcfh8wDal9OxGFWOszS7gIMZWNFhHJPTsorjyp/gCXngnteNkDS7rZQkWJ7oGp0y kijxD7xS64GvwVuJvCT8+Qg6rSC9gWCtRBGF4jx8ewdwN85XidJ+/0UKw2d6uDzKzG44 SX+0lfGhDDEeoPQP8aDSQVDLScJYz6upCAlzUrDAETrk8uTlBJbDkaEPWTQWG1J6QHYt axIXqN3M7ZLLK6qUinYdHSl/8l0XrTy89FlY8RS627geVx47sI/iHXVTs8ztk5cjCRYC qjAA== ARC-Message-Signature: i=1; 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[2607:f8b0:400e:c05::230]) by mx.google.com with ESMTPS id q68si4289519pfq.47.2017.05.12.14.18.26 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 14:18:26 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::230 as permitted sender) client-ip=2607:f8b0:400e:c05::230; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: domain of john.stultz@linaro.org designates 2607:f8b0:400e:c05::230 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by mail-pg0-x230.google.com with SMTP id u28so35473818pgn.1 for ; Fri, 12 May 2017 14:18:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vPdh2ecpNH7nhIiA6JQ8XOaG3+EyUE4a6ObDg8/Uaj0=; b=MWJvpTCCA0/4+mG4lHzym/kGKHHIvoJd2YfnzCHznMC6i2k1QYLrFhuZoBJ1H/dnE9 ZYbpnd2GGeYGTaDc+NryDVm797pmA3bORpzhpfajPWShWWHawgwV+AX77D1V+3vqA5u7 l+AqRG5luvSdHQt5vzXTaPxnikjY/d18XlIb0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vPdh2ecpNH7nhIiA6JQ8XOaG3+EyUE4a6ObDg8/Uaj0=; b=Gg5BYiQ7hU96kXMm3Wis6mPON1yrb0mwNfejgdemPmD0erZ/uqSurP44P9oXYqpxSd rDFqbWw09WIfHbBzP0X3vVRjxU0GJgZa0WPX62YgfkYCtmQXLCgBEEgwsSkk+wlcIb98 DoBBqUHSPCAhviKEJXcS7Oq2wdOhZ7Y1WY1D3SVqH3JCCml9j6+1AtknLgEMN8EbERK1 AHKg1X0imh7+iOeV0SnNAL0L3oD/f6EiU5LvETTOCxEo/ZlI/jnMg41pbK/uD+qKIOaq A3g0yKdS50KJx8FgMe3e1WPccZWlQl6efJmIakD7ETe41B3CvCmSJojY9Mt2pz4SC0Vo g0RA== X-Gm-Message-State: AODbwcC8ruDyAsg8+Opnsok+BtkVAFTt3cMkTZQm+6dPkJa5TzMz2zPd SxtWatltmiZjUDrnWcE= X-Received: by 10.99.109.73 with SMTP id i70mr6521726pgc.62.1494623905953; Fri, 12 May 2017 14:18:25 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:1002:83f0:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id s68sm8536477pfj.5.2017.05.12.14.18.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 12 May 2017 14:18:24 -0700 (PDT) From: John Stultz To: lkml Cc: John Stultz , Bjorn Andersson , Srinivas Kandagatla , Nicolas Dechesne , Stephen Boyd , Andy Gross , Rob Clark , Vinay Simha , David Brown , Rob Herring Subject: [PATCH 2/2] ARM: dts: nexus7: Add regulator tweaks and wcnss entry to support wifi Date: Fri, 12 May 2017 14:18:18 -0700 Message-Id: <1494623898-27230-3-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1494623898-27230-1-git-send-email-john.stultz@linaro.org> References: <1494623898-27230-1-git-send-email-john.stultz@linaro.org> Tweak and add some regulator entries that are needed to support wifi. The values here were taken from: arch/arm/mach-msm/asustek/flo/board-flo-regulator.c in the AOSP msm 3.4 flo branch. This also adds a wcnss entry so it gets enabled on the board. Cc: Bjorn Andersson Cc: Srinivas Kandagatla Cc: Nicolas Dechesne Cc: Stephen Boyd Cc: Andy Gross Cc: Rob Clark Cc: Vinay Simha Cc: David Brown Cc: Rob Herring Signed-off-by: John Stults --- arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts | 42 ++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts index e5fef32..3cae48f 100644 --- a/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts +++ b/arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts @@ -82,7 +82,17 @@ bias-pull-down; }; - /* msm otg HSUSB_VDDCX */ + /* wcnss_wlan.0-iris_vddrfa */ + s2 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <1600000>; + }; + + /* + * msm otg HSUSB_VDDCX + * wcnss_wlan.0-riva_vddcx + */ s3 { regulator-min-microvolt = <500000>; regulator-max-microvolt = <1150000>; @@ -95,6 +105,7 @@ * tabla2x-slim-CDC_VDDA_TX * tabla2x-slim-CDC_VDD_CP * tabla2x-slim-VDDIO_CDC + * wcnss_wlan.0-riva_vddpx */ s4 { regulator-min-microvolt = <1800000>; @@ -123,7 +134,10 @@ bias-pull-down; }; - /* msm_otg-HSUSB_1p8 */ + /* + * msm_otg-HSUSB_1p8 + * wcnss_wlan.0-iris_vddxo + */ l4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; @@ -143,6 +157,12 @@ regulator-max-microvolt = <2950000>; }; + /* wcnss_wlan.0-iris_vddpa */ + l10 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + }; + /* mipi_dsi.1-dsi1_avdd */ l11 { regulator-min-microvolt = <3000000>; @@ -165,6 +185,12 @@ bias-pull-down; }; + /* wcnss_wlan.0-riva_vddmx */ + l24 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1150000>; + }; + /* * tabla2x-slim-CDC_VDDA_A_1P2V * tabla2x-slim-VDDD_CDC_D @@ -175,10 +201,15 @@ bias-pull-down; }; + /* wcnss_wlan.0-iris_vddio */ lvs1 { bias-pull-down; }; + /* wcnss_wlan.0-iris_vdddig */ + lvs2 { + }; + lvs4 { bias-pull-down; }; @@ -196,6 +227,7 @@ */ lvs7 { bias-pull-down; + regulator-always-on; }; }; }; @@ -340,6 +372,12 @@ }; }; + riva-pil@3204000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&riva_wlan_pin_a>; + }; + imem@2a03f000 { compatible = "syscon", "simple-mfd"; reg = <0x2a03f000 0x1000>;