From patchwork Wed Jun 30 13:31:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 468691 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp354323jao; Wed, 30 Jun 2021 06:32:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzoVnFeWjcvImRUPknsaRsFspd6D7VImYySCek00y/yFnKB+QjLNTBXfuP3yxT67/tXVXTE X-Received: by 2002:a05:6e02:dd2:: with SMTP id l18mr8756393ilj.34.1625059920379; Wed, 30 Jun 2021 06:32:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625059920; cv=none; d=google.com; s=arc-20160816; b=vs8fC2k1FhkGlnDAfE8RuSV/OA+s4Zoy3GixxufLx1Wsk1wV27H3WMx4VK+fclBzMh oaq2kBniqC3iibDPyXECDnm32YhN856ypKSs/EkvYb74VcI2NZAd4/66NwpyipiCdqMB tbz/AGhlV2TedpGxMMYvYc+/EBkESJSmsjeaYLRue05T3xCgm6yAWqLtiY7cqhA1ihlw Ap5qRK/CBTkpEX3qbgPLb9WQWrYFqwLJQoyEJJxb1vH/m2B0KQ3FRcjZx+7mP9GwJ7QM OH4bb6Y5WbNXtJLb1rltj2T+6QTnsnyhnUMl5baWS6a0Pe7fC8qtgNw7v60RXj4dTyAK TvXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=nNBOq0bo15wva/D2WTCq88A/17ZeZyPRomS/LrNe0ts=; b=lB6WwtSZF296zGsf+gI2dE6Qb2maAXmHlZMjl+whJG2Of9aLwkwq3D+QPGUKDDXtn6 CgXUVmWYdgvfAaupDaGIFcqsxLf+dKSIUTDVNZFNJ+6vGGyaRrK9JxDt/n0UmfIJMzR4 Tdl+bLPHuSjOGIl97Kh3gFAPgiAMc5XV/IGEZSis8VK/EoBwmlBkjBf4/7kGaafTxuX0 fIQ8UwD4HT6Q3djyDI01jR1O+2mZA9Tv/qvt6MATz6z8nKBrBy4H8fUat0sGJctSTpDh tZyMYu9H+hsgi0uoOgDx8blBwdDQu3OCVloQOvz/a2rcdSTZY0SJmP6Fr/T8wtaA16Tg DoSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dgIY7sK4; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s9si1455631iow.41.2021.06.30.06.32.00; Wed, 30 Jun 2021 06:32:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dgIY7sK4; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234907AbhF3Ne0 (ORCPT + 17 others); Wed, 30 Jun 2021 09:34:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234913AbhF3NeX (ORCPT ); Wed, 30 Jun 2021 09:34:23 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 053D2C061787 for ; Wed, 30 Jun 2021 06:31:54 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id t17so5231424lfq.0 for ; Wed, 30 Jun 2021 06:31:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nNBOq0bo15wva/D2WTCq88A/17ZeZyPRomS/LrNe0ts=; b=dgIY7sK4bnZntJsFdKeuX3JSXJijisPf4DrByhje8LZyHq2IWlhKVP9ku1xgZUzpAf sJWmXN80L2edOpoIl0L+D9g1zNv3tkeyos/BqwQa07bx+5RrBdGrTiOa/TebxsbQNiv6 /NZPnfZS/AuQAyccnvHLFdjQIBN8dUXq1/waUmbVrAhiJjUClWN0IbU9EXh0dcvp3esK AUbTUloBr+crrte1LDaHE0hBUOciBT092e8iikvHXYMEHuWY8KlzOydsxPF2hfhs86id RLc2NT9iscm5unOzaEBluXFP0UbvZukVXIZDho2VFUVs7AmsMf1uin/zQ33PQw+K4oFp qXUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nNBOq0bo15wva/D2WTCq88A/17ZeZyPRomS/LrNe0ts=; b=NVIoYwA9sjTc15pfemrK6Q8xpEjPxNV8TGWhJMYJyqbCqUeg7TOlFj7FqJey3+eEJk x2qfO+d8xfILmIZEZAoODk2n9/kRgk+LITiXo+OG5EqCe+Sl/u8Rm5K9IZ3gS1sej3hj C3qejngZYlnYoRrUCqpfn10I4kt96QxZGh7xETk1RHw9LWIox2K8EOfUdkbpy3wIfPCD ZgjLtJe1EX+08Xdj56r5CsIffs72GZbaSZVytXgjnTq/96JG+UAl7Jlon3k8OxztP0lt yJr+JBCY+uiHnzZ8pl+rFyDB9llMcut8dc06xeAsbgE4I5fbSStDmDWigTg+OMNdKX53 yyjw== X-Gm-Message-State: AOAM531tktO6RUpdZdTOYDlwqwBvJ/ieV6PLsskVIU2leE/IJXpBMB4p u4sN5dh3UcqJCWycYxOEDeAylg== X-Received: by 2002:ac2:546b:: with SMTP id e11mr28134650lfn.282.1625059912401; Wed, 30 Jun 2021 06:31:52 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id x20sm1578098lfd.128.2021.06.30.06.31.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Jun 2021 06:31:51 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH 1/6] dt-bindings: clock: qcom, dispcc-sm8x50: add mmcx power domain Date: Wed, 30 Jun 2021 16:31:44 +0300 Message-Id: <20210630133149.3204290-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210630133149.3204290-1-dmitry.baryshkov@linaro.org> References: <20210630133149.3204290-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On sm8250 dispcc requires MMCX power domain to be powered up before clock controller's registers become available. For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by: Dmitry Baryshkov --- .../bindings/clock/qcom,dispcc-sm8x50.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.30.2 diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml index 0cdf53f41f84..48d86fb34fa7 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -55,6 +55,16 @@ properties: reg: maxItems: 1 + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + + required-opps: + description: + Performance state to use for MMCX to enable register access. + maxItems: 1 + required: - compatible - reg @@ -64,6 +74,15 @@ required: - '#reset-cells' - '#power-domain-cells' +# Either both properties are present or both are absent +dependencies: + power-domains: + required: + - required-opps + required-opps: + required: + - power-domains + additionalProperties: false examples: From patchwork Wed Jun 30 13:31:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 468692 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp354373jao; Wed, 30 Jun 2021 06:32:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxfFKHqT4h79MfQaIV7KtMGgWbTs2CqcyAf4kCY+Vfx9adQzaHivg1M2WrnRzaHl8Rmx9Sr X-Received: by 2002:a05:6e02:530:: with SMTP id h16mr2844539ils.262.1625059922856; Wed, 30 Jun 2021 06:32:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625059922; cv=none; d=google.com; s=arc-20160816; b=Xo0+2AtkYMlQfu3AAJ07afL57jxOek/Z/pRDP1OsIlropdGwHvAeH8Gc8dnWfTddcB R86brqN7yJrOeN3LccivkAxHPcqdvFdsLcoOQUs+6/k+KAOWp4DtJvxmxqYUQzDZKldo RpAsbOKGHX5YW8Ik86WjmVuV1pb5Lxal8aeaG3WhGMS+o2UMlw2QbHbfaowY6y54O7In U5mbldcZJjJyfS7gSZyU1kd9A7TKa8LNuiaGvSxNH5Y1lEyV56D46lcg4DuxIlWmSQJa RuE0DVawN0y/H5yjFrT85tgV9Z9osCPFSTcutl0Xsl70WaYoWUZz8SMLLePO630ws2tw +G2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=K1GDsnRGky4n2WSFWX6nkRzIkPArqTdunnzWeNZQG3A=; b=tVHG6Gd00wMi5qqyC2OqBXzb7hm87K8carti/H7nuaVILWpbs9efGhzfDUDFK2as4i n7Dm/eCoGzTUMCOfbYPVsZabwR0u+Y/9vIw9MKMlVsIYySQyaAmgTLHPSEyhisYp16bu rScOafauqO96OO8oDdlS3NFL6QHZEaiximeC12zIOYbxFp6AvkzzEmQKHSjz9a+ic+vv uXbWEDX+Iq+79Jdap/UvGG7GITibkmYxzFxdVm2cDHYwVIOnyo8yQr1gcWJETey0VgZE PfEnHl/SSs+bLtpaAaGuHQxlCqNfQDbEqrEpdYs5xSJPPdmMstdLSYa0ykO53i21TCay GiCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bQGflZQk; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by: Dmitry Baryshkov --- .../bindings/clock/qcom,videocc.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.30.2 diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 567202942b88..22421173e1ca 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -47,6 +47,16 @@ properties: reg: maxItems: 1 + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + maxItems: 1 + + required-opps: + description: + Performance state to use for MMCX to enable register access. + maxItems: 1 + required: - compatible - reg @@ -56,6 +66,15 @@ required: - '#reset-cells' - '#power-domain-cells' +# Either both properties are present or both are absent +dependencies: + power-domains: + required: + - required-opps + required-opps: + required: + - power-domains + additionalProperties: false examples: From patchwork Wed Jun 30 13:31:47 2021 Content-Type: text/plain; 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Wed, 30 Jun 2021 06:31:55 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH 4/6] arm64: dts: qcom: sm8250: remove mmcx regulator Date: Wed, 30 Jun 2021 16:31:47 +0300 Message-Id: <20210630133149.3204290-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210630133149.3204290-1-dmitry.baryshkov@linaro.org> References: <20210630133149.3204290-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Switch dispcc and videocc into using MMCX domain directly. Drop the now unused mmcx regulator. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4c0de12aaba6..1c8478d1247d 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -271,13 +271,6 @@ memory@80000000 { reg = <0x0 0x80000000 0x0 0x0>; }; - mmcx_reg: mmcx-reg { - compatible = "regulator-fixed-domain"; - power-domains = <&rpmhpd SM8250_MMCX>; - required-opps = <&rpmhpd_opp_low_svs>; - regulator-name = "MMCX"; - }; - pmu { compatible = "arm,armv8-pmuv3"; interrupts = ; @@ -2362,7 +2355,8 @@ videocc: clock-controller@abf0000 { clocks = <&gcc GCC_VIDEO_AHB_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; clock-names = "iface", "bi_tcxo", "bi_tcxo_ao"; #clock-cells = <1>; #reset-cells = <1>; @@ -2627,7 +2621,8 @@ opp-358000000 { dispcc: clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; reg = <0 0x0af00000 0 0x10000>; - mmcx-supply = <&mmcx_reg>; + power-domains = <&rpmhpd SM8250_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&dsi0_phy 0>, <&dsi0_phy 1>, From patchwork Wed Jun 30 13:31:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 468696 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp354475jao; Wed, 30 Jun 2021 06:32:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwalYXO9QVoQcw19yR6fw76u1OKG1NrYo1BiVtcSbkGdDcAY0QOyebvOChJgWWg0ERJI9Jk X-Received: by 2002:a05:6e02:c2e:: with SMTP id q14mr26159057ilg.2.1625059928410; Wed, 30 Jun 2021 06:32:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1625059928; cv=none; d=google.com; s=arc-20160816; b=rTmyvJwAD8NJhGx2+Fzw0xieMG/sqg2nFeRMabJSinDWbJj7kwIS4wCW6Iv18InVgT iJKzxubspoNWOABPTy8nWR1yvu8JPFDjLKw0ohriE4LsOfKxIIhEvCutSTYwiplyoT87 wIwsxYetsE/Q1gjzeHaaT7pFAerLQTYvkZi8qu2TDGWFQ4/zanx5D8yt1112tCPMyDcx nVPbbUcCbwdOQahSKSTUAalXj0o2ZZpa2tmtcMzC7209WxNQwqBAhYJgUd3mxDZNtqpe HtnzBELIVzDeqDo0HzvF9bvlo0gTk++4BUGVN/3uePsBJPYufoJi3KRdecu85vFi7tJe Y1Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=f0ldkE5j34OXHAqh3I/xyyl0k1n40wAos/+0qzuAEic=; b=VE/ZjjBexU6Ss0cMOOEG3jiSsaoUqojgRKEQI/cDlaYmcWChZaoPyuWP8qCQPUphl6 OENBtGn/2LWEhVs+z5Vas/GtWwIEzImJ1/RjxnSwvqM2yy3Wo1/6rphD7A14HfG4gzIt ka++wLfdXi5KXHSN9ElliNpB4HGyFnY7jNwhpWwpBQzNpR8wrtNr+z+DI+Tj0M/mqdr3 hW30C4kpYh10De3u8HibYo8xmMitvA31M8qLlKftJBCHy6wp7ocOBR3uA6vrBDvlX1YB TEBxliCuHRfzLPadeTBbZwiluzVhdFmYJowliDkbc+DWo0nuY7ivLJlHLGlMaT8BjTvs z1rw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nN4kNd2L; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 1 - 1 file changed, 1 deletion(-) -- 2.30.2 Reviewed-by: Bjorn Andersson diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index de09cd5c209f..dfbfe64b12f6 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -955,7 +955,6 @@ static struct gdsc mdss_gdsc = { }, .pwrsts = PWRSTS_OFF_ON, .flags = HW_CTRL, - .supply = "mmcx", }; static struct clk_regmap *disp_cc_sm8250_clocks[] = {