From patchwork Tue Aug 21 08:16:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 144692 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp4977333ljj; Tue, 21 Aug 2018 01:24:24 -0700 (PDT) X-Google-Smtp-Source: AA+uWPzOgpRFYOvftjH6MQxHvvVkP43BeAcpXO/WaKauvLnCmIxRSA8ieKq8Hjae1NR9qQmgCVnH X-Received: by 2002:aed:3584:: with SMTP id c4-v6mr3412716qte.155.1534839864424; Tue, 21 Aug 2018 01:24:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534839864; cv=none; d=google.com; s=arc-20160816; b=IrnFLxZgUzH0Fvp3L4mqWsbYEnibcP7EXY2/SGr4wsGH6eMhxMPVOxnHU3TXrFA+dV Aa0sxugn3lEb1nIYblPo8CUFub9giyhy9UPqIo53Y7C5ZSCc/0qJ/Uo56IggYsS9+Vdd 5ibnta28CQw5RTjUK6PADL0CUD4AUkO+Re2fzMVEpM4yh2wnH10DCuT7jNtVT8TzHiLp rnATW8s/V3wGWpnuCFHMjaO7Z+2YarXtIycvu/aEzJ2YqGUo/Ey6A22f2Bt9gBrzPHU4 QMyvKIgAxN52pMkyrclHHMhNiwmGb8+Uam5JHsm1hXRSCKvA1VrTK+yYuWN81k6TyCAt 56Bw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=7gwf7cWPtypq5mvGILKUl4MWkjeToT4SK4h8JShI9SQ=; b=XAaFenwDoyZiLx/7uVchjPg1zzo0xbmnL/M7YBAp6KQTNNUBA9Y4mZ9eg+id+NUdm1 lKO5CPC7HHQpleKV8cuCDs4uhOcXARyYs7zeGhGcZwqUqwtmPWkKgtPUQm9ogFenMBEU sHIw/F3S/FTcdEm/rhC5cplV2pNTlt0UMIF0GDwhayNzszbyuiBkew6OlLg9JaT31qfw bej+evHcgvYXmZLrv/wiJPL2ZLXR5iioGPcyn9/0I3GOUYi+AmmcwgCdYclGtnjBGxHE 5qPU5K9aMDRIVrGUxTz8k/mQh9nWaZBGQ9r5wwyj1X8nq07sq6qNS4w7s7VpK2XOe5Si 14IA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id c3-v6si1242437qvo.55.2018.08.21.01.24.24 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 21 Aug 2018 01:24:24 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:51538 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fs1xf-00071z-SL for patch@linaro.org; Tue, 21 Aug 2018 04:24:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51213) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fs1qA-0000mW-G7 for qemu-devel@nongnu.org; Tue, 21 Aug 2018 04:16:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fs1q7-0001PB-C1 for qemu-devel@nongnu.org; Tue, 21 Aug 2018 04:16:38 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:57410 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fs1q7-0001Oe-4D for qemu-devel@nongnu.org; Tue, 21 Aug 2018 04:16:35 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8C841804BAAD; Tue, 21 Aug 2018 08:16:34 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-184.ams2.redhat.com [10.36.116.184]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6122917336; Tue, 21 Aug 2018 08:16:32 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id D280E9B2F9; Tue, 21 Aug 2018 10:16:31 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 21 Aug 2018 10:16:30 +0200 Message-Id: <20180821081631.19160-4-kraxel@redhat.com> In-Reply-To: <20180821081631.19160-1-kraxel@redhat.com> References: <20180821081631.19160-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 21 Aug 2018 08:16:34 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 21 Aug 2018 08:16:34 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PULL 3/4] hw/display/vga-isa-mm: Convert away from old_mmio X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Gerd Hoffmann Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Convert the vga-isa-mm device away from the old_mmio MemoryRegion accessors. This device is only used by the MIPS 'jazz' boards "magnum" and "pica61". Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Hervé Poussineau Tested-by: Hervé Poussineau Message-id: 20180802155147.1863-2-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann --- hw/display/vga-isa-mm.c | 60 +++++++++++-------------------------------------- 1 file changed, 13 insertions(+), 47 deletions(-) -- 2.9.3 diff --git a/hw/display/vga-isa-mm.c b/hw/display/vga-isa-mm.c index 232216cad0..215e649719 100644 --- a/hw/display/vga-isa-mm.c +++ b/hw/display/vga-isa-mm.c @@ -36,64 +36,30 @@ typedef struct ISAVGAMMState { } ISAVGAMMState; /* Memory mapped interface */ -static uint32_t vga_mm_readb (void *opaque, hwaddr addr) +static uint64_t vga_mm_read(void *opaque, hwaddr addr, unsigned size) { ISAVGAMMState *s = opaque; - return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xff; + return vga_ioport_read(&s->vga, addr >> s->it_shift) & + MAKE_64BIT_MASK(0, size * 8); } -static void vga_mm_writeb (void *opaque, - hwaddr addr, uint32_t value) +static void vga_mm_write(void *opaque, hwaddr addr, uint64_t value, + unsigned size) { ISAVGAMMState *s = opaque; - vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff); -} - -static uint32_t vga_mm_readw (void *opaque, hwaddr addr) -{ - ISAVGAMMState *s = opaque; - - return vga_ioport_read(&s->vga, addr >> s->it_shift) & 0xffff; -} - -static void vga_mm_writew (void *opaque, - hwaddr addr, uint32_t value) -{ - ISAVGAMMState *s = opaque; - - vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff); -} - -static uint32_t vga_mm_readl (void *opaque, hwaddr addr) -{ - ISAVGAMMState *s = opaque; - - return vga_ioport_read(&s->vga, addr >> s->it_shift); -} - -static void vga_mm_writel (void *opaque, - hwaddr addr, uint32_t value) -{ - ISAVGAMMState *s = opaque; - - vga_ioport_write(&s->vga, addr >> s->it_shift, value); + vga_ioport_write(&s->vga, addr >> s->it_shift, + value & MAKE_64BIT_MASK(0, size * 8)); } static const MemoryRegionOps vga_mm_ctrl_ops = { - .old_mmio = { - .read = { - vga_mm_readb, - vga_mm_readw, - vga_mm_readl, - }, - .write = { - vga_mm_writeb, - vga_mm_writew, - vga_mm_writel, - }, - }, + .read = vga_mm_read, + .write = vga_mm_write, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, }; From patchwork Tue Aug 21 08:16:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 144690 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp4974261ljj; Tue, 21 Aug 2018 01:20:38 -0700 (PDT) X-Google-Smtp-Source: AA+uWPy0ZLioQyWPDPJc/feJ38QX8rY5oVY9F+ZplP0F9bQt2VAD8oVDntQ9dcji/CpAlBNLYYah X-Received: by 2002:a37:76c6:: with SMTP id r189-v6mr42830903qkc.282.1534839637953; Tue, 21 Aug 2018 01:20:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534839637; cv=none; d=google.com; s=arc-20160816; b=Dhr5FF5FZFDGCafZcpp9Q/SHPih3srX7Hk4WAwhwqyWr8sAgd1x+/0AtWPmvORK6NL VveUT0X/YBfJw3bqdaShFCvoYC6SdYIX/wcfaeuQ8rad6AOPvru4sRSDeyfES7bh5n8y ji+FfW8/mTaJpjU7m6IhYXDVWOrkDSckjoKrLzcwxkxZd/rjXbYX9Ad2IDvkWmvAzt8f jxR5eXG8kUn1kR8+dvKcuYiocawIoOZEaITf0rKdI8pBqFMJk7xNP03BOUnyW7W8cjnd V0IhzoIjNnNcglO3kKhHQrD8Fblvj9V94Dnf9hAfcLg9WwMio9eWtJGXT++Aqn4xfhZF k9zg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=QvKVPqmpYKIZ8uSiaSf+tO55tjKrZyVhynrxQFGKxlw=; b=sLLYr+QQL99niKK9Pevm6/BqeU6MSRcjtL+9xLhqluPcEeuLO7IW1a6krdYJLlzR5t V1W60I+3dNKyiTXvJw1vcX1ED8GiZ1y5IaxE1585pKE6vcj5eQhnVYcGW2WXh9cbuLWK 7MgT0fNOZVlNv4/2uC1Pi01jsAXxS4RJS1kCXWPZYlAzI07xralJ8MIBQaWhd8Yb0q1i dQmtNo32ogF9ab2O1LM3Z07qCMuFPUF2aZQ55NeUqSUvFOn7DN6ONMd7NNCay0ykl0rA LZgiy4MhOH129/zLBE135mxNZoX/7okqKR5yvxy2DP3Fs8TOomXFs2q5g7S+9Yv/JimH JlHA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id o2-v6si681152qvq.257.2018.08.21.01.20.37 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 21 Aug 2018 01:20:37 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=redhat.com Received: from localhost ([::1]:51513 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fs1u1-0004fo-DW for patch@linaro.org; Tue, 21 Aug 2018 04:20:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51210) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fs1qA-0000mT-Fv for qemu-devel@nongnu.org; Tue, 21 Aug 2018 04:16:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fs1q8-0001Pu-3A for qemu-devel@nongnu.org; Tue, 21 Aug 2018 04:16:38 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:42198 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fs1q7-0001PT-TU for qemu-devel@nongnu.org; Tue, 21 Aug 2018 04:16:36 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 94B52879C4; Tue, 21 Aug 2018 08:16:35 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-184.ams2.redhat.com [10.36.116.184]) by smtp.corp.redhat.com (Postfix) with ESMTP id 693402166BA1; Tue, 21 Aug 2018 08:16:32 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id DB3F931F2A; Tue, 21 Aug 2018 10:16:31 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Tue, 21 Aug 2018 10:16:31 +0200 Message-Id: <20180821081631.19160-5-kraxel@redhat.com> In-Reply-To: <20180821081631.19160-1-kraxel@redhat.com> References: <20180821081631.19160-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Tue, 21 Aug 2018 08:16:35 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Tue, 21 Aug 2018 08:16:35 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'kraxel@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PULL 4/4] hw/pci-host/bonito: Move away from old_mmio accessors X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Gerd Hoffmann Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell Move away from the old_mmio MemoryRegion accessors in the bonito pci controller. This device is used only in the MIPS "fulong2e" machine. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20180802155147.1863-3-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann --- hw/pci-host/bonito.c | 145 ++++++--------------------------------------------- 1 file changed, 15 insertions(+), 130 deletions(-) -- 2.9.3 diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 2d25e9bf7c..9868e2eccc 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -460,8 +460,8 @@ static uint32_t bonito_sbridge_pciaddr(void *opaque, hwaddr addr) return pciaddr; } -static void bonito_spciconf_writeb(void *opaque, hwaddr addr, - uint32_t val) +static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { PCIBonitoState *s = opaque; PCIDevice *d = PCI_DEVICE(s); @@ -469,62 +469,8 @@ static void bonito_spciconf_writeb(void *opaque, hwaddr addr, uint32_t pciaddr; uint16_t status; - DPRINTF("bonito_spciconf_writeb "TARGET_FMT_plx" val %x\n", addr, val); - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val & 0xff, 1); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); -} - -static void bonito_spciconf_writew(void *opaque, hwaddr addr, - uint32_t val) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_writew "TARGET_FMT_plx" val %x\n", addr, val); - assert((addr & 0x1) == 0); - - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val, 2); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); -} - -static void bonito_spciconf_writel(void *opaque, hwaddr addr, - uint32_t val) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_writel "TARGET_FMT_plx" val %x\n", addr, val); - assert((addr & 0x3) == 0); + DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n", + addr, size, val); pciaddr = bonito_sbridge_pciaddr(s, addr); @@ -534,7 +480,7 @@ static void bonito_spciconf_writel(void *opaque, hwaddr addr, /* set the pci address in s->config_reg */ phb->config_reg = (pciaddr) | (1u << 31); - pci_data_write(phb->bus, phb->config_reg, val, 4); + pci_data_write(phb->bus, phb->config_reg, val, size); /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ status = pci_get_word(d->config + PCI_STATUS); @@ -542,61 +488,7 @@ static void bonito_spciconf_writel(void *opaque, hwaddr addr, pci_set_word(d->config + PCI_STATUS, status); } -static uint32_t bonito_spciconf_readb(void *opaque, hwaddr addr) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readb "TARGET_FMT_plx"\n", addr); - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return 0xff; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); - - return pci_data_read(phb->bus, phb->config_reg, 1); -} - -static uint32_t bonito_spciconf_readw(void *opaque, hwaddr addr) -{ - PCIBonitoState *s = opaque; - PCIDevice *d = PCI_DEVICE(s); - PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); - uint32_t pciaddr; - uint16_t status; - - DPRINTF("bonito_spciconf_readw "TARGET_FMT_plx"\n", addr); - assert((addr & 0x1) == 0); - - pciaddr = bonito_sbridge_pciaddr(s, addr); - - if (pciaddr == 0xffffffff) { - return 0xffff; - } - - /* set the pci address in s->config_reg */ - phb->config_reg = (pciaddr) | (1u << 31); - - /* clear PCI_STATUS_REC_MASTER_ABORT and PCI_STATUS_REC_TARGET_ABORT */ - status = pci_get_word(d->config + PCI_STATUS); - status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); - pci_set_word(d->config + PCI_STATUS, status); - - return pci_data_read(phb->bus, phb->config_reg, 2); -} - -static uint32_t bonito_spciconf_readl(void *opaque, hwaddr addr) +static uint64_t bonito_spciconf_read(void *opaque, hwaddr addr, unsigned size) { PCIBonitoState *s = opaque; PCIDevice *d = PCI_DEVICE(s); @@ -604,13 +496,12 @@ static uint32_t bonito_spciconf_readl(void *opaque, hwaddr addr) uint32_t pciaddr; uint16_t status; - DPRINTF("bonito_spciconf_readl "TARGET_FMT_plx"\n", addr); - assert((addr & 0x3) == 0); + DPRINTF("bonito_spciconf_read "TARGET_FMT_plx" size %d\n", addr, size); pciaddr = bonito_sbridge_pciaddr(s, addr); if (pciaddr == 0xffffffff) { - return 0xffffffff; + return MAKE_64BIT_MASK(0, size * 8); } /* set the pci address in s->config_reg */ @@ -621,23 +512,17 @@ static uint32_t bonito_spciconf_readl(void *opaque, hwaddr addr) status &= ~(PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_REC_TARGET_ABORT); pci_set_word(d->config + PCI_STATUS, status); - return pci_data_read(phb->bus, phb->config_reg, 4); + return pci_data_read(phb->bus, phb->config_reg, size); } /* south bridge PCI configure space. 0x1fe8 0000 - 0x1fef ffff */ static const MemoryRegionOps bonito_spciconf_ops = { - .old_mmio = { - .read = { - bonito_spciconf_readb, - bonito_spciconf_readw, - bonito_spciconf_readl, - }, - .write = { - bonito_spciconf_writeb, - bonito_spciconf_writew, - bonito_spciconf_writel, - }, - }, + .read = bonito_spciconf_read, + .write = bonito_spciconf_write, + .valid.min_access_size = 1, + .valid.max_access_size = 4, + .impl.min_access_size = 1, + .impl.max_access_size = 4, .endianness = DEVICE_NATIVE_ENDIAN, };