From patchwork Sun Jul 4 15:04:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?P=C3=A9ter_Ujfalusi?= X-Patchwork-Id: 470104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C0C8C07E96 for ; Sun, 4 Jul 2021 15:02:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5F95B613E1 for ; Sun, 4 Jul 2021 15:02:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229649AbhGDPFN (ORCPT ); Sun, 4 Jul 2021 11:05:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229614AbhGDPFM (ORCPT ); Sun, 4 Jul 2021 11:05:12 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09E5CC061574 for ; Sun, 4 Jul 2021 08:02:37 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id c28so4255732lfp.11 for ; Sun, 04 Jul 2021 08:02:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NnisACRRPmsvg83/UOa1MhDLWzwBA7pdjqkJYMqvE5Q=; b=Hrzs6Xhf7ldRq0s4i8V5RahEAF7TA66k77KeoTClrYiQVbpYBVfb4s77wQtqnH1eEE JwYhPLcoltbJGXw60VDNq1MVZDfYVfHhPRXQLo7mPkZQSvkRk8uoFV7J0bI8ULEp6uKq fY9Vz+u0P2nbYIomITCN2TlrvTeHHx1yEUJehxHVoZoRgzHLG74fQird5JWllFXaeeXX z+T8dwGOx9vGofvUvhU7xdw4SNTTfKH26V2h0fantesSEEXuGfvOuKzaUSzeGjglj+ag lhrdfRjISQk94mKuScPz0mgXhFmWcU42tf/CSy7ei0jDZgnDiqxl/0PStYr1hMj3QOf7 ZyJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NnisACRRPmsvg83/UOa1MhDLWzwBA7pdjqkJYMqvE5Q=; b=TWaxQbbIVGvu+k8jNyDTXGc7DRze/7CXD04qlnlDjNjB9wfg49sVKgtgLsEDWTqP5v 3x5tGvLUUJDIPQFHrlTE67+ymWIQOF+r+cZQDlqT3PtqE34naq3FaeTSIiRGUVDEPGbU d6/6Po7uEkVflbXRZk/fJ/Ea4oRQTvUD3+hU4RE6xq3UdJbDaYKFyG/Uh+eXaA2j+AaZ RzASVDXedssdpLHw9zKzKvEor6hCVhXgMCUD+q1Vkq/fiFutKVfhoCplTvwrRvVczVzu OK7LAWXQrJ4X2nOfgGPcMOHzLxM86UYeGCEk/5I1sTrt7VlHuz8ik1JJH3uIA2qOYj5E CyBg== X-Gm-Message-State: AOAM532AGgQgM0PvAAO1MpMnmonDs9vFBTks8a4bEBRsnwjAOjs7uKzR b8zRs+c3zGnDYpYRoqwEJmI= X-Google-Smtp-Source: ABdhPJxsh18H0rDfuqTu5OQBRNsMtCDcqXWOpRaP/jhc86A2g3WpCe+t5VgpqooemiXLuXfn6zdP1Q== X-Received: by 2002:a05:6512:2629:: with SMTP id bt41mr6952875lfb.95.1625410955217; Sun, 04 Jul 2021 08:02:35 -0700 (PDT) Received: from localhost.localdomain (91-155-111-71.elisa-laajakaista.fi. [91.155.111.71]) by smtp.gmail.com with ESMTPSA id k11sm268826lfc.272.2021.07.04.08.02.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Jul 2021 08:02:34 -0700 (PDT) From: Peter Ujfalusi To: broonie@kernel.org, tony@atomide.com Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, linux-omap@vger.kernel.org, hns@goldelico.com Subject: [PATCH 1/5] ASoC: ti: davinci-mcasp: Fix DIT mode support Date: Sun, 4 Jul 2021 18:04:46 +0300 Message-Id: <20210704150450.20106-2-peter.ujfalusi@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210704150450.20106-1-peter.ujfalusi@gmail.com> References: <20210704150450.20106-1-peter.ujfalusi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The DIT mode support has not been tested due to lack of platform where it can be tested. To be able to use the McASP on OMAP4/5 (only supporting DIT mode) we need to have DIT mode working in the McASP driver on a know platform. After hacking around (on BBW, mcasp1.axr1 can be routed out for this) it appeared that DIT mode is broken. This patch fixes it up and 16/24 bit audio works along with passthrough, but I have only tested with DTS example and test files. Signed-off-by: Peter Ujfalusi --- sound/soc/ti/davinci-mcasp.c | 142 ++++++++++++++++++++++++++++++----- 1 file changed, 122 insertions(+), 20 deletions(-) diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c index 017a5a5e56cd..e56a22c28467 100644 --- a/sound/soc/ti/davinci-mcasp.c +++ b/sound/soc/ti/davinci-mcasp.c @@ -83,6 +83,8 @@ struct davinci_mcasp { struct snd_pcm_substream *substreams[2]; unsigned int dai_fmt; + u32 iec958_status; + /* Audio can not be enabled due to missing parameter(s) */ bool missing_audio_param; @@ -757,6 +759,9 @@ static int davinci_mcasp_set_tdm_slot(struct snd_soc_dai *dai, { struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); + if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) + return 0; + dev_dbg(mcasp->dev, "%s() tx_mask 0x%08x rx_mask 0x%08x slots %d width %d\n", __func__, tx_mask, rx_mask, slots, slot_width); @@ -827,6 +832,20 @@ static int davinci_config_channel_size(struct davinci_mcasp *mcasp, mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, RXROT(rx_rotate), RXROT(7)); mcasp_set_reg(mcasp, DAVINCI_MCASP_RXMASK_REG, mask); + } else { + /* + * according to the TRM it should be TXROT=0, this one works: + * 16 bit to 23-8 (TXROT=6, rotate 24 bits) + * 24 bit to 23-0 (TXROT=0, rotate 0 bits) + * + * TXROT = 0 only works with 24bit samples + */ + tx_rotate = (sample_width / 4 + 2) & 0x7; + + mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(tx_rotate), + TXROT(7)); + mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSSZ(15), + TXSSZ(0x0F)); } mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, mask); @@ -841,7 +860,7 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, int i; u8 tx_ser = 0; u8 rx_ser = 0; - u8 slots = mcasp->tdm_slots; + u8 slots = mcasp->op_mode == DAVINCI_MCASP_DIT_MODE ? 384 : mcasp->tdm_slots; u8 max_active_serializers = (channels + slots - 1) / slots; u8 max_rx_serializers, max_tx_serializers; int active_serializers, numevt; @@ -1031,16 +1050,18 @@ static int mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp, unsigned int rate) { - u32 cs_value = 0; - u8 *cs_bytes = (u8*) &cs_value; + u8 *cs_bytes = (u8 *)&mcasp->iec958_status; - /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 - and LSB first */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXROT(6) | TXSSZ(15)); + if (!mcasp->dat_port) + mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSEL); + else + mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSEL); /* Set TX frame synch : DIT Mode, 1 bit width, internal, rising edge */ mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE | FSXMOD(0x180)); + mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, 0xFFFF); + /* Set the TX tdm : for all the slots */ mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); @@ -1049,16 +1070,8 @@ static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp, mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); - /* Only 44100 and 48000 are valid, both have the same setting */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXDIV(3)); - - /* Enable the DIT */ - mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN); - /* Set S/PDIF channel status bits */ - cs_bytes[0] = IEC958_AES0_CON_NOT_COPYRIGHT; - cs_bytes[1] = IEC958_AES1_CON_PCM_CODER; - + cs_bytes[3] &= ~IEC958_AES3_CON_FS; switch (rate) { case 22050: cs_bytes[3] |= IEC958_AES3_CON_FS_22050; @@ -1088,12 +1101,15 @@ static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp, cs_bytes[3] |= IEC958_AES3_CON_FS_192000; break; default: - printk(KERN_WARNING "unsupported sampling rate: %d\n", rate); + dev_err(mcasp->dev, "unsupported sampling rate: %d\n", rate); return -EINVAL; } - mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRA_REG, cs_value); - mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRB_REG, cs_value); + mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRA_REG, mcasp->iec958_status); + mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRB_REG, mcasp->iec958_status); + + /* Enable the DIT */ + mcasp_set_bits(mcasp, DAVINCI_MCASP_TXDITCTL_REG, DITEN); return 0; } @@ -1237,12 +1253,18 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, int slots = mcasp->tdm_slots; int rate = params_rate(params); int sbits = params_width(params); + unsigned int bclk_target; if (mcasp->slot_width) sbits = mcasp->slot_width; + if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) + bclk_target = rate * sbits * slots; + else + bclk_target = rate * 128; + davinci_mcasp_calc_clk_div(mcasp, mcasp->sysclk_freq, - rate * sbits * slots, true); + bclk_target, true); } ret = mcasp_common_hw_param(mcasp, substream->stream, @@ -1598,6 +1620,77 @@ static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = { .set_tdm_slot = davinci_mcasp_set_tdm_slot, }; +static int davinci_mcasp_iec958_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; + uinfo->count = 1; + + return 0; +} + +static int davinci_mcasp_iec958_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uctl) +{ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); + + memcpy(uctl->value.iec958.status, &mcasp->iec958_status, + sizeof(mcasp->iec958_status)); + + return 0; +} + +static int davinci_mcasp_iec958_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *uctl) +{ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); + + memcpy(&mcasp->iec958_status, uctl->value.iec958.status, + sizeof(mcasp->iec958_status)); + + return 0; +} + +static int davinci_mcasp_iec958_con_mask_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol); + struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); + + memset(ucontrol->value.iec958.status, 0xff, sizeof(mcasp->iec958_status)); + return 0; +} + +static const struct snd_kcontrol_new davinci_mcasp_iec958_ctls[] = { + { + .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_VOLATILE), + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), + .info = davinci_mcasp_iec958_info, + .get = davinci_mcasp_iec958_get, + .put = davinci_mcasp_iec958_put, + }, { + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), + .info = davinci_mcasp_iec958_info, + .get = davinci_mcasp_iec958_con_mask_get, + }, +}; + +static void davinci_mcasp_init_iec958_status(struct davinci_mcasp *mcasp) +{ + unsigned char *cs = (u8 *)&mcasp->iec958_status; + + cs[0] = IEC958_AES0_CON_NOT_COPYRIGHT | IEC958_AES0_CON_EMPHASIS_NONE; + cs[1] = IEC958_AES1_CON_PCM_CODER; + cs[2] = IEC958_AES2_CON_SOURCE_UNSPEC | IEC958_AES2_CON_CHANNEL_UNSPEC; + cs[3] = IEC958_AES3_CON_CLOCK_1000PPM; +} + static int davinci_mcasp_dai_probe(struct snd_soc_dai *dai) { struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); @@ -1605,6 +1698,12 @@ static int davinci_mcasp_dai_probe(struct snd_soc_dai *dai) dai->playback_dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; dai->capture_dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE]; + if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) { + davinci_mcasp_init_iec958_status(mcasp); + snd_soc_add_dai_controls(dai, davinci_mcasp_iec958_ctls, + ARRAY_SIZE(davinci_mcasp_iec958_ctls)); + } + return 0; } @@ -1651,7 +1750,8 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = { .channels_min = 1, .channels_max = 384, .rates = DAVINCI_MCASP_RATES, - .formats = DAVINCI_MCASP_PCM_FMTS, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE, }, .ops = &davinci_mcasp_dai_ops, }, @@ -1871,6 +1971,8 @@ static int davinci_mcasp_get_config(struct davinci_mcasp *mcasp, } else { mcasp->tdm_slots = pdata->tdm_slots; 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[91.155.111.71]) by smtp.gmail.com with ESMTPSA id k11sm268826lfc.272.2021.07.04.08.02.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Jul 2021 08:02:35 -0700 (PDT) From: Peter Ujfalusi To: broonie@kernel.org, tony@atomide.com Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, linux-omap@vger.kernel.org, hns@goldelico.com Subject: [PATCH 2/5] ASoC: dt-bindings: davinci-mcasp: Add compatible string for OMAP4 Date: Sun, 4 Jul 2021 18:04:47 +0300 Message-Id: <20210704150450.20106-3-peter.ujfalusi@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210704150450.20106-1-peter.ujfalusi@gmail.com> References: <20210704150450.20106-1-peter.ujfalusi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org OMAP4 has one McASP instance with single serializer and supporting only DIT mode. According to the TRM the DAT port needs to be accessed as specific offset compared to other devices where access to any part of the DAT region is valid. To handle this constraint we need to introduce a new compatiple string for OMAP4. Signed-off-by: Peter Ujfalusi --- Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt index c483dcec01f8..bd863bd69501 100644 --- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt +++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt @@ -6,6 +6,7 @@ Required properties: "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx) "ti,dra7-mcasp-audio" : for DRA7xx platforms + "ti,omap4-mcasp-audio" : for OMAP4 - reg : Should contain reg specifiers for the entries in the reg-names property. - reg-names : Should contain: From patchwork Sun Jul 4 15:04:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?P=C3=A9ter_Ujfalusi?= X-Patchwork-Id: 470103 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 136F1C07E95 for ; Sun, 4 Jul 2021 15:02:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EBA52613E1 for ; Sun, 4 Jul 2021 15:02:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229689AbhGDPFQ (ORCPT ); Sun, 4 Jul 2021 11:05:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229573AbhGDPFP (ORCPT ); Sun, 4 Jul 2021 11:05:15 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57A81C061574 for ; Sun, 4 Jul 2021 08:02:40 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id bq39so15068360lfb.12 for ; Sun, 04 Jul 2021 08:02:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aMFV9aMPXhkidl0Shg2y0S/3JmD1x6u1AFTNBB2LV50=; b=XRsE2GuqHLNjYcPKFh4G+usOFtZXGs6OxXyN8MvG2q/55q7d7ccdXJbSclCVuT8Wpl ylNX+W0PcV0u3lC17mGlGMf9F/q4zxEyfjGJVUziyIo9vtSzCfCvCYcGPSrpj6+OsUNO ESsJTQWBlqF/N2fz3dqfJNe4XnEPW9EikWhAwWxCd6PVJ89GoFe1gZL3pfyVz+2ZTgli URC+mS85voT0c/qfxlXCTBUCy+Q97Ar6P93NWZ8YWzkF13IQ0DEs+G4xGG6BtTwmzEed bETJFzUTRzsl9aJ17oH/keK42+Kyc9BSK9ib2LLT2eEfLMPzHWCKwZqqBblYFCes1KhK WIzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=aMFV9aMPXhkidl0Shg2y0S/3JmD1x6u1AFTNBB2LV50=; b=TdudUC3NyOWkrV0WWAImvH+5bYaIafzJSBIbfqDLf9/WUo4wMFEHljU4YTwxWF/Ea3 zpyUN3jk23FmUE1TIm4W3sz3VAkZMbzIHyHF94u89/I5Ts9on2pn0MQGCOSL9MGWSm75 A1rzB4A6VZNMBCieWiIqLkZ/emGm1eIphjFpLrjyRAHOwsfd6RaCg0hMWFP7WIJd5OUB ucfP14/o0AHeQNCy5ERiUNU8XynevhS/GCvo9iFlDmJyXlDwFtDumePvvR77B38HtEjG i8K1gQt1++Iva8+7UukLKmz3UmDOkkJSI14BdBU/cF0eAEymCOW0PbQ5+52fee4J0/SM uh+w== X-Gm-Message-State: AOAM530rJ6fHD4ouQ8cDSp1xr8R2I6J54sm1MZnmUDAD2GIXlzLcNJg9 FUcpKjeFmVcphsjrfhj76WE= X-Google-Smtp-Source: ABdhPJwO99spGf6BMeG90kmpkwBFy8BTyxCt0IOaDm2fPRF7mSJiXycpHL33FtQvNKitomPB4uPVZA== X-Received: by 2002:ac2:5f62:: with SMTP id c2mr6238988lfc.156.1625410958698; Sun, 04 Jul 2021 08:02:38 -0700 (PDT) Received: from localhost.localdomain (91-155-111-71.elisa-laajakaista.fi. [91.155.111.71]) by smtp.gmail.com with ESMTPSA id k11sm268826lfc.272.2021.07.04.08.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Jul 2021 08:02:37 -0700 (PDT) From: Peter Ujfalusi To: broonie@kernel.org, tony@atomide.com Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, linux-omap@vger.kernel.org, hns@goldelico.com Subject: [PATCH 3/5] ASoC: ti: davinci-mcasp: Add support for the OMAP4 version of McASP Date: Sun, 4 Jul 2021 18:04:48 +0300 Message-Id: <20210704150450.20106-4-peter.ujfalusi@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210704150450.20106-1-peter.ujfalusi@gmail.com> References: <20210704150450.20106-1-peter.ujfalusi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Peter Ujfalusi There is a single McASP on OMAP4 (and OMAP5) which is configured to only support DIT playback mode on a single serializer. Add 0x200 offset to DAT port address as the TRM suggests it. Signed-off-by: Peter Ujfalusi --- include/linux/platform_data/davinci_asp.h | 1 + sound/soc/ti/Kconfig | 1 + sound/soc/ti/davinci-mcasp.c | 26 ++++++++++++++++++++--- 3 files changed, 25 insertions(+), 3 deletions(-) diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h index 5d1fb0d78a22..76b13ef67562 100644 --- a/include/linux/platform_data/davinci_asp.h +++ b/include/linux/platform_data/davinci_asp.h @@ -96,6 +96,7 @@ enum { MCASP_VERSION_2, /* DA8xx/OMAPL1x */ MCASP_VERSION_3, /* TI81xx/AM33xx */ MCASP_VERSION_4, /* DRA7xxx */ + MCASP_VERSION_OMAP, /* OMAP4/5 */ }; enum mcbsp_clk_input_pin { diff --git a/sound/soc/ti/Kconfig b/sound/soc/ti/Kconfig index 698d7bc84dcf..1d9fe3fca193 100644 --- a/sound/soc/ti/Kconfig +++ b/sound/soc/ti/Kconfig @@ -35,6 +35,7 @@ config SND_SOC_DAVINCI_MCASP various Texas Instruments SoCs like: - daVinci devices - Sitara line of SoCs (AM335x, AM438x, etc) + - OMAP4 - DRA7x devices - Keystone devices - K3 devices (am654, j721e) diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c index e56a22c28467..f453728d2afc 100644 --- a/sound/soc/ti/davinci-mcasp.c +++ b/sound/soc/ti/davinci-mcasp.c @@ -1788,6 +1788,12 @@ static struct davinci_mcasp_pdata dra7_mcasp_pdata = { .version = MCASP_VERSION_4, }; +static struct davinci_mcasp_pdata omap_mcasp_pdata = { + .tx_dma_offset = 0x200, + .rx_dma_offset = 0, + .version = MCASP_VERSION_OMAP, +}; + static const struct of_device_id mcasp_dt_ids[] = { { .compatible = "ti,dm646x-mcasp-audio", @@ -1805,6 +1811,10 @@ static const struct of_device_id mcasp_dt_ids[] = { .compatible = "ti,dra7-mcasp-audio", .data = &dra7_mcasp_pdata, }, + { + .compatible = "ti,omap4-mcasp-audio", + .data = &omap_mcasp_pdata, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mcasp_dt_ids); @@ -2344,10 +2354,17 @@ static int davinci_mcasp_probe(struct platform_device *pdev) dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; dma_data->filter_data = "tx"; - if (dat) + if (dat) { dma_data->addr = dat->start; - else + /* + * According to the TRM there should be 0x200 offset added to + * the DAT port address + */ + if (mcasp->version == MCASP_VERSION_OMAP) + dma_data->addr += davinci_mcasp_txdma_offset(mcasp->pdata); + } else { dma_data->addr = mem->start + davinci_mcasp_txdma_offset(mcasp->pdata); + } /* RX is not valid in DIT mode */ @@ -2412,7 +2429,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev) ret = edma_pcm_platform_register(&pdev->dev); break; case PCM_SDMA: - ret = sdma_pcm_platform_register(&pdev->dev, "tx", "rx"); + if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) + ret = sdma_pcm_platform_register(&pdev->dev, "tx", "rx"); + else + ret = sdma_pcm_platform_register(&pdev->dev, "tx", NULL); break; case PCM_UDMA: ret = udma_pcm_platform_register(&pdev->dev); From patchwork Sun Jul 4 15:04:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?P=C3=A9ter_Ujfalusi?= X-Patchwork-Id: 470336 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06733C07E9A for ; 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[91.155.111.71]) by smtp.gmail.com with ESMTPSA id k11sm268826lfc.272.2021.07.04.08.02.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Jul 2021 08:02:39 -0700 (PDT) From: Peter Ujfalusi To: broonie@kernel.org, tony@atomide.com Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, linux-omap@vger.kernel.org, hns@goldelico.com Subject: [PATCH 4/5] ARM: dts: omap4-l4-abe: Correct sidle modes for McASP Date: Sun, 4 Jul 2021 18:04:49 +0300 Message-Id: <20210704150450.20106-5-peter.ujfalusi@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210704150450.20106-1-peter.ujfalusi@gmail.com> References: <20210704150450.20106-1-peter.ujfalusi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org McASP only supports Force-idle, No-idle and Smart-idle modes Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap4-l4-abe.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/omap4-l4-abe.dtsi b/arch/arm/boot/dts/omap4-l4-abe.dtsi index a9573d441dea..8287fdaa526e 100644 --- a/arch/arm/boot/dts/omap4-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap4-l4-abe.dtsi @@ -192,8 +192,7 @@ target-module@28000 { /* 0x40128000, ap 8 08.0 */ reg-names = "rev", "sysc"; ti,sysc-sidle = , , - , - ; + ; /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>; clock-names = "fck"; From patchwork Sun Jul 4 15:04:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?P=C3=A9ter_Ujfalusi?= X-Patchwork-Id: 470102 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3EB1BC07E95 for ; Sun, 4 Jul 2021 15:02:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 21DCA613E1 for ; Sun, 4 Jul 2021 15:02:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229715AbhGDPFT (ORCPT ); Sun, 4 Jul 2021 11:05:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53166 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229573AbhGDPFT (ORCPT ); Sun, 4 Jul 2021 11:05:19 -0400 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2DA1C061574 for ; Sun, 4 Jul 2021 08:02:42 -0700 (PDT) Received: by mail-lj1-x230.google.com with SMTP id b40so1158470ljf.12 for ; Sun, 04 Jul 2021 08:02:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rG8Wa9DCPn+LJLpCJ8agJSEaH0afH0syVdCVNBofvlc=; b=YocJjm6n9bM4Z2Y+D1N1nCcOZKsPF8y7tfeprCgumybmWRfVWqIS75Bq/NmZbdjIyh 8HskQqleK77e03XhE+Rv0Hoh/05IWd4i+l6zioD56vE+iom+XA5gZn27hpSoHda8s6vi VCgTrpVumPjXTxLvnaWYD1CdzPmVHi/LDmAtohu4f32L7KX1Zx8J/0eFl+DzjfaiwHaD fZW026LXabirhhW+pmK8M2BvQ6OubZeHmtUVgZXaRJWYNs7FVQsYoVfF0EAIsuiozk+d SYBCoT5482YWbt291Bx8FSrwO3HtSLzLqPGK3a2u9is1P83VqGErm7Qqmb7t6vdznDHl swcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rG8Wa9DCPn+LJLpCJ8agJSEaH0afH0syVdCVNBofvlc=; b=if9RY3ZMOcUDSpkwh+Z8vGtPiUNUvfLiZ1ePd4S69cLtL7NFA9X3CiuqHqoIPlAniH YZbp1gHaf7sPlM40heE7Q2gRaUIgGxzEDoMYrCqhQ0Vtvfg+jMiBDiUduGr6mbX/1noP 8GPKPREFNHtgz/DXfZUszMuze0CTbPi4NlQLQGfuuXNqQqJWIxyy1hAeWub3KZHRNBhY veD35mBXyCCM0depYRBItzkuVuggcBYTM/Ylam2H80yYiPrYLvdjcPrMhPqHyORttoT8 M75RNjb8gKokzn3LmDYI0gEEac+X3YNL0ss6J3yUSrCzqqIaPPxCRbbPvYyCrYpcvIBN zJBg== X-Gm-Message-State: AOAM533ESAremtYT7dDu3ILIJiAiVuYazIUP0SG6Gj46BrsV68S82ywI SS7gFbdCrCbqPfXsGMiKENc= X-Google-Smtp-Source: ABdhPJxGdC/Z3S2H8slU0FlpXoe5lliGF7ERtRDubU533St6/KeGCY1zYnihEdV4TTnw5GlrBcXocg== X-Received: by 2002:a2e:2a85:: with SMTP id q127mr7396552ljq.77.1625410961018; Sun, 04 Jul 2021 08:02:41 -0700 (PDT) Received: from localhost.localdomain (91-155-111-71.elisa-laajakaista.fi. [91.155.111.71]) by smtp.gmail.com with ESMTPSA id k11sm268826lfc.272.2021.07.04.08.02.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Jul 2021 08:02:40 -0700 (PDT) From: Peter Ujfalusi To: broonie@kernel.org, tony@atomide.com Cc: alsa-devel@alsa-project.org, lgirdwood@gmail.com, linux-omap@vger.kernel.org, hns@goldelico.com Subject: [PATCH 5/5] ARM: dts: omap4-l4-abe: Add McASP configuration Date: Sun, 4 Jul 2021 18:04:50 +0300 Message-Id: <20210704150450.20106-6-peter.ujfalusi@gmail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210704150450.20106-1-peter.ujfalusi@gmail.com> References: <20210704150450.20106-1-peter.ujfalusi@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org OMAP4 has a single McASP instance with single serializer and locked for DIT mode. To be able to enable the support the following fixes needed: - Add the DAT port ranges to the target module's ranges - SIDLE mode must be disabled as it is not working with McASP most likely module integration issue with McASP We can already fill in the op-mode and serial-dir for McASP as it only supports this configuration, but keep the module disabled as there is no known device available where it is used. Signed-off-by: Peter Ujfalusi --- arch/arm/boot/dts/omap4-l4-abe.dtsi | 38 +++++++++++++++-------------- 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/omap4-l4-abe.dtsi b/arch/arm/boot/dts/omap4-l4-abe.dtsi index 8287fdaa526e..a8d66240d17d 100644 --- a/arch/arm/boot/dts/omap4-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap4-l4-abe.dtsi @@ -186,36 +186,38 @@ mcbsp3: mcbsp@0 { }; target-module@28000 { /* 0x40128000, ap 8 08.0 */ + /* 0x4012a000, ap 10 0a.0 */ compatible = "ti,sysc-mcasp", "ti,sysc"; reg = <0x28000 0x4>, <0x28004 0x4>; reg-names = "rev", "sysc"; ti,sysc-sidle = , - , - ; + ; /* Domains (V, P, C): iva, abe_pwrdm, abe_clkdm */ clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>; clock-names = "fck"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x28000 0x1000>, - <0x49028000 0x49028000 0x1000>; - - /* - * Child device unsupported by davinci-mcasp. At least - * RX path is disabled for omap4, and only DIT mode - * works with no I2S. See also old Android kernel - * omap-mcasp driver for more information. - */ - }; - - target-module@2a000 { /* 0x4012a000, ap 10 0a.0 */ - compatible = "ti,sysc"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2a000 0x1000>, + <0x49028000 0x49028000 0x1000>, + <0x2000 0x2a000 0x1000>, <0x4902a000 0x4902a000 0x1000>; + + mcasp0: mcasp@0 { + compatible = "ti,omap4-mcasp-audio"; + reg = <0x0 0x2000>, + <0x4902a000 0x1000>; /* L3 data port */ + reg-names = "mpu","dat"; + interrupts = ; + interrupt-names = "tx"; + dmas = <&sdma 8>; + dma-names = "tx"; + clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>; + clock-names = "fck"; + op-mode = <1>; /* MCASP_DIT_MODE */ + serial-dir = < 1 >; /* 1 TX serializers */ + status = "disabled"; + }; }; target-module@2e000 { /* 0x4012e000, ap 12 0c.0 */