From patchwork Fri Aug 24 01:41:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 144981 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp752030ljw; Thu, 23 Aug 2018 18:42:34 -0700 (PDT) X-Google-Smtp-Source: AA+uWPx6U0d6eMonCX3XGNZ5rJqskdcIKizcj+ryHpL1DOlCKzVe7TDvVwPd3Sh1OVkYjaYGplA/ X-Received: by 2002:a63:6243:: with SMTP id w64-v6mr31008451pgb.145.1535074954045; Thu, 23 Aug 2018 18:42:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535074954; cv=none; d=google.com; s=arc-20160816; b=kSAUFf8fy3EdvH6siNKO6E0fDbBC5C8S+TT2CSFasXNPZz58neL7ilGL2bfvBoQQbn 3TBYyYoN0ydUBTyRY9WyWfKPS/DeGYdnWxx/9nql0YieWnSv/Sy3aFp8rvfJ2ZVxQ0ZP vf9lRK8QGIrZmpUEkY/v51hRWD3A+0CQTnmXLRnJ0scmBg5vIKqVpnJ4nbxHbkIl2ltk wIDt/Y0UhyBhfJaiT/+aFfZofNzfPFqSvCbRdvhlc5OM6nW1HM/MVZBIJDHKVoiJpK51 IAvsS9IdpyqzdZ+BKyf4Q+LRbPJjiZV1s431Mkq9AllsvQ0U2BCNGD1HTnwsv3Xr14g6 iySw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=CzdodUwtZIgwu2wu5HeMR4NestBlGRCdpgz3kG8nWjE=; b=oYgIqnmaEz9pTIMKJYsbRrP1YM3xZrK35sUq50NkN1Y6/VB0aScnVqSxdp2uNxJEpG NSF8KNdR5jvP3AMt8l6apX57HSwYFzdA1jrBwn8391dLAN8n1rfotiEwrETRKg+zvtLT DIvk8A2MLq3qj/3yYXyd2sZMBVIyAJGNwW4xhEFJBdpRYdWBttEEJNWWXBljEZcR3KRu WTaUaBsYslDTQ/Kmeu8t4fPRBYxbgjXgNOulJpJhDSiaIgFrv3IC3m18bxDReUHBfHZX /ylEwj1au25pSRQdsFxYYE9WP+zzhmAD1zTryrUv87SEM+6qOqKmakGQI8vg7567j+9y k/VQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=Hn9SSvvo; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i64-v6si6601533pfb.314.2018.08.23.18.42.33; Thu, 23 Aug 2018 18:42:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=Hn9SSvvo; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726267AbeHXFOx (ORCPT + 3 others); Fri, 24 Aug 2018 01:14:53 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:62323 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725735AbeHXFOx (ORCPT ); Fri, 24 Aug 2018 01:14:53 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w7O1fPr0000411; Fri, 24 Aug 2018 10:41:27 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w7O1fPr0000411 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1535074887; bh=CzdodUwtZIgwu2wu5HeMR4NestBlGRCdpgz3kG8nWjE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Hn9SSvvodpg88kFXgfG1lpXSR8sAqS/3MU0YdjDmwUkbB9zS6t0VdH0O4rxkW65hn xqAAeM1q+VMw507sQVsdtZmDzM9YfNqPgRkj+E428EgmsUVCI2oZcEAIf1+w/Cg1YN /2w3KFTThl0qgGmzFMGIfnpUQDdWa6JTL0HhW+vGkgVK3xEaPCRdrFue1mDTmrLV4P 50sOPF0juhOegv1ALpfNggTXwCXXPExD0o1XfZvOc1T/MwZpAQjbb3z/Oyg1Ed1jk3 MlqJKC4T6C7GyAhv3AMwmgZCEJIgizQe+VcSGUbI5HDIS+3mF5+/abXuaBJENxOlFI vK9Ko9h0RjjTg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Vinod Koul , dmaengine@vger.kernel.org Cc: devicetree@vger.kernel.org, Rob Herring , linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Masahiro Yamada , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/2] dt-bindings: dmaengine: add DT binding for UniPhier MIO DMAC Date: Fri, 24 Aug 2018 10:41:12 +0900 Message-Id: <1535074873-15617-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1535074873-15617-1-git-send-email-yamada.masahiro@socionext.com> References: <1535074873-15617-1-git-send-email-yamada.masahiro@socionext.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada --- Changes in v2: - Rename the node "dmac" to "dma-controller" - Remove dma-channels property .../devicetree/bindings/dma/uniphier-mio-dmac.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt -- 2.7.4 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt new file mode 100644 index 0000000..b12388d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt @@ -0,0 +1,25 @@ +UniPhier Media IO DMA controller + +This works as an external DMA engine for SD/eMMC controllers etc. +found in UniPhier LD4, Pro4, sLD8 SoCs. + +Required properties: +- compatible: should be "socionext,uniphier-mio-dmac". +- reg: offset and length of the register set for the device. +- interrupts: a list of interrupt specifiers associated with the DMA channels. +- clocks: a single clock specifier. +- #dma-cells: should be <1>. The single cell represents the channel index. + +Example: + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + clocks = <&mio_clk 7>; + #dma-cells = <1>; + }; + +Note: +In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo. +The first two channels share a single interrupt line.