From patchwork Sat Jul 10 12:24:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 472449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B425CC07E9C for ; Sat, 10 Jul 2021 12:25:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 960C8613E5 for ; Sat, 10 Jul 2021 12:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231184AbhGJM16 (ORCPT ); Sat, 10 Jul 2021 08:27:58 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:41490 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232689AbhGJM1v (ORCPT ); Sat, 10 Jul 2021 08:27:51 -0400 X-UUID: ebdcc82543b0451bb65d8a10da3d97d4-20210710 X-UUID: ebdcc82543b0451bb65d8a10da3d97d4-20210710 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1292515639; Sat, 10 Jul 2021 20:25:03 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs02n2.mediatek.inc (172.21.101.101) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 10 Jul 2021 20:25:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 10 Jul 2021 20:25:01 +0800 From: Tinghan Shen To: , , , , CC: , , , , , , , , Tinghan Shen Subject: [v2 1/2] dt-bindings: remoteproc: mediatek: Add binding for mt8195 scp Date: Sat, 10 Jul 2021 20:24:45 +0800 Message-ID: <20210710122446.5439-1-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add mt8195 compatible to binding document. The description of required properties are also modified to reflect the hardware change between mt8183 and mt8195. The mt8195 doesn't have to control the scp clock on kernel side. Signed-off-by: Tinghan Shen --- changes in v2: - fix missing 'compatible' line in binding document Documentation/devicetree/bindings/remoteproc/mtk,scp.txt | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt index 3f5f78764b60..d64466eefbe3 100644 --- a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt +++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt @@ -5,13 +5,15 @@ This binding provides support for ARM Cortex M4 Co-processor found on some Mediatek SoCs. Required properties: -- compatible Should be "mediatek,mt8183-scp" +- compatible Should be one of: + "mediatek,mt8183-scp" + "mediatek,mt8195-scp" - reg Should contain the address ranges for memory regions: SRAM, CFG, and L1TCM. - reg-names Contains the corresponding names for the memory regions: "sram", "cfg", and "l1tcm". -- clocks Clock for co-processor (See: ../clock/clock-bindings.txt) -- clock-names Contains the corresponding name for the clock. This +- clocks Required by mt8183. Clock for co-processor (See: ../clock/clock-bindings.txt) +- clock-names Required by mt8183. Contains the corresponding name for the clock. This should be named "main". Subnodes From patchwork Sat Jul 10 12:24:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tinghan Shen X-Patchwork-Id: 472753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D51EC07E9E for ; Sat, 10 Jul 2021 12:25:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB47C613AF for ; Sat, 10 Jul 2021 12:25:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232647AbhGJM1v (ORCPT ); Sat, 10 Jul 2021 08:27:51 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:54854 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S231184AbhGJM1u (ORCPT ); Sat, 10 Jul 2021 08:27:50 -0400 X-UUID: da9ffb9d678d4c28821839813c26c690-20210710 X-UUID: da9ffb9d678d4c28821839813c26c690-20210710 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 887776417; Sat, 10 Jul 2021 20:25:03 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 10 Jul 2021 20:25:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 10 Jul 2021 20:25:01 +0800 From: Tinghan Shen To: , , , , CC: , , , , , , , , Tinghan Shen Subject: [v2 2/2] remoteproc: mediatek: Support mt8195 scp Date: Sat, 10 Jul 2021 20:24:46 +0800 Message-ID: <20210710122446.5439-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20210710122446.5439-1-tinghan.shen@mediatek.com> References: <20210710122446.5439-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The SCP clock design is changed on mt8195 that doesn't need to control SCP clock on kernel side. Signed-off-by: Tinghan Shen --- drivers/remoteproc/mtk_scp.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index 9679cc26895e..c31af75f947a 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -785,11 +785,13 @@ static int scp_probe(struct platform_device *pdev) if (ret) goto destroy_mutex; - scp->clk = devm_clk_get(dev, "main"); - if (IS_ERR(scp->clk)) { - dev_err(dev, "Failed to get clock\n"); - ret = PTR_ERR(scp->clk); - goto release_dev_mem; + if (of_get_property(np, "clocks", NULL)) { + scp->clk = devm_clk_get(dev, "main"); + if (IS_ERR(scp->clk)) { + dev_err(dev, "Failed to get clock\n"); + ret = PTR_ERR(scp->clk); + goto release_dev_mem; + } } /* register SCP initialization IPI */ @@ -877,6 +879,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { static const struct of_device_id mtk_scp_of_match[] = { { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, + { .compatible = "mediatek,mt8195-scp", .data = &mt8192_of_data }, {}, }; MODULE_DEVICE_TABLE(of, mtk_scp_of_match);