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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f16sm10365634ilc.53.2021.07.19.14.24.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:24:59 -0700 (PDT) From: Alex Elder To: robh+dt@kernel.org, bjorn.andersson@linaro.org, agross@kernel.org Cc: davem@davemloft.net, kuba@kernel.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/3] dt-bindings: net: qcom, ipa: make imem interconnect optional Date: Mon, 19 Jul 2021 16:24:54 -0500 Message-Id: <20210719212456.3176086-2-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210719212456.3176086-1-elder@linaro.org> References: <20210719212456.3176086-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On some newer SoCs, the interconnect between IPA and SoC internal memory (imem) is not used. Reflect this in the binding by moving the definition of the "imem" interconnect to the end and defining minItems to be 2 for both the interconnects and interconnect-names properties. Signed-off-by: Alex Elder --- .../devicetree/bindings/net/qcom,ipa.yaml | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) -- 2.27.0 diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml index ed88ba4b94df5..4853ab7017bd9 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -87,16 +87,18 @@ properties: - const: ipa-setup-ready interconnects: + minItems: 2 items: - - description: Interconnect path between IPA and main memory - - description: Interconnect path between IPA and internal memory - - description: Interconnect path between IPA and the AP subsystem + - description: Path leading to system memory + - description: Path between the AP and IPA config space + - description: Path leading to internal memory interconnect-names: + minItems: 2 items: - const: memory - - const: imem - const: config + - const: imem qcom,smem-states: $ref: /schemas/types.yaml#/definitions/phandle-array @@ -207,11 +209,11 @@ examples: interconnects = <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_EBI1>, - <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_IMEM>, - <&rsc_hlos MASTER_APPSS_PROC &rsc_hlos SLAVE_IPA_CFG>; + <&rsc_hlos MASTER_APPSS_PROC &rsc_hlos SLAVE_IPA_CFG>, + <&rsc_hlos MASTER_IPA &rsc_hlos SLAVE_IMEM>; interconnect-names = "memory", - "imem", - "config"; + "config", + "imem"; qcom,smem-states = <&ipa_smp2p_out 0>, <&ipa_smp2p_out 1>; From patchwork Mon Jul 19 21:24:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 480070 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp4531762jao; Mon, 19 Jul 2021 15:04:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwCv+9CfevSblF1hq7VTjfaHZRTs37ZnZ/SdaMbRA3bMjjNK++ZFT8L5dC0LAXfHXbdA8aS X-Received: by 2002:a05:6402:1d2d:: with SMTP id dh13mr18980252edb.90.1626732241596; Mon, 19 Jul 2021 15:04:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626732241; cv=none; d=google.com; s=arc-20160816; b=Jm5Cb4q7hk+sRaEuhNo5VzeSkjCCm2ywDuU7FoW7EuI1RKzGcIqiFqKwHWK7ElW1bj ad/t0Jjqvv+8ptcMtYKqkxxJugITJ1Sb2yaqeFBrcKaAla6sjblLM1idZF5K/naKmfJk VmbkJOY3t6UiMyK3UkXUYsOUxXROB/Dv96swY9mYuXXh+B++QbkZEytWygFyIr9ocT5f MJM0saOzjpVvmwQla8m5x6P5VlLjPwf1GT9+ENym5y+nTIA8nhOvLuIkRs/Euqr7ILMa P/e+u2PcbOHfXxeqlnzp0CVdCpJsbqwMy6N8ex+4Q0SxqD92H0MHi8cYPhvABKhxRuP6 9Ukg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=46RsDietiFjiFAmxHIYkL76FeOwDdqdmSCbTGG461UY=; b=mO4LOm7kOWQ5ufYfY9wW4hkioQz8PtCGN3mSEpPiy2Hh9vp0B4jW6WEiUdbrIwANy3 7JDqIKWatxbOqdo+y3BxtdqT5UDUUL7quJ+2Q8cGjtbJY5SJvOQDqxJp2/1I9yoW3uAP UN2m9gbapJK+untQvPmu6e/DYDdD3kKRjsMbX2uoOMAYMa2dnLEfBhEU6kGCifBJ/Tm0 +Up46usiIsyXpPWcgdMmgU9jZArjsu2GWcBp8/+YNb3+Z/QIaE06rs0pVJDQ3huwi3Jg ciqqunIuCm9ALDm10eXBtkajHUuHwFifDeTQxuJA4aiBBPm4qhgCW19IQde8qXywePeY pObA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=u0YJcFOF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f16sm10365634ilc.53.2021.07.19.14.25.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:25:00 -0700 (PDT) From: Alex Elder To: bjorn.andersson@linaro.org, agross@kernel.org Cc: robh+dt@kernel.org, davem@davemloft.net, kuba@kernel.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 2/3] arm64: dts: qcom: sc7280: add IPA information Date: Mon, 19 Jul 2021 16:24:55 -0500 Message-Id: <20210719212456.3176086-3-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210719212456.3176086-1-elder@linaro.org> References: <20210719212456.3176086-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add IPA-related nodes and definitions to "sc7280.dtsi", including the reserved memory area used for AP-based IPA firmware loading. Signed-off-by: Alex Elder --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 43 ++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) -- 2.27.0 diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index a8c274ad74c47..5eb2b58ea23be 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -63,6 +64,11 @@ cpucp_mem: memory@80b00000 { no-map; reg = <0x0 0x80b00000 0x0 0x100000>; }; + + ipa_fw_mem: memory@8b700000 { + reg = <0 0x8b700000 0 0x10000>; + no-map; + }; }; cpus { @@ -508,6 +514,43 @@ mmss_noc: interconnect@1740000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + ipa: ipa@1e40000 { + compatible = "qcom,sc7280-ipa"; + + iommus = <&apps_smmu 0x480 0x0>, + <&apps_smmu 0x482 0x0>; + reg = <0 0x1e40000 0 0x8000>, + <0 0x1e50000 0 0x4ad0>, + <0 0x1e04000 0 0x23000>; + reg-names = "ipa-reg", + "ipa-shared", + "gsi"; + + interrupts-extended = <&intc 0 654 IRQ_TYPE_EDGE_RISING>, + <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>, + <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ipa", + "gsi", + "ipa-clock-query", + "ipa-setup-ready"; + + clocks = <&rpmhcc RPMH_IPA_CLK>; + clock-names = "core"; + + interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_IPA_CFG 0>; + interconnect-names = "memory", + "config"; + + qcom,smem-states = <&ipa_smp2p_out 0>, + <&ipa_smp2p_out 1>; + qcom,smem-state-names = "ipa-clock-enabled-valid", + "ipa-clock-enabled"; + + status = "disabled"; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex", "syscon"; reg = <0 0x01f40000 0 0x40000>; From patchwork Mon Jul 19 21:24:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 480072 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp4531785jao; Mon, 19 Jul 2021 15:04:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzAKHG446qSn7brKWlmLNDUoLWHNhOOKFeyhpMAiYHCZ1rL2F179e8SNQjCBPhTJ5gh4wuq X-Received: by 2002:aa7:db94:: with SMTP id u20mr37136536edt.381.1626732242738; Mon, 19 Jul 2021 15:04:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626732242; cv=none; d=google.com; s=arc-20160816; b=FztfDh9snAxDOndnhFwyiX5cbPQ38h8AC67d2Q0oslxNiqFsVcxPWN2VOI94nsFVWw KdUzN/+CQAKNuwqh/cbZgE6/QxZqR70LsdwQ9CUZtjEfizZ7CWXEYA113U0ES+JeVGb2 2D6IHAE4JIekIGBol0ZKW/MAK31lgJkmHWFucX5B88XS5c/f6vSnhHAmupqomdiARBPd 3rXNz2xnuQqRn6AlbaFKOrTbQCacqNMWm8lkZe+nMkAVc8/2lMxYsdf5hZy+x7/FRWqB xX4VUtz0JLl6OCePhAKl/3yXoWb4mpuc58Cz9X+ypKO9eIfJP8J7rhD1Z5YM+dCQ4lhN 6CnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=+NFov+irJOIAcAXFIXqWWjTSP6xxxi6btrU5/J/bm+U=; b=EorZ4m7CioPNYiK1J0FRhWRcbZB+5l82KC9at2QQ9v8EyTe8mZp+qQIDL7UdXoS1Dz QjrYsYwretMnZDBRYL9N8fo2d8EmUoBQ+FicwSWw6M6RjG5gq7WBnaRexVKe9KdJheen eSL8xF5H7MOLzxOgsaFgPDPZYg6hsKO4FJl61iLG55PmFyVkwgPXHzZTmNnUAPEUPXnL T/xWxHUaXzMnPY3CDMOEt2w5PxHcgs5rtzi+chwYmX/Zq5pdY1lZ9Rk6ptwea/K9zE4W NP234VDh12Wrim42frb8gBQw19SrTmwRIos0tAxNpU4RFq+a/Hz0tCT17BBEJsci4fo0 xrBQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gi4a1X6z; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id f16sm10365634ilc.53.2021.07.19.14.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Jul 2021 14:25:01 -0700 (PDT) From: Alex Elder To: bjorn.andersson@linaro.org, agross@kernel.org Cc: robh+dt@kernel.org, davem@davemloft.net, kuba@kernel.org, evgreen@chromium.org, cpratapa@codeaurora.org, subashab@codeaurora.org, elder@kernel.org, linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/3] arm64: dts: qcom: sc7180: define ipa_fw_mem node Date: Mon, 19 Jul 2021 16:24:56 -0500 Message-Id: <20210719212456.3176086-4-elder@linaro.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210719212456.3176086-1-elder@linaro.org> References: <20210719212456.3176086-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define the reserved memory space used for IPA firmware for the Qualcomm SC7180 SoC. Signed-off-by: Alex Elder --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 +++++ 1 file changed, 5 insertions(+) -- 2.27.0 diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index a5d58eb928960..7af551a1fd904 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -110,6 +110,11 @@ tz_mem: memory@80b00000 { no-map; }; + ipa_fw_mem: memory@8b700000 { + reg = <0 0x8b700000 0 0x10000>; + no-map; + }; + rmtfs_mem: memory@94600000 { compatible = "qcom,rmtfs-mem"; reg = <0x0 0x94600000 0x0 0x200000>;