From patchwork Tue May 16 22:13:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 99894 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp2232403qge; Tue, 16 May 2017 15:14:31 -0700 (PDT) X-Received: by 10.84.224.77 with SMTP id a13mr297695plt.132.1494972871750; Tue, 16 May 2017 15:14:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494972871; cv=none; d=google.com; s=arc-20160816; b=auw5whY8JcjjUfr4KqYbvRg8bz3jdhGDz2/s0YEqQiedur/JnwwaYxJugqgUDb4RPt y59wO8AlB66rNnQMR0RqgAdRs9kp3rLNtzwvZOadHVNv3FelKsWaPaeVwoWsn9EnXw5W NhboR8Qw1X3tb5H89kXyot425KehywtopPPzUEXIHmDFWXAqDtsL7mmlmNNDVnCgRDMK zDDecvw0OBN1gjsPMVpu6kpm7xUFHTdKOlAYajPPBvarF0x8M0lTd4FWSZGWyTuCPgxC lm9khpSG9OBSCpqhAWwTiNivAHiVXB92D3TQTeYB5rFnBHgtAcQVD/zbYQd0CUBNC4qh m1LQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=Yb14hDHl1hArJS7qi76VF1+gCqwngyymBK9CzM8A78Q=; b=Wo1Dq4oUxY7e8vlWmwC4Xl2ppHBTHZDN6LvruJxoYiVDBF78xW7WC1zLmNEbD1S6SW AowbQEw4P4SetJXHK9NmO8wNgbBCy9F3jnmnte0w6l1DKgX/aSAeOEExQSEwxiR0lnCU BBmXmLAivlIzZFmwgPyrXeZQUQAhouOsC0EmhluRRuQ4nWYW4IBptY+OI/z6RZtY13Tx taRL6Ix7D7GE4YgHzIPX5OzjqPfvxoi3+8V0+zIN7BsJJV2uGbpMJvlgBtmyghIeHBWx g3zWIDYt94paVrjIDPilnex0a+VRkQzozpYPQnQepyXwMRAQLBFzXrxlp3p/u2OKCJhV GA7A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u72si131103pfk.60.2017.05.16.15.14.31; Tue, 16 May 2017 15:14:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753566AbdEPWOZ (ORCPT + 25 others); Tue, 16 May 2017 18:14:25 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:63056 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753095AbdEPWOT (ORCPT ); Tue, 16 May 2017 18:14:19 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4GMDsqp021573; Tue, 16 May 2017 17:13:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1494972834; bh=/4WY0v9eNlDnQR3TTSx8rhPEMTzjSEevYtoBSmKc7ts=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=AFsVtjlzMART7Ztrp9KIUyZemRfpqPki55XbeXUsxwqlXtONpjplSktvY0bLI4DJ9 z3MeiTbcYmPfo21mui9l+YRNSWfUugZAibRYPgOmw4yRNg5r5dBI5Lp0vQ3mKMB8hg gopATInwTE8ZZCmx0FZvUWJXE+VuTkvDoD9ZcwSk= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4GMDrFT021721; Tue, 16 May 2017 17:13:54 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Tue, 16 May 2017 17:13:53 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4GMDrjf021496; Tue, 16 May 2017 17:13:53 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.167]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v4GMDr323272; Tue, 16 May 2017 17:13:53 -0500 (CDT) From: Suman Anna To: Sekhar Nori , Kevin Hilman CC: , , Suman Anna Subject: [PATCH 1/3] ARM: davinci: da8xx: Create DSP device only when assigned memory Date: Tue, 16 May 2017 17:13:45 -0500 Message-ID: <20170516221347.37990-2-s-anna@ti.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170516221347.37990-1-s-anna@ti.com> References: <20170516221347.37990-1-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DSP device on Davinci platforms does not have an MMU and requires specific DDR memory to boot. This memory is reserved using the rproc_mem kernel boot parameter and is assigned to the device on non-DT boots. The remoteproc core uses the DMA API and so will fall back to assigning random memory if this memory is not assigned to the device, but the DSP remote processor boot will not be successful in such cases. So, check that memory has been reserved and assigned to the device specifically before even creating the DSP device. Signed-off-by: Suman Anna --- arch/arm/mach-davinci/devices-da8xx.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.12.0 diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 7cf529ffbe5a..1ccf52e49886 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -814,6 +814,8 @@ static struct platform_device da8xx_dsp = { .resource = da8xx_rproc_resources, }; +static bool rproc_mem_inited __initdata; + #if IS_ENABLED(CONFIG_DA8XX_REMOTEPROC) static phys_addr_t rproc_base __initdata; @@ -852,6 +854,8 @@ void __init da8xx_rproc_reserve_cma(void) ret = dma_declare_contiguous(&da8xx_dsp.dev, rproc_size, rproc_base, 0); if (ret) pr_err("%s: dma_declare_contiguous failed %d\n", __func__, ret); + else + rproc_mem_inited = true; } #else @@ -866,6 +870,12 @@ int __init da8xx_register_rproc(void) { int ret; + if (!rproc_mem_inited) { + pr_warn("%s: memory not reserved for DSP, not registering DSP device\n", + __func__); + return -ENOMEM; + } + ret = platform_device_register(&da8xx_dsp); if (ret) pr_err("%s: can't register DSP device: %d\n", __func__, ret); From patchwork Tue May 16 22:13:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 99896 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp2232599qge; Tue, 16 May 2017 15:15:06 -0700 (PDT) X-Received: by 10.98.107.202 with SMTP id g193mr240301pfc.53.1494972906164; Tue, 16 May 2017 15:15:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494972906; cv=none; d=google.com; s=arc-20160816; b=T3sl1oTMMgma1CrplIZ7V6Zh69FL3aO4mxepuMvnUos5smdjOEy7yn8aEyJhg5e6JR z7TL/wMwAOIm/91g9JWc/7B+sgdFWyUnUFGUeUa6bVkSYEIb8YH0nUTz+GGw3HX8XQlS wXU37EP1rreD5gqfk5OIsBtBRTaOdC55G3kFkTvsCp+aK144NT8GbAb2eERNlb4Uw37s f14oA3h+v1ziHwMUI57P3medtck6+fduuewQBAi2FUhpMcC/Z0pSK+vcn6DyIb/Djch3 EGc3OVMzResGnuOgCgAKWJmyA14iwflpqfG5CO1JrcrRvQHRHZewAo5nBboUIeU02V3i w0yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=XdsaTm1qYtl1cQK5FL1fC9w3kQnkeXohfOTGqq7cW/8=; b=XDlmoef9HrTYPxiGjfLFppdnPs+ZtZIOfDEm4VmD+Pe449g+zYy3iD4Z9S5lVEc/sv 80iX6UbREtBX2FJuOxPOaizqSSAVyHLOMx+L4zvCxKsJWU1jyppYXITd+0kbYSe7s/7X hi4Q71pNcXSrqjndSBmt6BrOlSMPBkfEnqbzRux8Tjugt6xXqnRQ6Ip4XPtVhvIxYHMT Y6H9hb8Wagmd/JV5ow/U1pYJ408p3shQcnbFaiMCMANl4C3LyDxHCnZk8rz+R8LZvEoG nWmRsp+aL/afSxk4ylK3z9nNs+I+IDuprdg+2sP/qAAwC+cfG5f+J4+Ron23/d3hbrJA 4l0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z80si114974pfa.256.2017.05.16.15.15.05; Tue, 16 May 2017 15:15:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753546AbdEPWOX (ORCPT + 25 others); Tue, 16 May 2017 18:14:23 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:63057 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751680AbdEPWOT (ORCPT ); Tue, 16 May 2017 18:14:19 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4GMDwD1021586; Tue, 16 May 2017 17:13:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1494972838; bh=7OgqJYHWPs/c/C9Hx4M1K7j3DW5uxtVhCW4WNWXW2hE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=j1MSAL1BOs69irnHXPM+HYw0WUrBUYA8w2unjTZfUxwKyiY0Pv9c3IgaBWQW6vOx6 EfkZ7KazMVUQjdpZHytze7KqYKm6mLLbRP336qrxEPj8nrlUSfcvKltSxa8BQeK43i lI1cRpJjqnWO97GTwp0T4vOmhiU66d8NaEgiw4ZU= Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4GMDwih009543; Tue, 16 May 2017 17:13:58 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Tue, 16 May 2017 17:13:54 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4GMDssh031759; Tue, 16 May 2017 17:13:54 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.167]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v4GMDs323276; Tue, 16 May 2017 17:13:54 -0500 (CDT) From: Suman Anna To: Sekhar Nori , Kevin Hilman CC: , , Suman Anna Subject: [PATCH 2/3] ARM: davinci: da8xx: Add names to DSP IOMEM resources Date: Tue, 16 May 2017 17:13:46 -0500 Message-ID: <20170516221347.37990-3-s-anna@ti.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170516221347.37990-1-s-anna@ti.com> References: <20170516221347.37990-1-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add names to the IOMEM resources for the DSP device present on DA8xx SoCs. This will facilitate the driver to use the names and be agnostic of the resource order, and facilitate scalable DT support in follow-up patches. Signed-off-by: Suman Anna --- arch/arm/mach-davinci/devices-da8xx.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.12.0 diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 1ccf52e49886..74c76538cda3 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -789,11 +789,13 @@ int __init da850_register_mmcsd1(struct davinci_mmc_config *config) static struct resource da8xx_rproc_resources[] = { { /* DSP boot address */ + .name = "host1cfg", .start = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG, .end = DA8XX_SYSCFG0_BASE + DA8XX_HOST1CFG_REG + 3, .flags = IORESOURCE_MEM, }, { /* DSP interrupt registers */ + .name = "chipsig", .start = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG, .end = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7, .flags = IORESOURCE_MEM, From patchwork Tue May 16 22:13:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 99895 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp2232442qge; Tue, 16 May 2017 15:14:37 -0700 (PDT) X-Received: by 10.84.229.78 with SMTP id d14mr279871pln.15.1494972877779; Tue, 16 May 2017 15:14:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1494972877; cv=none; d=google.com; s=arc-20160816; b=yHOT/7/rRAfxuq+ANWfBc5JBGU/H0QPB4WghHbK5fUC2UsiS4zzSiv2+r1FwlthBIH HUD46dTiDwF1OsCvCcKg+r7sY8JPzX5Lvalmsj4DueMgKYyzgKznrqO2Vc/9szhEecP0 MIltzlZDEDLA9WR80B3M1aA8Q8oS9gZxrgoXuR78yKAKVjRN2Rxdl8KCOevlM6k9Bfp8 oH5oC6umL9zB9LXju/TnIXUtRXj1CwwLD1EyFI/mu13F5EnoCmSkCKTtmgoIy35Pk8Q6 VuGbntKQjR65usR/2V471STOyS40QbUwqU1kRCUJgp335jFi5sgmRCMSNnSuIPnED1bs lTEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=7nQlc87TkKErmqDQHXZMI94Hpz42UiuRbdcMHsz5dVc=; b=g7hE1RQdY0wLt0sm9w6ASvR/ijKWNH2AF+hfGCgGLzuqlXYXgP+XGS5XsK9kW04xtc FE4sjIeoSqz37hi/feSrOT2FAL4ji/fxe3l6c3ZApyX67Zl2uOwHEGDL/m7iQwpge5aK 6uKjPSsiU6ZMF6apcgqH3UhgdLVSKaTECrO5sVsRXLITfoBt/amrz/RHanhjnSfn0by0 MQ3ArVYm5r6fJ4riVY0kCz6xfmngrtggrosWcAgdx6XYM3KPG+E12h4wWElLOGaQft8M BumI6Kf2J18r466uPeh8EwWJfDJrCpxmNS86eUcUl8XwDlFZ7CmBNn8EhJHvFaHMMncl Zrnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u72si131103pfk.60.2017.05.16.15.14.37; Tue, 16 May 2017 15:14:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753601AbdEPWOf (ORCPT + 25 others); Tue, 16 May 2017 18:14:35 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:63061 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753574AbdEPWOc (ORCPT ); Tue, 16 May 2017 18:14:32 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4GMDuZb021577; Tue, 16 May 2017 17:13:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1494972836; bh=O0uaz1dCiA9yXOzW77OeSw6FUOFMzag74fk8pLwVCNQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Uhd4MSM+qJiBKd5O2N8P1JEQxT+SVykl67zI8zTrdJxbNIPnqia0Bb8Ttli5LntKc lkwT4z26O/mYwIaQVkabvUCPxNtpVeX7MeS4XDwTgwpFgyfp7EPPmeHVo4xkFs1tpY PG2o5H2zMbD5wYNaVBkMkreD59W8bKnm1qOQ/DdM= Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4GMDuRn021742; Tue, 16 May 2017 17:13:56 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Tue, 16 May 2017 17:13:55 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4GMDtah031772; Tue, 16 May 2017 17:13:55 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.167]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v4GMDt323280; Tue, 16 May 2017 17:13:55 -0500 (CDT) From: Suman Anna To: Sekhar Nori , Kevin Hilman CC: , , Suman Anna Subject: [PATCH 3/3] ARM: davinci: da8xx: Add DSP internal RAM memories as IOMEM resources Date: Tue, 16 May 2017 17:13:47 -0500 Message-ID: <20170516221347.37990-4-s-anna@ti.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170516221347.37990-1-s-anna@ti.com> References: <20170516221347.37990-1-s-anna@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DSP subsystem on DA8xx has various internal RAM memories that can accessed from the ARM side. These memories can be configured to be used as either RAM or Cache. Add these memories as IOMEM resources to the DSP device so that the driver can support loading of images into internal memories. Signed-off-by: Suman Anna --- arch/arm/mach-davinci/devices-da8xx.c | 18 ++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 5 +++++ 2 files changed, 23 insertions(+) -- 2.12.0 diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 74c76538cda3..22440c05d66a 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -800,6 +800,24 @@ static struct resource da8xx_rproc_resources[] = { .end = DA8XX_SYSCFG0_BASE + DA8XX_CHIPSIG_REG + 7, .flags = IORESOURCE_MEM, }, + { /* DSP L2 RAM */ + .name = "l2sram", + .start = DA8XX_DSP_L2_RAM_BASE, + .end = DA8XX_DSP_L2_RAM_BASE + SZ_256K - 1, + .flags = IORESOURCE_MEM, + }, + { /* DSP L1P RAM */ + .name = "l1pram", + .start = DA8XX_DSP_L1P_RAM_BASE, + .end = DA8XX_DSP_L1P_RAM_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, + { /* DSP L1D RAM */ + .name = "l1dram", + .start = DA8XX_DSP_L1D_RAM_BASE, + .end = DA8XX_DSP_L1D_RAM_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, { /* dsp irq */ .start = IRQ_DA8XX_CHIPINT0, .end = IRQ_DA8XX_CHIPINT0, diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 7e464228948b..93ff1569cee5 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -75,6 +75,11 @@ extern unsigned int da850_max_speed; #define DA8XX_VPIF_BASE 0x01e17000 #define DA8XX_GPIO_BASE 0x01e26000 #define DA8XX_PSC1_BASE 0x01e27000 + +#define DA8XX_DSP_L2_RAM_BASE 0x11800000 +#define DA8XX_DSP_L1P_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x600000) +#define DA8XX_DSP_L1D_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x700000) + #define DA8XX_AEMIF_CS2_BASE 0x60000000 #define DA8XX_AEMIF_CS3_BASE 0x62000000 #define DA8XX_AEMIF_CTL_BASE 0x68000000