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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id v72-v6sm41180378pfj.22.2018.09.03.21.59.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Sep 2018 21:59:37 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/8] arm64: dts: qcom: msm8998: Add tsens and thermal-zones Date: Mon, 3 Sep 2018 22:01:18 -0700 Message-Id: <20180904050123.26601-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180904050123.26601-1-bjorn.andersson@linaro.org> References: <20180904050123.26601-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the two tsens instances and the thermal zones for CPUs, GPUs, battery and skin sensors. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi | 38 +++++ arch/arm64/boot/dts/qcom/msm8998.dtsi | 193 ++++++++++++++++++++++ 2 files changed, 231 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi index 09b46c54e413..202aa1a5cf27 100644 --- a/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi @@ -12,6 +12,44 @@ stdout-path = "serial0:115200n8"; }; + thermal-zones { + battery-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 0>; + + trips { + battery_crit: trip0 { + temperature = <60000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + skin-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 5>; + + trips { + skin_alert: trip0 { + temperature = <44000>; + hysteresis = <2000>; + type = "passive"; + }; + + skip_crit: trip1 { + temperature = <70000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; regulator-name = "vph_pwr"; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 98b9edb89424..f92f04f9ed6d 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -225,6 +225,183 @@ }; }; + thermal-zones { + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 6>; + + trips { + cpu_alert0: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit0: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 7>; + + trips { + cpu_alert1: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit1: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 8>; + + trips { + cpu_alert2: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit2: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 9>; + + trips { + cpu_alert3: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit3: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal4 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 10>; + + trips { + cpu_alert4: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit4: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal5 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens0 11>; + + trips { + cpu_alert5: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit5: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal6 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 0>; + + trips { + cpu_alert6: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit6: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal7 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 1>; + + trips { + cpu_alert7: trip0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit7: trip1 { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens1 3>; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , @@ -281,6 +458,22 @@ cell-index = <0>; }; + tsens0: thermal@10aa000 { + compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; + reg = <0x10aa000 0x2000>; + + #qcom,sensors = <12>; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal@10ad000 { + compatible = "qcom,msm8998-tsens", "qcom,tsens-v2"; + reg = <0x10ad000 0x2000>; + + #qcom,sensors = <8>; + #thermal-sensor-cells = <1>; + }; + apcs_glb: mailbox@9820000 { compatible = "qcom,msm8998-apcs-hmss-global"; reg = <0x17911000 0x1000>; From patchwork Tue Sep 4 05:01:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 145842 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp3237206ljw; Mon, 3 Sep 2018 21:59:44 -0700 (PDT) X-Google-Smtp-Source: ANB0VdYr62srNIywNIsRQ7+y9hg/hywuWPpNpeNcX9PAd08gQaYYwr+yHQrlC9j6nPUinaIL2A4X X-Received: by 2002:a62:25c5:: with SMTP id l188-v6mr32514650pfl.179.1536037183932; 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id v72-v6sm41180378pfj.22.2018.09.03.21.59.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Sep 2018 21:59:39 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/8] arm64: dts: qcom: msm8998: Add smem related nodes Date: Mon, 3 Sep 2018 22:01:20 -0700 Message-Id: <20180904050123.26601-6-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180904050123.26601-1-bjorn.andersson@linaro.org> References: <20180904050123.26601-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add reserve-memory nodes, tcsr-mutex nodes and the smem node. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/msm8998.dtsi | 49 +++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index f92f04f9ed6d..335bbc339932 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -20,6 +20,38 @@ reg = <0 0 0 0>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + memory@85800000 { + reg = <0x0 0x85800000 0x0 0x800000>; + no-map; + }; + + smem_mem: smem-mem@86000000 { + reg = <0x0 0x86000000 0x0 0x200000>; + no-map; + }; + + memory@86200000 { + reg = <0x0 0x86200000 0x0 0x2600000>; + no-map; + }; + + rmtfs { + compatible = "qcom,rmtfs-mem"; + + size = <0x0 0x200000>; + alloc-ranges = <0x0 0xa0000000 0x0 0x2000000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = <15>; + }; + }; + clocks { xo_board { compatible = "fixed-clock"; @@ -205,6 +237,12 @@ }; }; + tcsr_mutex: hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_regs 0 0x1000>; + #hwlock-cells = <1>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -225,6 +263,12 @@ }; }; + smem { + compatible = "qcom,smem"; + memory-region = <&smem_mem>; + hwlocks = <&tcsr_mutex 3>; + }; + thermal-zones { cpu-thermal0 { polling-delay-passive = <250>; @@ -474,6 +518,11 @@ #thermal-sensor-cells = <1>; }; + tcsr_mutex_regs: syscon@1f40000 { + compatible = "syscon"; + reg = <0x1f40000 0x20000>; + }; + apcs_glb: mailbox@9820000 { compatible = "qcom,msm8998-apcs-hmss-global"; reg = <0x17911000 0x1000>; From patchwork Tue Sep 4 05:01:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 145844 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp3237248ljw; Mon, 3 Sep 2018 21:59:47 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaBPS/OfleDrMjq/dow8rPI+Nv0rYQZtipljlpiIrDHiDzbOHveTtQQFSCSyMEiSKfJD73d X-Received: by 2002:a17:902:b70f:: with SMTP id d15-v6mr32650351pls.53.1536037187791; Mon, 03 Sep 2018 21:59:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536037187; cv=none; d=google.com; s=arc-20160816; b=YUtrieLbsDUFmSD/gtbGfBv/nFOcf6p4XdKAHFItB9GASI5D7lAAdzkvS1PyOTjjH9 Ban+GT2G/31BDxP/srMfZTGmuSUuLsoEdmCTEBk/8Hn/D6NsVYVIFwqNbwy9yJ4yUM5L 3agH1VM13u9mq6iWlXeaWqkLQRDgJ77ztlinwpx2HbzivvPyjVrwvs/PI8lFxja0fYtr uqd/r5WfIPjPEfQYpooWSLvl1gIOk7OMO9fPPQBvs+pMTjk8VUuu8+J0qGfHjwO3SBT9 PukIAEy4YoqyBP0LliMmn1oXoAd0I10WCE/AFfSqadIjEmY2dnIZD5orrnYFs2BM8Rh4 mLUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=gXPJN9soG+baASlFRGJNtCSqRvBu4NHCq/k4vbGCSXw=; b=D2Fn+ftO7dTIZA6XtvGs+fKwiPHVj0EYvFwRmGiT3oIyteT10qUoHwECAnHx4I5zAA psyPvFkjnxbVS87Z4OWjIeY6DxsulBO+Mfbff9Z8jT0RZSBqT1yzf7VaWKWBk9mXrwb4 xFQF5JDbF0Exth3t1bUYnrkeSLTbodDIuazVvBcl+gdhYATNtPwUwT9bJhxiu1efyuNa dIZWYfMVxGSGFo/xn9o9Rw5FXp0PDKBRPEqBYLtocZAOqUbKZxCp37P83geyXoTFaCUi wi6AoUcdWYSm+HMIqNTxhpFsItrV50L6xB2exqEE5oqWXefirSvjv+1/SA3LPTDHrvpd XETA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Jw+ZlrUa; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id v72-v6sm41180378pfj.22.2018.09.03.21.59.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Sep 2018 21:59:42 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 8/8] arm64: dts: qcom: msm8998: Add smp2p nodes Date: Mon, 3 Sep 2018 22:01:23 -0700 Message-Id: <20180904050123.26601-9-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180904050123.26601-1-bjorn.andersson@linaro.org> References: <20180904050123.26601-1-bjorn.andersson@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the adsp, modem and slpi smp2p nodes to msm8998. Signed-off-by: Bjorn Andersson --- Changes since v2: - New patch arch/arm64/boot/dts/qcom/msm8998.dtsi | 64 +++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index f0cdad91b6c9..820c75c7b484 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -275,6 +275,70 @@ hwlocks = <&tcsr_mutex 3>; }; + smp2p-lpass { + compatible = "qcom,smp2p"; + qcom,smem = <443>, <429>; + + interrupts = ; + + mboxes = <&apcs_glb 10>; + + qcom,local-pid = <0>; + qcom,remote-pid = <2>; + + adsp_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + adsp_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + smp2p-mpss { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + interrupts = ; + mboxes = <&apcs_glb 14>; + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + modem_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + modem_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + smp2p-slpi { + compatible = "qcom,smp2p"; + qcom,smem = <481>, <430>; + interrupts = ; + mboxes = <&apcs_glb 26>; + qcom,local-pid = <0>; + qcom,remote-pid = <3>; + + slpi_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + slpi_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + thermal-zones { cpu-thermal0 { polling-delay-passive = <250>;