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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id c3-v6sm1102172itd.8.2018.09.11.14.49.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Sep 2018 14:49:59 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: alexander.shishkin@linux.intel.com, suzuki.poulose@arm.com, gregkh@linuxfoundation.org, kim.phillips@arm.com, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] coresight: Make path enable/disable aware of operation mode Date: Tue, 11 Sep 2018 15:49:51 -0600 Message-Id: <1536702595-9999-2-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> References: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Make functions that enable and disable a path aware of the mode, i.e sysFS or perf, they are being operated from. That way said mode can be communicated to device specific operations in order to control how verbose they can be. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 4 ++-- drivers/hwtracing/coresight/coresight-priv.h | 2 +- drivers/hwtracing/coresight/coresight.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index abe8249b893b..92affdcf2467 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -304,7 +304,7 @@ static void etm_event_start(struct perf_event *event, int flags) return; fail_disable_path: - coresight_disable_path(path); + coresight_disable_path(path, CS_MODE_PERF); fail_end_stop: perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED); perf_aux_output_end(handle, 0); @@ -356,7 +356,7 @@ static void etm_event_stop(struct perf_event *event, int mode) } /* Disabling the path make its elements available to other sessions */ - coresight_disable_path(path); + coresight_disable_path(path, CS_MODE_PERF); } static int etm_event_add(struct perf_event *event, int mode) diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index c11da5564a67..acfe67646a05 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -136,7 +136,7 @@ static inline void coresight_write_reg_pair(void __iomem *addr, u64 val, writel_relaxed((u32)(val >> 32), addr + hi_offset); } -void coresight_disable_path(struct list_head *path); +void coresight_disable_path(struct list_head *path, u32 mode); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data); struct coresight_device *coresight_get_sink(struct list_head *path); struct coresight_device *coresight_get_enabled_sink(bool reset); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index e73ca6af4765..118b435f0887 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -277,7 +277,7 @@ static bool coresight_disable_source(struct coresight_device *csdev) return !csdev->enable; } -void coresight_disable_path(struct list_head *path) +void coresight_disable_path(struct list_head *path, u32 mode) { u32 type; struct coresight_node *nd; @@ -369,7 +369,7 @@ int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) out: return ret; err: - coresight_disable_path(path); + coresight_disable_path(path, mode); goto out; } @@ -677,7 +677,7 @@ int coresight_enable(struct coresight_device *csdev) return ret; err_source: - coresight_disable_path(path); + coresight_disable_path(path, CS_MODE_SYSFS); err_path: coresight_release_path(path); @@ -714,7 +714,7 @@ void coresight_disable(struct coresight_device *csdev) break; } - coresight_disable_path(path); + coresight_disable_path(path, CS_MODE_SYSFS); coresight_release_path(path); out: From patchwork Tue Sep 11 21:49:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 146485 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4096980ljw; Tue, 11 Sep 2018 14:50:06 -0700 (PDT) X-Google-Smtp-Source: ANB0VdajIqB9j4oWbIusAIYNIgOXrggEsqfYMDGra6FyD6Y0orN+BJF+zAihxxckuP/X+xccptDL X-Received: by 2002:a17:902:b70f:: with SMTP id d15-v6mr30049125pls.53.1536702606709; Tue, 11 Sep 2018 14:50:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536702606; cv=none; d=google.com; s=arc-20160816; b=x7sGnKC27nB7gEk4+5+GB8Ncg8nWc42+ewdiUNSe/XBlNECGQQFjU0zrZgnEtKHbDI b7RYVTDH71rskidI8d8oSxIWfYzRjc2RWA7Ec4JRy6rm4bWTZBqUYfG3H6hpWU2d2CuQ HPg3mTgmYIvV0jJWRB5ZfS2hHPueZUhsvW71ITYXOBJtIkzcriQ77wHAUKmjvzrzdqfw ADuD2RdOhZcE7zSwbmPiFE3Asx5eLsepyteNYyrAeE0Ss85skGexi2z+zz6bT6PxVeRk 9qqiz/RiAnJWBjaRTMndZ4R8pyi3OG91kgojUiXbIjXjPkbbY0oy2dGvle4Rz2AU+vnp n4BQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=nE54tmiDsnKsQusmU2kfw+Wu31P7rt65tLwJCDG9RhE=; b=vuWDczKL92ThCeCmTGxN5fldYPmNzPeP3D5XkBkjrOyninoxAS8wYj8HgA7XwiGpiL Iy48O1Z3/tn4MxgmxLDlDOj/OOmvB47d0asTxbxk6Q9yovreOGXrkIeeWfIjiu9xOi3A ESpEk2k+o0PdTSUXNJBEGAjb/93hb6zuIqa4Z1r+h4+bfnyhEVylejh4eHex+6OKgWNQ +W2d+F9hdoyGS4LqLro7hTrzR0TCxj8FeZbVVTn0CwA6baCo2hM2V0GpcvTiGL8xcBuH g3N1N33ZvaI6YmJKiJAPzOL0gosrEyNnJHTjBz5N1lIpWMgH9rKGHnq8z32fL/xg3skL Fevw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OstrpvlO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id c3-v6sm1102172itd.8.2018.09.11.14.50.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Sep 2018 14:50:01 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: alexander.shishkin@linux.intel.com, suzuki.poulose@arm.com, gregkh@linuxfoundation.org, kim.phillips@arm.com, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] coresight: Make link components aware of operation mode Date: Tue, 11 Sep 2018 15:49:52 -0600 Message-Id: <1536702595-9999-3-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> References: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Following what has been done for source and sinks, make link devices aware of the mode they are being operated from so that their verbosity can be controlled. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-dynamic-replicator.c | 4 ++-- drivers/hwtracing/coresight/coresight-funnel.c | 4 ++-- drivers/hwtracing/coresight/coresight-replicator.c | 4 ++-- drivers/hwtracing/coresight/coresight-tmc-etf.c | 4 ++-- drivers/hwtracing/coresight/coresight.c | 13 +++++++------ include/linux/coresight.h | 6 ++++-- 6 files changed, 19 insertions(+), 16 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c index ebb80438f6a5..de2c197886c6 100644 --- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c +++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c @@ -35,7 +35,7 @@ struct replicator_state { }; static int replicator_enable(struct coresight_device *csdev, int inport, - int outport) + int outport, u32 mode) { struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -61,7 +61,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, } static void replicator_disable(struct coresight_device *csdev, int inport, - int outport) + int outport, u32 mode) { struct replicator_state *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index ee7a30bf9480..c1c9f5fccc4b 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -59,7 +59,7 @@ static void funnel_enable_hw(struct funnel_drvdata *drvdata, int port) } static int funnel_enable(struct coresight_device *csdev, int inport, - int outport) + int outport, u32 mode) { struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -83,7 +83,7 @@ static void funnel_disable_hw(struct funnel_drvdata *drvdata, int inport) } static void funnel_disable(struct coresight_device *csdev, int inport, - int outport) + int outport, u32 mode) { struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index feac98315471..0b749302c066 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -31,7 +31,7 @@ struct replicator_drvdata { }; static int replicator_enable(struct coresight_device *csdev, int inport, - int outport) + int outport, u32 mode) { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -40,7 +40,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, } static void replicator_disable(struct coresight_device *csdev, int inport, - int outport) + int outport, u32 mode) { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 4156c95ce1bb..28b3ff830597 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -269,7 +269,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) } static int tmc_enable_etf_link(struct coresight_device *csdev, - int inport, int outport) + int inport, int outport, u32 mode) { unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -289,7 +289,7 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, } static void tmc_disable_etf_link(struct coresight_device *csdev, - int inport, int outport) + int inport, int outport, u32 mode) { unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index 118b435f0887..edfb7f8d2f0b 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -161,7 +161,7 @@ static void coresight_disable_sink(struct coresight_device *csdev) static int coresight_enable_link(struct coresight_device *csdev, struct coresight_device *parent, - struct coresight_device *child) + struct coresight_device *child, u32 mode) { int ret; int link_subtype; @@ -186,7 +186,8 @@ static int coresight_enable_link(struct coresight_device *csdev, if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { if (link_ops(csdev)->enable) { - ret = link_ops(csdev)->enable(csdev, inport, outport); + ret = link_ops(csdev)->enable(csdev, inport, + outport, mode); if (ret) return ret; } @@ -199,7 +200,7 @@ static int coresight_enable_link(struct coresight_device *csdev, static void coresight_disable_link(struct coresight_device *csdev, struct coresight_device *parent, - struct coresight_device *child) + struct coresight_device *child, u32 mode) { int i, nr_conns; int link_subtype; @@ -225,7 +226,7 @@ static void coresight_disable_link(struct coresight_device *csdev, if (atomic_dec_return(&csdev->refcnt[refport]) == 0) { if (link_ops(csdev)->disable) - link_ops(csdev)->disable(csdev, inport, outport); + link_ops(csdev)->disable(csdev, inport, outport, mode); } for (i = 0; i < nr_conns; i++) @@ -308,7 +309,7 @@ void coresight_disable_path(struct list_head *path, u32 mode) case CORESIGHT_DEV_TYPE_LINK: parent = list_prev_entry(nd, link)->csdev; child = list_next_entry(nd, link)->csdev; - coresight_disable_link(csdev, parent, child); + coresight_disable_link(csdev, parent, child, mode); break; default: break; @@ -357,7 +358,7 @@ int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) case CORESIGHT_DEV_TYPE_LINK: parent = list_prev_entry(nd, link)->csdev; child = list_next_entry(nd, link)->csdev; - ret = coresight_enable_link(csdev, parent, child); + ret = coresight_enable_link(csdev, parent, child, mode); if (ret) goto err; break; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 53535821dc25..8fc6f1e82c17 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -205,8 +205,10 @@ struct coresight_ops_sink { * @disable: disables flow between iport and oport. */ struct coresight_ops_link { - int (*enable)(struct coresight_device *csdev, int iport, int oport); - void (*disable)(struct coresight_device *csdev, int iport, int oport); + int (*enable)(struct coresight_device *csdev, + int iport, int oport, u32 mode); + void (*disable)(struct coresight_device *csdev, + int iport, int oport, u32 mode); }; /** From patchwork Tue Sep 11 21:49:53 2018 Content-Type: text/plain; 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id c3-v6sm1102172itd.8.2018.09.11.14.50.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Sep 2018 14:50:03 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: alexander.shishkin@linux.intel.com, suzuki.poulose@arm.com, gregkh@linuxfoundation.org, kim.phillips@arm.com, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] coresight: Make sink disable functions aware of operation mode Date: Tue, 11 Sep 2018 15:49:53 -0600 Message-Id: <1536702595-9999-4-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> References: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Make sink disable functions aware of the operation mode they are under so that log messages can be controlled. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 2 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +- drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +- drivers/hwtracing/coresight/coresight-tpiu.c | 2 +- drivers/hwtracing/coresight/coresight.c | 6 +++--- include/linux/coresight.h | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 08fa660098f8..79793cb51d82 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -305,7 +305,7 @@ static void etb_dump_hw(struct etb_drvdata *drvdata) CS_LOCK(drvdata->base); } -static void etb_disable(struct coresight_device *csdev) +static void etb_disable(struct coresight_device *csdev, u32 mode) { struct etb_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); unsigned long flags; diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 28b3ff830597..ce33c0f05148 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -246,7 +246,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, return 0; } -static void tmc_disable_etf_sink(struct coresight_device *csdev) +static void tmc_disable_etf_sink(struct coresight_device *csdev, u32 mode) { unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 56fea4ff947e..ec5100e7b7b9 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1364,7 +1364,7 @@ static int tmc_enable_etr_sink(struct coresight_device *csdev, return -EINVAL; } -static void tmc_disable_etr_sink(struct coresight_device *csdev) +static void tmc_disable_etr_sink(struct coresight_device *csdev, u32 mode) { unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index b2f72a1fa402..5f9fe97690fe 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -94,7 +94,7 @@ static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) CS_LOCK(drvdata->base); } -static void tpiu_disable(struct coresight_device *csdev) +static void tpiu_disable(struct coresight_device *csdev, u32 mode) { struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c index edfb7f8d2f0b..c19c2692b95e 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight.c @@ -149,11 +149,11 @@ static int coresight_enable_sink(struct coresight_device *csdev, return 0; } -static void coresight_disable_sink(struct coresight_device *csdev) +static void coresight_disable_sink(struct coresight_device *csdev, u32 mode) { if (atomic_dec_return(csdev->refcnt) == 0) { if (sink_ops(csdev)->disable) { - sink_ops(csdev)->disable(csdev); + sink_ops(csdev)->disable(csdev, mode); csdev->enable = false; } } @@ -301,7 +301,7 @@ void coresight_disable_path(struct list_head *path, u32 mode) switch (type) { case CORESIGHT_DEV_TYPE_SINK: - coresight_disable_sink(csdev); + coresight_disable_sink(csdev, mode); break; case CORESIGHT_DEV_TYPE_SOURCE: /* sources are disabled from either sysFS or Perf */ diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 8fc6f1e82c17..22bb0d4f1689 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -189,7 +189,7 @@ struct coresight_device { */ struct coresight_ops_sink { int (*enable)(struct coresight_device *csdev, u32 mode, void *data); - void (*disable)(struct coresight_device *csdev); + void (*disable)(struct coresight_device *csdev, u32 mode); void *(*alloc_buffer)(struct coresight_device *csdev, int cpu, void **pages, int nr_pages, bool overwrite); void (*free_buffer)(void *config); From patchwork Tue Sep 11 21:49:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 146487 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4097038ljw; Tue, 11 Sep 2018 14:50:10 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZeFQCRug81RpxWeZsvvO+sD03KIxmhgm24kEmiZManucGs4G1mUuJMkGR8IWI+wuem8dUP X-Received: by 2002:a63:b00f:: with SMTP id h15-v6mr30888545pgf.442.1536702610104; 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id c3-v6sm1102172itd.8.2018.09.11.14.50.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Sep 2018 14:50:05 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: alexander.shishkin@linux.intel.com, suzuki.poulose@arm.com, gregkh@linuxfoundation.org, kim.phillips@arm.com, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] coresight: Define macro to replace dev_dbg() boiler plate code Date: Tue, 11 Sep 2018 15:49:54 -0600 Message-Id: <1536702595-9999-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> References: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Using a macro is much better than repeating the same code everywhere in the drivers. That way it is easy to keep debug output messages confined to the sysFS mode of operation. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-priv.h | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index acfe67646a05..8a7a197cba69 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -7,6 +7,7 @@ #define _CORESIGHT_PRIV_H #include +#include #include #include #include @@ -74,6 +75,12 @@ enum cs_mode { CS_MODE_PERF, }; +#define coresight_dev_dbg(dev, mode, format, ...) \ +do { \ + if (mode == CS_MODE_SYSFS) \ + dev_dbg(dev, format, ##__VA_ARGS__); \ +} while (0) + /** * struct cs_buffer - keep track of a recording session' specifics * @cur: index of the current buffer From patchwork Tue Sep 11 21:49:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 146488 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp4097071ljw; Tue, 11 Sep 2018 14:50:13 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZiEreXdEKqvfO//c+QRZwSIhEnQAio4X+9MN+7X/6zZmkFV3nHCiGpWmxEog2T3+IszD0B X-Received: by 2002:a62:8ad1:: with SMTP id o78-v6mr31421190pfk.17.1536702612838; Tue, 11 Sep 2018 14:50:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536702612; cv=none; d=google.com; s=arc-20160816; b=pnX2dF82oKZhWO60bWFePekxNABaPS1c1Kn2UjyXXYsBTF9URwckXgNLg6w9B9VCG5 1uypahO+nSFK2Pp7UkDIei6rYqzvd58BIEGuVOAYOpGVsXv0mDsUh+w2+wv0G+JZAU3S bJ/MCwoEHPcPlBslWepJ5iP7lHCsbgSooDyziuAyFjsMLAZSB4GVBrcpMTSF4hHOnaMv y3y/9UIw7f7l7AkwORW0YQpmdXanAW5+/MCfTJwK6s8I8c0D4YtxcWVb8UqBE/oBy9qf OAPgBW3DBpvEnzgqrbCTfFJaWk5jGspY01WzNXoJsck5QpZYsTNBkraxascdGd6XeuLr emxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=vGL4ncAfWdu8umHJSr/bbvxZ4Nv5khHaZRs/kw+UujY=; b=IW7HhU8rEyYjXfGAjY5bi0pLeSYNF6lKtmpXQieaEEOyxR+MdmdyuN8ImhOCJOFYap VUH8a/QYG5xyAsBw5m4Bl1h72A7vadlEU+7svmw16n+pU00Mu2OxJAbgqIximql4QiM8 ICWaazmmQhag6eBdUto8sM/QYZgxB8nuZ2eeE5E+oY7SwLmvlHXDBZdz6B5Q2hmCTpca B6z4X8ofsO1vpUJGrRjpCvq9pGBhdKoSgE8XI7TG7sbcDd/rU3d3HEeGJlIg8Ablfdfd C+HwNrl0Y87AOkXzzB8CJqX7tXk79OT5cQYRm6+FX242rzaGacn661Wr4CjLYS7A7e7L gZIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CEhvUahi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id c3-v6sm1102172itd.8.2018.09.11.14.50.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 11 Sep 2018 14:50:07 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Cc: alexander.shishkin@linux.intel.com, suzuki.poulose@arm.com, gregkh@linuxfoundation.org, kim.phillips@arm.com, leo.yan@linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] coresight: Allow drivers to be verbose only in sysFS mode Date: Tue, 11 Sep 2018 15:49:55 -0600 Message-Id: <1536702595-9999-6-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> References: <1536702595-9999-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Debug messages emitted during perf sessions are useless and have an habit of triggering the lockdep mechanic. As such this patch confines driver output to the sysFS mode where the establishement of paths between source and sink happens outside of an atomic context. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-dynamic-replicator.c | 4 ++-- drivers/hwtracing/coresight/coresight-etb10.c | 6 +++--- drivers/hwtracing/coresight/coresight-etm3x.c | 7 +++++-- drivers/hwtracing/coresight/coresight-etm4x.c | 8 ++++++-- drivers/hwtracing/coresight/coresight-funnel.c | 6 ++++-- drivers/hwtracing/coresight/coresight-replicator.c | 4 ++-- drivers/hwtracing/coresight/coresight-stm.c | 2 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 8 ++++---- drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +- drivers/hwtracing/coresight/coresight-tpiu.c | 4 ++-- 10 files changed, 30 insertions(+), 21 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c index de2c197886c6..ea7b19aac94c 100644 --- a/drivers/hwtracing/coresight/coresight-dynamic-replicator.c +++ b/drivers/hwtracing/coresight/coresight-dynamic-replicator.c @@ -56,7 +56,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "REPLICATOR enabled\n"); return 0; } @@ -75,7 +75,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport, CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "REPLICATOR disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "REPLICATOR disabled\n"); } static const struct coresight_ops_link replicator_link_ops = { diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index 79793cb51d82..78b4669e7dc7 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -211,7 +211,7 @@ static int etb_enable(struct coresight_device *csdev, u32 mode, void *data) if (ret) return ret; - dev_dbg(drvdata->dev, "ETB enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "ETB enabled\n"); return 0; } @@ -320,7 +320,7 @@ static void etb_disable(struct coresight_device *csdev, u32 mode) } spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "ETB disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "ETB disabled\n"); } static void *etb_alloc_buffer(struct coresight_device *csdev, int cpu, @@ -532,7 +532,7 @@ static void etb_dump(struct etb_drvdata *drvdata) } spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "ETB dumped\n"); + coresight_dev_dbg(drvdata->dev, drvdata->mode, "ETB dumped\n"); } static int etb_open(struct inode *inode, struct file *file) diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index 9ce8fba20b0f..f9e40078422e 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -358,10 +358,12 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata, static void etm_enable_hw(void *info) { int i; - u32 etmcr; + u32 etmcr, mode; struct etm_drvdata *drvdata = info; struct etm_config *config = &drvdata->config; + mode = local_read(&drvdata->mode); + CS_UNLOCK(drvdata->base); /* Turn engine on */ @@ -420,7 +422,8 @@ static void etm_enable_hw(void *info) etm_clr_prog(drvdata); CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); + coresight_dev_dbg(drvdata->dev, mode, + "cpu: %d enable smp call done\n", drvdata->cpu); } static int etm_cpu_id(struct coresight_device *csdev) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index b7379e9cfb30..70519fea3c41 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -83,6 +83,7 @@ static void etm4_enable_hw(void *info) int i; struct etmv4_drvdata *drvdata = info; struct etmv4_config *config = &drvdata->config; + u32 mode = local_read(&drvdata->mode); CS_UNLOCK(drvdata->base); @@ -177,7 +178,8 @@ static void etm4_enable_hw(void *info) CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu); + coresight_dev_dbg(drvdata->dev, mode, + "cpu: %d enable smp call done\n", drvdata->cpu); } static int etm4_parse_event_config(struct etmv4_drvdata *drvdata, @@ -311,6 +313,7 @@ static void etm4_disable_hw(void *info) { u32 control; struct etmv4_drvdata *drvdata = info; + u32 mode = local_read(&drvdata->mode); CS_UNLOCK(drvdata->base); @@ -331,7 +334,8 @@ static void etm4_disable_hw(void *info) CS_LOCK(drvdata->base); - dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu); + coresight_dev_dbg(drvdata->dev, mode, + "cpu: %d disable smp call done\n", drvdata->cpu); } static int etm4_disable_perf(struct coresight_device *csdev, diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c index c1c9f5fccc4b..cc7a424cf676 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -65,7 +65,8 @@ static int funnel_enable(struct coresight_device *csdev, int inport, funnel_enable_hw(drvdata, inport); - dev_dbg(drvdata->dev, "FUNNEL inport %d enabled\n", inport); + coresight_dev_dbg(drvdata->dev, mode, + "FUNNEL inport %d enabled\n", inport); return 0; } @@ -89,7 +90,8 @@ static void funnel_disable(struct coresight_device *csdev, int inport, funnel_disable_hw(drvdata, inport); - dev_dbg(drvdata->dev, "FUNNEL inport %d disabled\n", inport); + coresight_dev_dbg(drvdata->dev, mode, + "FUNNEL inport %d disabled\n", inport); } static const struct coresight_ops_link funnel_link_ops = { diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c index 0b749302c066..c81bbd5adf13 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -35,7 +35,7 @@ static int replicator_enable(struct coresight_device *csdev, int inport, { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - dev_dbg(drvdata->dev, "REPLICATOR enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "REPLICATOR enabled\n"); return 0; } @@ -44,7 +44,7 @@ static void replicator_disable(struct coresight_device *csdev, int inport, { struct replicator_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - dev_dbg(drvdata->dev, "REPLICATOR disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "REPLICATOR disabled\n"); } static const struct coresight_ops_link replicator_link_ops = { diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c index 35d6f9709274..40bdcada696b 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -211,7 +211,7 @@ static int stm_enable(struct coresight_device *csdev, stm_enable_hw(drvdata); spin_unlock(&drvdata->spinlock); - dev_dbg(drvdata->dev, "STM tracing enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "STM tracing enabled\n"); return 0; } diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index ce33c0f05148..ea8334f70ca7 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -242,7 +242,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, if (ret) return ret; - dev_dbg(drvdata->dev, "TMC-ETB/ETF enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TMC-ETB/ETF enabled\n"); return 0; } @@ -265,7 +265,7 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev, u32 mode) spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "TMC-ETB/ETF disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TMC-ETB/ETF disabled\n"); } static int tmc_enable_etf_link(struct coresight_device *csdev, @@ -284,7 +284,7 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, drvdata->mode = CS_MODE_SYSFS; spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "TMC-ETF enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TMC-ETF enabled\n"); return 0; } @@ -304,7 +304,7 @@ static void tmc_disable_etf_link(struct coresight_device *csdev, drvdata->mode = CS_MODE_DISABLED; spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "TMC-ETF disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TMC-ETF disabled\n"); } static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu, diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index ec5100e7b7b9..51af305244d2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1383,7 +1383,7 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev, u32 mode) spin_unlock_irqrestore(&drvdata->spinlock, flags); - dev_dbg(drvdata->dev, "TMC-ETR disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TMC-ETR disabled\n"); } static const struct coresight_ops_sink tmc_etr_sink_ops = { diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 5f9fe97690fe..dc78c3ae2218 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -74,7 +74,7 @@ static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused) tpiu_enable_hw(drvdata); - dev_dbg(drvdata->dev, "TPIU enabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TPIU enabled\n"); return 0; } @@ -100,7 +100,7 @@ static void tpiu_disable(struct coresight_device *csdev, u32 mode) tpiu_disable_hw(drvdata); - dev_dbg(drvdata->dev, "TPIU disabled\n"); + coresight_dev_dbg(drvdata->dev, mode, "TPIU disabled\n"); } static const struct coresight_ops_sink tpiu_sink_ops = {