From patchwork Fri Aug 27 08:21:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503377 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1039787jab; Fri, 27 Aug 2021 01:21:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzNjA4nMvsvukKG1wwGqXIJ5LoMCa8KUPWNDn9ltTiMQ+bcAwnCQ270hbzgnKr04xA4xhly X-Received: by 2002:a17:906:1e97:: with SMTP id e23mr8840286ejj.336.1630052500004; Fri, 27 Aug 2021 01:21:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630052500; cv=none; d=google.com; s=arc-20160816; b=OVs9fc+fDz10cP1a8LILwNd8Djloxzk2Oc/Iw703Ydou1HMKqk1PQIJ7LI2C/fbSQT etagO1Gm2V69eqmAM0r7Gt6g7fGR2T0zXgMTxYtuePdEZhy/1ICt/+HlzmhP4Y9TWSGl axkRRMH7BBdPw+lWOn3qnpyg3YHiL2TvTQMmbbcl61dZDRrXnvCNHBvW4yV8pf5J7Vhu K2AsbKjYHoh3Vl0AcXSt2wZKk5SQprEByNAtPulh0ElBzYjzA5hSeFk1Fg/U80Kh3Lsq VnXdUC89i56nSa9tn6UfBw9ZlYlOClWT6qV8Tu9uqGLKDllrOLS6/9r4SHaiFpv21WSv xyJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4quR9ThIRPYQbS8Ifbodvt1W0T6Q/h5o2e7waNnSENc=; b=t8JYAYueX+THg0rJ+omKaxEFUttTTXQpR1Ir3HDH3hrkQ54Mst1U5qmYb55oxKNOxr 1IXx5Fra/UMKn555seZgzpr2Aj8ygcDay9PqipSnNyvBlQkdXloqoVVzn9kENd8k/Rci ROWeNtLANIUHKlTvGi4tl6aYLFiofJQTCiGEbGo3R5RMHrGZ093PmDCV8E8NJlun0HOI cI2azP3PhySYx/2Do4BjdioFwWj5B5oMuIZTPH3GRh0WPt7CEfDtZN9WJj/BqYKkCi55 Y5ybRkK1gErgMAnCGT0gfdbC3+HVQppOwfPnol4QvjYn1Fl7YYCs+FSQl0WvPxxvK7RB pZ0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FlLhaZow; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id y1sm5177725wmq.43.2021.08.27.01.21.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 01:21:36 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH 1/5] usb: isp1760: fix memory pool initialization Date: Fri, 27 Aug 2021 09:21:08 +0100 Message-Id: <20210827082112.4061086-2-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827082112.4061086-1-rui.silva@linaro.org> References: <20210827082112.4061086-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The loops to setup the memory pool were skipping some blocks, that was not visible on the ISP1763 because it has fewer blocks than the ISP1761. But won testing on that IP from the family that would be an issue. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva --- drivers/usb/isp1760/isp1760-hcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index bf8ab3fe2e5a..b3a55c5d2155 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -588,8 +588,8 @@ static void init_memory(struct isp1760_hcd *priv) payload_addr = PAYLOAD_OFFSET; - for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++) { - for (j = 0; j < mem->blocks[i]; j++, curr++) { + for (i = 0, curr = 0; i < ARRAY_SIZE(mem->blocks); i++, curr += j) { + for (j = 0; j < mem->blocks[i]; j++) { priv->memory_pool[curr + j].start = payload_addr; priv->memory_pool[curr + j].size = mem->blocks_size[i]; priv->memory_pool[curr + j].free = 1; From patchwork Fri Aug 27 08:21:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503378 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1039830jab; Fri, 27 Aug 2021 01:21:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJznoi/WUWZbjMOsyeSZgn4EhHDBHzSA/ZOCWPtGM8ANSpugr6BlgVGyeg0E6sgklxEeMTFr X-Received: by 2002:a05:6402:17d6:: with SMTP id s22mr8668606edy.185.1630052503645; Fri, 27 Aug 2021 01:21:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630052503; cv=none; d=google.com; s=arc-20160816; b=f+FYya7UTpcEZsKZzgHMO/H2m9UE4qJT/nJSeXnh00xdj2gQQWxCU1dF6V4p/UIIRs CxwokwDoccmEjTFrd3mhMyINKZJA6aEQcD1VAT/oRxCvf2uc6tFyn6kTOeMEl3NBWK7M CyE3dEtze79Cib8bHo+dEBC6FeNJlahMXt/VToQpfXWgGswrETHCfgUbrPMSixB4tEh4 jbSHJ3qv49PskbuOofEPuZsrIIQX+2zd9J63e1sSEUcoLqisTDtqNq49/iLVT7fHgPSn meSG1EsdW+iMejup7WASdlDVuQJb/BYjCUoOWVanqCS4pUvzG/WuWd7Mi2WhBSZqLZwh HKTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=62h6uRc5/FuReu7rXAOF6mghumi9ejQXLtu8FgRmxU8=; b=V/ukfysih4MTTjU+qvlzBtVMHwcmDVzhdqegOB1/JLZlKYKHv0GNPm67sH3S+rJssV REKkao3XBA6Zdof7mdjtpowc0YyBGzrdKO6kQT+P2upKbopbB+esO6Ek5vRExy3rxxhp iafp8wAEpWVlUpe+2TOXR4KZvY3P6TLIHt+5w2xOOJYEaxZyJ6k0p+onlIwZrrZQmng5 rcnrqcal1qusaVrW79o21bKljaFfau/yllFgH43K+Z559RHOTIm+17go8kBjmYK4m/hS PkDUrCFI/jNKNVAvyxHLO9p6IcXzjnHgYhVsFXEYw0V3BquD0o+Q/5IzIlbqzn6c0GYZ GjpQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Hgm8OaMB; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id y1sm5177725wmq.43.2021.08.27.01.21.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 01:21:38 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH 2/5] usb: isp1760: fix qtd fill length Date: Fri, 27 Aug 2021 09:21:09 +0100 Message-Id: <20210827082112.4061086-3-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827082112.4061086-1-rui.silva@linaro.org> References: <20210827082112.4061086-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org When trying to send bulks bigger than the biggest block size we need to split them over several qtd. Fix this limiting the maximum qtd size to largest block size. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva --- drivers/usb/isp1760/isp1760-hcd.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index b3a55c5d2155..fba21122bb00 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -1829,9 +1829,11 @@ static void packetize_urb(struct usb_hcd *hcd, goto cleanup; if (len > mem->blocks_size[ISP176x_BLOCK_NUM - 1]) - len = mem->blocks_size[ISP176x_BLOCK_NUM - 1]; + this_qtd_len = mem->blocks_size[ISP176x_BLOCK_NUM - 1]; + else + this_qtd_len = len; - this_qtd_len = qtd_fill(qtd, buf, len); + this_qtd_len = qtd_fill(qtd, buf, this_qtd_len); list_add_tail(&qtd->qtd_list, head); len -= this_qtd_len; From patchwork Fri Aug 27 08:21:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503379 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1039840jab; Fri, 27 Aug 2021 01:21:45 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyBkDqy+kVyxcEtb9WFd6Cy3bo1sXRAplYL2gfzNEu7oLSiiV/uGjsGKptBmI8UwV0KhYJm X-Received: by 2002:a17:906:f743:: with SMTP id jp3mr8747925ejb.120.1630052505056; Fri, 27 Aug 2021 01:21:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630052505; cv=none; d=google.com; s=arc-20160816; b=YTgqPQQQUvgE1boX/rPMMpGpi/BAzpNGLWHBCVkUjT0eLyS71mJ/SczXGdvjfqeU/u EaC9Vd189YFiOQs33+ZHdQHm7eQEmv7OCQeSefoATEspKHW945yz6spxZlwlOfAwNHHU 6sl4o8+oB26f7T87JOL/bClfGPlA/ei+9QPzY+XT1sYrqkEYi7tYkGpFtKHFysmCteNg Sc0WvwqPHbEAm4FZljgGMeFRZ8+GodX0exuK2g0ZBL7Ixvtpp5pU6TcfC0mr343NnaMm x8XFEa75VcU1i2rXPEZV5T8j53kDSkWbmAbjzTfQ9qsLqX2happN7kjoYNpt0dFXWeSO tdLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hVN7+WYKw5ehbGOTNFR03zlpLUZf6H/LQjHEF8RLkdo=; b=aJdvcZjh61XEEV5wv6vmoui1Y7TRDsS/AVCTUnkyjastVuK8IsHFMmc+4PKoi3dZoN ulkwlzHHIwla+L+MwX2u14gLck4sa72J3Gj1csf1t+TWyG8n67SzcUdiZFIcyd2Oog+G HuXAEFt9Oabz2uGftZcSCEvHqQPwGVpqfU8c5eAnL1sB8cjRCtohHH5S6LZArnMQq9pk uY6l7gmON3+vGcv/rTSHSNpVV8/GtCHRWjEJc+TxJ8sP/M14aWfGYkXB2LOxeTvFJkvt narWr47QddjADdLgxT/bm4jxGp+kZuQQ1oa90haW63y3XXHXOSkCuc6vw69JqtupaXBR 1ppA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eXgF4xvu; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id y1sm5177725wmq.43.2021.08.27.01.21.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 01:21:40 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH 3/5] usb: isp1760: write to status and address register Date: Fri, 27 Aug 2021 09:21:10 +0100 Message-Id: <20210827082112.4061086-4-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827082112.4061086-1-rui.silva@linaro.org> References: <20210827082112.4061086-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org We were already writing directly the port status register to trigger changes in isp1763. The same is needed in other IP from the family, including also to setup the read address before reading from device. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva --- drivers/usb/isp1760/isp1760-hcd.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c index fba21122bb00..79d571f1429b 100644 --- a/drivers/usb/isp1760/isp1760-hcd.c +++ b/drivers/usb/isp1760/isp1760-hcd.c @@ -182,7 +182,7 @@ struct urb_listitem { struct urb *urb; }; -static const u32 isp1763_hc_portsc1_fields[] = { +static const u32 isp176x_hc_portsc1_fields[] = { [PORT_OWNER] = BIT(13), [PORT_POWER] = BIT(12), [PORT_LSTATUS] = BIT(10), @@ -205,27 +205,28 @@ static u32 isp1760_hcd_read(struct usb_hcd *hcd, u32 field) } /* - * We need, in isp1763, to write directly the values to the portsc1 + * We need, in isp176x, to write directly the values to the portsc1 * register so it will make the other values to trigger. */ static void isp1760_hcd_portsc1_set_clear(struct isp1760_hcd *priv, u32 field, u32 val) { - u32 bit = isp1763_hc_portsc1_fields[field]; - u32 port_status = readl(priv->base + ISP1763_HC_PORTSC1); + u32 bit = isp176x_hc_portsc1_fields[field]; + u16 portsc1_reg = priv->is_isp1763 ? ISP1763_HC_PORTSC1 : + ISP176x_HC_PORTSC1; + u32 port_status = readl(priv->base + portsc1_reg); if (val) - writel(port_status | bit, priv->base + ISP1763_HC_PORTSC1); + writel(port_status | bit, priv->base + portsc1_reg); else - writel(port_status & ~bit, priv->base + ISP1763_HC_PORTSC1); + writel(port_status & ~bit, priv->base + portsc1_reg); } static void isp1760_hcd_write(struct usb_hcd *hcd, u32 field, u32 val) { struct isp1760_hcd *priv = hcd_to_priv(hcd); - if (unlikely(priv->is_isp1763 && - (field >= PORT_OWNER && field <= PORT_CONNECT))) + if (unlikely((field >= PORT_OWNER && field <= PORT_CONNECT))) return isp1760_hcd_portsc1_set_clear(priv, field, val); isp1760_field_write(priv->fields, field, val); @@ -367,8 +368,7 @@ static void isp1760_mem_read(struct usb_hcd *hcd, u32 src_offset, void *dst, { struct isp1760_hcd *priv = hcd_to_priv(hcd); - isp1760_hcd_write(hcd, MEM_BANK_SEL, ISP_BANK_0); - isp1760_hcd_write(hcd, MEM_START_ADDR, src_offset); + isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); ndelay(100); bank_reads8(priv->base, src_offset, ISP_BANK_0, dst, bytes); @@ -496,8 +496,7 @@ static void isp1760_ptd_read(struct usb_hcd *hcd, u32 ptd_offset, u32 slot, u16 src_offset = ptd_offset + slot * sizeof(*ptd); struct isp1760_hcd *priv = hcd_to_priv(hcd); - isp1760_hcd_write(hcd, MEM_BANK_SEL, ISP_BANK_0); - isp1760_hcd_write(hcd, MEM_START_ADDR, src_offset); + isp1760_reg_write(priv->regs, ISP176x_HC_MEMORY, src_offset); ndelay(90); bank_reads8(priv->base, src_offset, ISP_BANK_0, (void *)ptd, From patchwork Fri Aug 27 08:21:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503380 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1039846jab; Fri, 27 Aug 2021 01:21:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxZnQdJ1Frr4QIRr0HQUJfjZGKfgGDrau5AAAgH+G+kxN8WUIWeqJ2bmkV1RGhIiLhB7RMN X-Received: by 2002:a05:6402:c05:: with SMTP id co5mr9020868edb.41.1630052506258; Fri, 27 Aug 2021 01:21:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630052506; cv=none; d=google.com; s=arc-20160816; b=EeDw+qKYPtntH43b3e59ZYSBdXY6MzYRbeY+eWX9N8VB6PrTNIW61czy/oreTpEYK1 /Ww4GVm49j5WCcRbkfMURz+gcObJpV6giDU0nkul9rf5oopniO5BCFC1On3JPtfRpasr 61PJXwEsPOtP6B7SyFuThP+gIEfANzsjC9aby9/ikIlz1d3Rpdn8v68f8lX3FBaiQ9a8 5vCPfrZ8jtQshyiPcSkO8PZ2wZ2QCdHKV7kBSvm0LzaW7UsK7GnvGCmgh/Ne0N3mbxbh 3zg34PG6MLlvjsaVfXV73Ha94RZVDDPao80fasigbKnsLxrdWEN42VIXRAQeJeeLdKkn CMWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UgrjwbZBiK8ATFB/HhkR7RlMrnctExRtLTvENDbdq94=; b=tdh7ZEbFLgxUn5aMVz0eUp5M4gGsz2vOOfD1bMDFpzDWnZhaVtPvzmTXmYr8KmBF/O YCYi6j63XYUUZ6eg87t84r8BvPsyOiQjf58OMKVz+ukbTl7U0XltY+6eYQnwlshqtqBw OkfusPYrOSCE52f2oJlakERoJD/UpkGEYx4uB6NaipbPxlOM5jO5R6YUBlNRleXXti3F QolTpILmEQAcJYKTa9ZXK2dgxt5I5fBpzvANFBOr5J8/HBiMCRPxkT4irLz/S9r2hZl/ 3m5YH56kmCfWhoqTJJirGeAHX2AkMSMKij5evQir5ynMmkpZJa1EP85WIseNvO7JjFTW iTcA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RKKrGWkE; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id y1sm5177725wmq.43.2021.08.27.01.21.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 01:21:42 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH 4/5] usb: isp1760: use the right irq status bit Date: Fri, 27 Aug 2021 09:21:11 +0100 Message-Id: <20210827082112.4061086-5-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827082112.4061086-1-rui.silva@linaro.org> References: <20210827082112.4061086-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Instead of using the fields enum values to check interrupts trigged, use the correct bit values. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva --- drivers/usb/isp1760/isp1760-udc.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-udc.c b/drivers/usb/isp1760/isp1760-udc.c index a78da59d6417..5cafd23345ca 100644 --- a/drivers/usb/isp1760/isp1760-udc.c +++ b/drivers/usb/isp1760/isp1760-udc.c @@ -1363,7 +1363,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) status = isp1760_udc_irq_get_status(udc); - if (status & DC_IEVBUS) { + if (status & ISP176x_DC_IEVBUS) { dev_dbg(udc->isp->dev, "%s(VBUS)\n", __func__); /* The VBUS interrupt is only triggered when VBUS appears. */ spin_lock(&udc->lock); @@ -1371,7 +1371,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) spin_unlock(&udc->lock); } - if (status & DC_IEBRST) { + if (status & ISP176x_DC_IEBRST) { dev_dbg(udc->isp->dev, "%s(BRST)\n", __func__); isp1760_udc_reset(udc); @@ -1391,18 +1391,18 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) } } - if (status & DC_IEP0SETUP) { + if (status & ISP176x_DC_IEP0SETUP) { dev_dbg(udc->isp->dev, "%s(EP0SETUP)\n", __func__); isp1760_ep0_setup(udc); } - if (status & DC_IERESM) { + if (status & ISP176x_DC_IERESM) { dev_dbg(udc->isp->dev, "%s(RESM)\n", __func__); isp1760_udc_resume(udc); } - if (status & DC_IESUSP) { + if (status & ISP176x_DC_IESUSP) { dev_dbg(udc->isp->dev, "%s(SUSP)\n", __func__); spin_lock(&udc->lock); @@ -1413,7 +1413,7 @@ static irqreturn_t isp1760_udc_irq(int irq, void *dev) spin_unlock(&udc->lock); } - if (status & DC_IEHS_STA) { + if (status & ISP176x_DC_IEHS_STA) { dev_dbg(udc->isp->dev, "%s(HS_STA)\n", __func__); udc->gadget.speed = USB_SPEED_HIGH; } From patchwork Fri Aug 27 08:21:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rui Miguel Silva X-Patchwork-Id: 503381 Delivered-To: patch@linaro.org Received: by 2002:a02:6f15:0:0:0:0:0 with SMTP id x21csp1039946jab; Fri, 27 Aug 2021 01:21:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw3LK3fkFiu9uEnZiPxyLJriGwZN1rd+bd9QqGgWGu94dtFxyMwrWjbFET06YOesybN9YXK X-Received: by 2002:a17:907:7785:: with SMTP id ky5mr8729675ejc.247.1630052516735; Fri, 27 Aug 2021 01:21:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630052516; cv=none; d=google.com; s=arc-20160816; b=vOwL+MltCO6IjiQUa3IBMGTRIYximwEPW4BSPR6FDBpSJgUT31xjpl5sLqB9E5C87y rJZjCGzqNJ90ESxaDh2hM0gn1t//0lAjaKB4gTZje7aqgL1eMYyJPEdk1fDwz92mvBdr OMx57CRhsew+M9WjPpz7bQxvJ6fIUhxDXyuanwZOuhiArSRc5wdXIGOe5YexuhCxo5C8 FjPTLglOBC+UrQ2T3kDKxrfWmRv7tgnexsbJlDEXwmZ/4GKBqImc6ypdvTqP/5yqJPD3 ejDsHC9dzaN7s3HHsxZVhziKD8ieulj0Rhlhxdw12p3mVLBIwwCHdPeiUe3u1HNf9nw6 QMGg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rs/w3LseSCZMgtl9DEAeqhdBI4OvMLQ8zIKd5t9nH/8=; b=JRuQzRGc2agAGTY9FXvIZXaGRyeGt4hByEfXsV8qUlhQLOH4BSXY93Kg3eaM67oNdA Wy7fXBCU6qFf/txO5w5V4v9+TM0fQpof6v1i5qEFcpcCN3gAtDxF00PNmHvfYu9Z0p2M 6oU22A4YTI+erD+HLFsvUe+DHdsmujf4qxKh1bhs69WhkF39yHXmSA9W+XrR24fxEB9U nvCEUkMXuGsPQE9jbGpi5Q54ngOec8Cji/Td302nQdxexAnVFk3bxmQwXAciBXA1Q612 7kMDML5bMkr0sVRb8jSHcUZPYCW80eoJOpwJZwUQw1BQSJErYov76hwKNmsBvNpwObnn LVgQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cEz1BHHv; spf=pass (google.com: domain of linux-usb-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-usb-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[109.49.46.234]) by smtp.gmail.com with ESMTPSA id y1sm5177725wmq.43.2021.08.27.01.21.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 01:21:44 -0700 (PDT) From: Rui Miguel Silva To: Greg Kroah-Hartman , Dietmar Eggemann Cc: linux-usb@vger.kernel.org, Rui Miguel Silva Subject: [PATCH 5/5] usb: isp1760: otg control register access Date: Fri, 27 Aug 2021 09:21:12 +0100 Message-Id: <20210827082112.4061086-6-rui.silva@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210827082112.4061086-1-rui.silva@linaro.org> References: <20210827082112.4061086-1-rui.silva@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The set/clear of the otg control values is done writing to two different 16bit registers, however we setup the regmap width for isp1760/61 to 32bit value bits. So, just access the clear register address (0x376)as the high part of the otg control register set (0x374), and write the values in one go to make sure they get clear/set. Reported-by: Dietmar Eggemann Signed-off-by: Rui Miguel Silva --- drivers/usb/isp1760/isp1760-core.c | 50 ++++++++++++++++-------------- drivers/usb/isp1760/isp1760-regs.h | 16 ++++++++++ 2 files changed, 42 insertions(+), 24 deletions(-) -- 2.33.0 diff --git a/drivers/usb/isp1760/isp1760-core.c b/drivers/usb/isp1760/isp1760-core.c index cb70f9d63cdd..d1d9a7d5da17 100644 --- a/drivers/usb/isp1760/isp1760-core.c +++ b/drivers/usb/isp1760/isp1760-core.c @@ -30,6 +30,7 @@ static int isp1760_init_core(struct isp1760_device *isp) { struct isp1760_hcd *hcd = &isp->hcd; struct isp1760_udc *udc = &isp->udc; + u32 otg_ctrl; /* Low-level chip reset */ if (isp->rst_gpio) { @@ -83,16 +84,17 @@ static int isp1760_init_core(struct isp1760_device *isp) * * TODO: Really support OTG. For now we configure port 1 in device mode */ - if (((isp->devflags & ISP1760_FLAG_ISP1761) || - (isp->devflags & ISP1760_FLAG_ISP1763)) && - (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) { - isp1760_field_set(hcd->fields, HW_DM_PULLDOWN); - isp1760_field_set(hcd->fields, HW_DP_PULLDOWN); - isp1760_field_set(hcd->fields, HW_OTG_DISABLE); - } else { - isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC); - isp1760_field_set(hcd->fields, HW_VBUS_DRV); - isp1760_field_set(hcd->fields, HW_SEL_CP_EXT); + if (isp->devflags & ISP1760_FLAG_ISP1761) { + if (isp->devflags & ISP1760_FLAG_PERIPHERAL_EN) { + otg_ctrl = (ISP176x_HW_DM_PULLDOWN_CLEAR | + ISP176x_HW_DP_PULLDOWN_CLEAR | + ISP176x_HW_OTG_DISABLE); + } else { + otg_ctrl = (ISP176x_HW_SW_SEL_HC_DC_CLEAR | + ISP176x_HW_VBUS_DRV | + ISP176x_HW_SEL_CP_EXT); + } + isp1760_reg_write(hcd->regs, ISP176x_HC_OTG_CTRL, otg_ctrl); } dev_info(isp->dev, "%s bus width: %u, oc: %s\n", @@ -235,20 +237,20 @@ static const struct reg_field isp1760_hc_reg_fields[] = { [HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31), [HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31), [HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31), - [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 10, 10), - [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 7, 7), - [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 4, 4), - [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 3, 3), - [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 2, 2), - [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 1, 1), - [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 0, 0), - [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 10, 10), - [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 7, 7), - [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 4, 4), - [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 3, 3), - [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 2, 2), - [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 1, 1), - [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 0, 0), + [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 26, 26), + [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 23, 23), + [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 20, 20), + [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 19, 19), + [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 18, 18), + [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 17, 17), + [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL, 16, 16), + [HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL, 10, 10), + [HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL, 7, 7), + [HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL, 4, 4), + [HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL, 3, 3), + [HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 2, 2), + [HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL, 1, 1), + [HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL, 0, 0), }; static const struct reg_field isp1763_hc_reg_fields[] = { diff --git a/drivers/usb/isp1760/isp1760-regs.h b/drivers/usb/isp1760/isp1760-regs.h index 94ea60c20b2a..3a6751197e97 100644 --- a/drivers/usb/isp1760/isp1760-regs.h +++ b/drivers/usb/isp1760/isp1760-regs.h @@ -61,6 +61,7 @@ #define ISP176x_HC_INT_IRQ_MASK_AND 0x328 #define ISP176x_HC_ATL_IRQ_MASK_AND 0x32c +#define ISP176x_HC_OTG_CTRL 0x374 #define ISP176x_HC_OTG_CTRL_SET 0x374 #define ISP176x_HC_OTG_CTRL_CLEAR 0x376 @@ -179,6 +180,21 @@ enum isp176x_host_controller_fields { #define ISP176x_DC_IESUSP BIT(3) #define ISP176x_DC_IEBRST BIT(0) +#define ISP176x_HW_OTG_DISABLE_CLEAR BIT(26) +#define ISP176x_HW_SW_SEL_HC_DC_CLEAR BIT(23) +#define ISP176x_HW_VBUS_DRV_CLEAR BIT(20) +#define ISP176x_HW_SEL_CP_EXT_CLEAR BIT(19) +#define ISP176x_HW_DM_PULLDOWN_CLEAR BIT(18) +#define ISP176x_HW_DP_PULLDOWN_CLEAR BIT(17) +#define ISP176x_HW_DP_PULLUP_CLEAR BIT(16) +#define ISP176x_HW_OTG_DISABLE BIT(10) +#define ISP176x_HW_SW_SEL_HC_DC BIT(7) +#define ISP176x_HW_VBUS_DRV BIT(4) +#define ISP176x_HW_SEL_CP_EXT BIT(3) +#define ISP176x_HW_DM_PULLDOWN BIT(2) +#define ISP176x_HW_DP_PULLDOWN BIT(1) +#define ISP176x_HW_DP_PULLUP BIT(0) + #define ISP176x_DC_ENDPTYP_ISOC 0x01 #define ISP176x_DC_ENDPTYP_BULK 0x02 #define ISP176x_DC_ENDPTYP_INTERRUPT 0x03