From patchwork Thu Oct 11 16:41:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 148651 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp2348678lji; Thu, 11 Oct 2018 09:42:07 -0700 (PDT) X-Google-Smtp-Source: ACcGV63HLROl1CsyFWP49HDN5BG4D6oyxNNk/lyl1XNOLkmE472ZcwlVRnrWYJmwWygIzyMU/anI X-Received: by 2002:a63:ef53:: with SMTP id c19-v6mr2092066pgk.386.1539276127227; Thu, 11 Oct 2018 09:42:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539276127; cv=none; d=google.com; s=arc-20160816; b=hub1qcw71q2AXAty4jlbeN0MEetQ5y/yDhaxjZSTZ79GYrEXCJxN4FuWn/NEhLB02C CUMaxTDDmsDiM9wVGr8xboc+qrbaKGMxTG1t5liDpiEjnNfPcfoUzT22qxCa3ls5BIOd JIavggK3Q1UgPWA1wQDUyrKnm8mFF91jmzwtCu0ACqd74RCSVNL1+BhGBy4xhLw9C6d6 GRq3IQrRTUftctwq4Xtlx1hRfcm0t5AbVDr/ycETOGfY6DFZ7sYFZw0F8Gaw2Eet5oWn KTZFf/ibHdxolH+ne/yng3qELxNypptd/IIlJRAoFKtiesVr1kCPOUo2nPUA9TyIU7Uk hsIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=iRhBghOfbe1mUlmrIyQZV10oc98t0c1hQwHeiRi6HsU=; b=V4drMjOHYNCXAoJlahUj75hlDj2mgaRF0hut1lKOatwiFn8yBlwhDIgIGcVS6fjjz3 Or01mNjlbhU3Ms5U6zShHUyJdkkEJBBKiLKWTJbDwZ4SdWyTyFEHnmsosRhbDMDbR2wJ 8RRDjN2tpoX0C473EVmRgz+y1CPYg1zJK2IlkOGr25h4yeifF23P9VKxtS4EcENsL0c/ z6tZJ+p69BRc6/MYm+NeRfRC9UkeN5JALBl73yseXIEce/DEQp9gaZQ/M5ieKi3pEVaf dEH3RrfV1Uik9BUFvBZExhzPw+5bd2EZfRJkA2Ns0uJYL22D7S5LqDFqqzqxFVfWdFPz +4Ug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=EfFAIugu; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s13-v6si31244368pfc.149.2018.10.11.09.42.07; Thu, 11 Oct 2018 09:42:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=EfFAIugu; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730016AbeJLAKG (ORCPT + 3 others); Thu, 11 Oct 2018 20:10:06 -0400 Received: from conuserg-07.nifty.com ([210.131.2.74]:49999 "EHLO conuserg-07.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729948AbeJLAKG (ORCPT ); Thu, 11 Oct 2018 20:10:06 -0400 Received: from grover.tkatk1.zaq.ne.jp (zaqdadce369.zaq.ne.jp [218.220.227.105]) (authenticated) by conuserg-07.nifty.com with ESMTP id w9BGf9b9007909; Fri, 12 Oct 2018 01:41:11 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-07.nifty.com w9BGf9b9007909 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1539276071; bh=iRhBghOfbe1mUlmrIyQZV10oc98t0c1hQwHeiRi6HsU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EfFAIugur5+P/yKOZcFwMDRzefKTFFO9URQvQ68zHeOc7grCmOmw0/RldHxpLkB0k cHFKwlGbmXEr0yiZtpg96aJ661SUHq6Dh4XQjwtrafmaE7f5HWAobo5gm8UIHXy67U ZIkWJPsuTuQUvGpgUjjDVlZ4butc6D4h6f4DoVrJIqtmNCC3G49yLNIg3Ev7rSOqyA +8a6cMoNBt1XZeqjpm4OnijzJTWGIiiWelKrkNRzt4BCZ5F3rTvKu9zkL66RrfJCG1 GNxUYFkgjb5Md7DjkkSk2g49i6Svl3B8CN99X6Z89Ni0kHzf+i6SHQRRsrIOMCdP0G r5KbtBi8fk+eQ== X-Nifty-SrcIP: [218.220.227.105] From: Masahiro Yamada To: Vinod Koul , dmaengine@vger.kernel.org Cc: Masami Hiramatsu , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 1/2] dt-bindings: dmaengine: add DT binding for UniPhier MIO DMAC Date: Fri, 12 Oct 2018 01:41:02 +0900 Message-Id: <1539276063-5103-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539276063-5103-1-git-send-email-yamada.masahiro@socionext.com> References: <1539276063-5103-1-git-send-email-yamada.masahiro@socionext.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada Reviewed-by: Rob Herring --- Changes in v4: None Changes in v3: - Add Rob's Reviewed-by Changes in v2: - Rename the node "dmac" to "dma-controller" - Remove dma-channels property .../devicetree/bindings/dma/uniphier-mio-dmac.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt new file mode 100644 index 0000000..b12388d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt @@ -0,0 +1,25 @@ +UniPhier Media IO DMA controller + +This works as an external DMA engine for SD/eMMC controllers etc. +found in UniPhier LD4, Pro4, sLD8 SoCs. + +Required properties: +- compatible: should be "socionext,uniphier-mio-dmac". +- reg: offset and length of the register set for the device. +- interrupts: a list of interrupt specifiers associated with the DMA channels. +- clocks: a single clock specifier. +- #dma-cells: should be <1>. The single cell represents the channel index. + +Example: + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + clocks = <&mio_clk 7>; + #dma-cells = <1>; + }; + +Note: +In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo. +The first two channels share a single interrupt line.