From patchwork Wed May 24 10:16:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 100435 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp201803qge; Wed, 24 May 2017 03:17:29 -0700 (PDT) X-Received: by 10.98.204.130 with SMTP id j2mr37561834pfk.107.1495621049449; Wed, 24 May 2017 03:17:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495621049; cv=none; d=google.com; s=arc-20160816; b=rq4MuNQlLjdNZ9gHrYtvju9Hv64QReuFwsG3zAqMtP7n+kMfvYcR78weVyb0jiNvEv NUvif5Mu37iz/gDj6r9qzgJZsl9FWMQIF6JdRgyToOgGF7g8uunSGAHSfwc/myZlG/ZP rHHs2J3+nG5oXJkCWnmR8p3xrTSXVpMAb96HglMPPJY2LgGIOBkptVxcU44NqrTgsUvA g/qtpgkeH92OLfCHbllN84DjexPa//jWB+Qt7U6EcZ8WSXSwH0XQeHtiezHZT/gfPhrl txPXtcsPsyH0IwVz3SRb+nEy69cwTr4un4SRbAQ4zODaI1p3DoNREP0ApriuV+TXAtp9 UOuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=f/4uR3F/Ce1UVKY/C5iHsegMsBWXgzAjm4LErlm/vm4=; b=l9CDr4A/dnBpkidylvhQM3MRbOO86g3m3tYM38iD3dAyq8o+wOMctOb0b1Jg1CREae 4BVlPDpxSQ/j5C/9u/J09G7/Arrm7xzpPjEXxKnK0oofT6hACR7ZdbWC8qzzX3y0OH5O 0jrTAV6USLeVYocUmOl8qZt+cg0+DpFNElaY9z/UELv35ff7WBBLDBmltMlbRV9zEFMQ pon8f07gJstBJCuHQMCm3dUgeuEwLycOITXkvzUO/RBqFLIJR/GFyCWCGn/U+Y57/7c8 9WD464BLcKepsqW/Ctxv/qsbcdSvSK1cu6YRf0snDlD/QbxMeNL4GmcOqrJKhYCguM6D 9T4A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f86si23752824pfj.267.2017.05.24.03.17.29; Wed, 24 May 2017 03:17:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969307AbdEXKRR (ORCPT + 25 others); Wed, 24 May 2017 06:17:17 -0400 Received: from foss.arm.com ([217.140.101.70]:35510 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935757AbdEXKRB (ORCPT ); Wed, 24 May 2017 06:17:01 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5F58FAD7; Wed, 24 May 2017 03:17:00 -0700 (PDT) Received: from e107155-lin.cambridge.arm.com (unknown [10.1.211.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 493AA3F578; Wed, 24 May 2017 03:16:59 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, Jassi Brar Cc: Sudeep Holla , devicetree@vger.kernel.org, Alexey Klimov , Jassi Brar Subject: [PATCH v2 1/6] mailbox: arm_mhu: reorder header inclusion and drop unneeded ones Date: Wed, 24 May 2017 11:16:38 +0100 Message-Id: <1495621003-4291-2-git-send-email-sudeep.holla@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> References: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch just re-orders some of the headers includes and also drop the ones that are unnecessary. Cc: Alexey Klimov Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index 99befa76e37c..be0f293a9457 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -13,16 +13,13 @@ * GNU General Public License for more details. */ -#include -#include -#include -#include -#include +#include +#include #include +#include #include -#include -#include #include +#include #define INTR_STAT_OFS 0x0 #define INTR_SET_OFS 0x8 From patchwork Wed May 24 10:16:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 100434 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp201800qge; Wed, 24 May 2017 03:17:29 -0700 (PDT) X-Received: by 10.84.228.207 with SMTP id y15mr42055167pli.172.1495621049093; Wed, 24 May 2017 03:17:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495621049; cv=none; d=google.com; s=arc-20160816; b=ym2V+xZiMmSy1EQLeTXWc+eKDwxrbWN1+0Ruc110/sby8nZuFSzbZk55GNxsCXxEoG P6sFNpPBcFwWy5aVuWts48X0Nc7hwEiDJCNSwhtMBenU5Glb6yq35X7QzlO5vTHDo6ww M/e7F9U4aLypIq3sRWbGZQKvnJe10rm5i+qwNLTfjbVTPLteeoXogWL20JBmE+9atkot vm14iJdDfkAuVDR1pkJovXUP8nFPqKuMhCqeiqlJ5Lu260EEPFJegaGFTJIB8C2M7OFF IIJXdAPFvszoJs2xxgAJdjYeL0JjKSMZA21zbk33Gb6n0TyFaR6utvPLoKN6WeTJqAlz wyrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=aRctA3hsoA9rAqDwLbX7p+GpMOxNbEetCrSgKUFTirg=; b=LoDV+U0O7jBV7laSGwkKhzJF87sl3p8CNq1RwASI1Iej65rGew69kOK+H9zAVKJwzY SIBAGdWCXrun9iUvY2MEO+3JrGtw6P0oHNnqaz0fRfMfRwDT8KWKmIsBBSvRHpfHJscq nilqNVh6xMsEQr72pTuYw9rDzFUNYAzW6IywPZcR3/lEV0bhLn0FFpL+HmOVYxsVI1Rk HIK6o6nWmAOL3jz3T0mbTX/tz8wFokg2GBqtl64NiNOcAD/475GVKhGKb5kVrHChUSzr T+21Bq1uk9TMy//NNX2WM5uAFOmYcu0r3xnh6Z3zlzr1sj3INvivwN7sKEtRSvEsmWx0 W9/A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f86si23752824pfj.267.2017.05.24.03.17.28; Wed, 24 May 2017 03:17:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969292AbdEXKRP (ORCPT + 25 others); Wed, 24 May 2017 06:17:15 -0400 Received: from foss.arm.com ([217.140.101.70]:35522 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936297AbdEXKRC (ORCPT ); Wed, 24 May 2017 06:17:02 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA1D315BF; Wed, 24 May 2017 03:17:01 -0700 (PDT) Received: from e107155-lin.cambridge.arm.com (unknown [10.1.211.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A04783F578; Wed, 24 May 2017 03:17:00 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, Jassi Brar Cc: Sudeep Holla , devicetree@vger.kernel.org, Alexey Klimov , Jassi Brar , Rob Herring Subject: [PATCH v2 2/6] Documentation: devicetree: add bindings to support ARM MHU doorbells Date: Wed, 24 May 2017 11:16:39 +0100 Message-Id: <1495621003-4291-3-git-send-email-sudeep.holla@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> References: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The ARM MHU has mechanism to assert interrupt signals to facilitate inter-processor message based communication. It drives the signal using a 32-bit register, with all 32-bits logically ORed together. It also enables software to set, clear and check the status of each of the bits of this register independently. Each bit of the register can be associated with a type of event that can contribute to raising the interrupt thereby allowing it to be used as independent doorbells. Since the first version of this binding can't support doorbells, this patch extends the existing binding to support them. Cc: Alexey Klimov Cc: Jassi Brar Cc: Rob Herring Cc: devicetree@vger.kernel.org Signed-off-by: Sudeep Holla --- .../devicetree/bindings/mailbox/arm-mhu.txt | 46 ++++++++++++++++++++-- 1 file changed, 43 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt index 4971f03f0b33..bd9a3a267caf 100644 --- a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt +++ b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt @@ -10,21 +10,42 @@ STAT register and the remote clears it after having read the data. The last channel is specified to be a 'Secure' resource, hence can't be used by Linux running NS. +The MHU drives the interrupt signal using a 32-bit register, with all +32-bits logically ORed together. It provides a set of registers to +enable software to set, clear and check the status of each of the bits +of this register independently. The use of 32 bits per interrupt line +enables software to provide more information about the source of the +interrupt. For example, each bit of the register can be associated with +a type of event that can contribute to raising the interrupt. Each of +the 32-bits can be used as "doorbell" to alert the remote processor. + Mailbox Device Node: ==================== Required properties: -------------------- -- compatible: Shall be "arm,mhu" & "arm,primecell" +- compatible: Shall be "arm,primecell" and one of the below: + "arm,mhu" - if the controller doesn't support + doorbell model + "arm,mhu-doorbell" - if the controller supports + doorbell model - reg: Contains the mailbox register address range (base address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. +- #mbox-cells Shall be 1 - the index of the channel needed when + compatible is "arm,mhu" + Shall be 2 - the index of the channel needed, and + the index of the doorbell bit with the channel when + compatible is "arm,mhu-doorbell" - interrupts: Contains the interrupt information corresponding to - each of the 3 links of MHU. + each of the 3 physical channels of MHU namely low + priority non-secure, high priority non-secure and + secure channels. Example: -------- +1. Controller which doesn't support doorbells + mhu: mailbox@2b1f0000 { #mbox-cells = <1>; compatible = "arm,mhu", "arm,primecell"; @@ -41,3 +62,22 @@ used by Linux running NS. reg = <0 0x2e000000 0x4000>; mboxes = <&mhu 1>; /* HP-NonSecure */ }; + +2. Controller which supports doorbells + + mhu: mailbox@2b1f0000 { + #mbox-cells = <2>; + compatible = "arm,mhu-doorbell", "arm,primecell"; + reg = <0 0x2b1f0000 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client: scb@2e000000 { + compatible = "arm,scpi"; + reg = <0 0x2e000000 0x200>; + mboxes = <&mhu 1 4>; /* HP-NonSecure 5th doorbell bit */ + }; From patchwork Wed May 24 10:16:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 100427 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp201799qge; Wed, 24 May 2017 03:17:28 -0700 (PDT) X-Received: by 10.84.133.132 with SMTP id f4mr42559887plf.94.1495621048721; Wed, 24 May 2017 03:17:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495621048; cv=none; d=google.com; s=arc-20160816; b=kZaCQneRibqoz+x6pIAKxasewzAOyixQHRAORTYjDdz6pkr+LJMNK2+jD9zwdOCdyW SH7tWFI9ykLTOJ07+ucIlYxRo3Xsn+nkIs2y93Wz5AZAIXqbKfV84Zk32DV2xFRccK/I H366Wvtu1CcwjfVp8TSAnT1hiQNSmfUdmNqeAsQceOI6ogQBRwzhVrexPGohnOEgRwt2 2vABYRX28amQ89JTJcfVmuFIJYlfcuNBG4gB7UNCIHlg22lCCxO/m5hoHdERyhwIPaDm aX1K9PsF1wZbEk2AvwzfPJSCqPp8Uefwrxj3MsIplldjxVUk2OL0ss2nAYGS9+Tb3Pas gMjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=xC1AJiMMv+piKEL357vlk5rmCNEXMHRorvNA/xidDEU=; b=S+SgXUHO4pjonYOAF7d74hLdykZH4+YbfZiHQvo00x1rD+gv0jL5esxTN0QIu88zB2 n42tp9sXTzf7jIheebh9qDQ7EGjcU1OBXU51G+sbmT2v9e6Fz7katCbb+0ZXY1cdATiV 0hTqYx6/jSgd42xnRqmaBqKkqCMK7cl6V1X5EWGqdlbOOgYaghmTkVf71gax1PK917Uj iqStw6PFx8lvW0QHwBX3SZJVZ8Wdqn2UKZte2ZT8+ygIkyo/XXQ+zJEe1LlKbbFZm0MY Zf+eCu+c/fyhv6IWhfzP6E+kJnbZtugxCsp+57vkjo7RreJBFNRSxBSeUHWUVB5GD1Jk FPjA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f86si23752824pfj.267.2017.05.24.03.17.28; Wed, 24 May 2017 03:17:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969277AbdEXKRM (ORCPT + 25 others); Wed, 24 May 2017 06:17:12 -0400 Received: from foss.arm.com ([217.140.101.70]:35534 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936705AbdEXKRF (ORCPT ); Wed, 24 May 2017 06:17:05 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 94C39AD7; Wed, 24 May 2017 03:17:04 -0700 (PDT) Received: from e107155-lin.cambridge.arm.com (unknown [10.1.211.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7F7FA3F578; Wed, 24 May 2017 03:17:03 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, Jassi Brar Cc: Sudeep Holla , devicetree@vger.kernel.org, Alexey Klimov , Jassi Brar Subject: [PATCH v2 4/6] mailbox: arm_mhu: re-factor data structure to add doorbell support Date: Wed, 24 May 2017 11:16:41 +0100 Message-Id: <1495621003-4291-5-git-send-email-sudeep.holla@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> References: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order to support doorbells, we need a bit of reword around data structures that are per-channel. Since the number of doorbells are not fixed though restricted to maximum of 20, the channel assignment and initialization is move to xlate function. This patch also adds the platform data for the existing support of one channel per physical channel. Cc: Alexey Klimov Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 208 +++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 186 insertions(+), 22 deletions(-) -- 2.7.4 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index ebe17c097f43..ae06924eb6f4 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #define INTR_STAT_OFS 0x0 #define INTR_SET_OFS 0x8 @@ -30,7 +32,8 @@ #define MHU_SEC_OFFSET 0x200 #define TX_REG_OFFSET 0x100 -#define MHU_CHANS 3 +#define MHU_NUM_PCHANS 3 /* Secure, Non-Secure High and Low Priority */ +#define MHU_CHAN_MAX 20 /* Max channels to save on unused RAM */ struct mhu_link { unsigned irq; @@ -40,53 +43,175 @@ struct mhu_link { struct arm_mhu { void __iomem *base; - struct mhu_link mlink[MHU_CHANS]; - struct mbox_chan chan[MHU_CHANS]; + struct mhu_link mlink[MHU_NUM_PCHANS]; struct mbox_controller mbox; + struct device *dev; }; +/** + * ARM MHU Mailbox platform specific configuration + * + * @num_pchans: Maximum number of physical channels + * @num_doorbells: Maximum number of doorbells per physical channel + */ +struct mhu_mbox_pdata { + unsigned int num_pchans; + unsigned int num_doorbells; + bool support_doorbells; +}; + +/** + * ARM MHU Mailbox allocated channel information + * + * @mhu: Pointer to parent mailbox device + * @pchan: Physical channel within which this doorbell resides in + * @doorbell: doorbell number pertaining to this channel + */ +struct mhu_channel { + struct arm_mhu *mhu; + unsigned int pchan; + unsigned int doorbell; +}; + +static inline struct mbox_chan * +mhu_mbox_to_channel(struct mbox_controller *mbox, + unsigned int pchan, unsigned int doorbell) +{ + int i; + struct mhu_channel *chan_info; + + for (i = 0; i < mbox->num_chans; i++) { + chan_info = mbox->chans[i].con_priv; + if (chan_info && chan_info->pchan == pchan && + chan_info->doorbell == doorbell) + return &mbox->chans[i]; + } + + dev_err(mbox->dev, + "Channel not registered: physical channel: %d doorbell: %d\n", + pchan, doorbell); + + return NULL; +} + +static unsigned int mhu_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq) +{ + unsigned int pchan; + struct mhu_mbox_pdata *pdata = dev_get_platdata(mhu->dev); + + for (pchan = 0; pchan < pdata->num_pchans; pchan++) + if (mhu->mlink[pchan].irq == irq) + break; + return pchan; +} + +static struct mbox_chan *mhu_mbox_xlate(struct mbox_controller *mbox, + const struct of_phandle_args *spec) +{ + struct arm_mhu *mhu = dev_get_drvdata(mbox->dev); + struct mhu_mbox_pdata *pdata = dev_get_platdata(mhu->dev); + struct mhu_channel *chan_info; + struct mbox_chan *chan = NULL; + unsigned int pchan = spec->args[0]; + unsigned int doorbell = pdata->support_doorbells ? spec->args[1] : 0; + int i; + + /* Bounds checking */ + if (pchan >= pdata->num_pchans || doorbell >= pdata->num_doorbells) { + dev_err(mbox->dev, + "Invalid channel requested pchan: %d doorbell: %d\n", + pchan, doorbell); + return ERR_PTR(-EINVAL); + } + + for (i = 0; i < mbox->num_chans; i++) { + chan_info = mbox->chans[i].con_priv; + + /* Is requested channel free? */ + if (chan_info && + mbox->dev == chan_info->mhu->dev && + pchan == chan_info->pchan && + doorbell == chan_info->doorbell) { + dev_err(mbox->dev, "Channel in use\n"); + return ERR_PTR(-EBUSY); + } + + /* + * Find the first free slot, then continue checking + * to see if requested channel is in use + */ + if (!chan && !chan_info) + chan = &mbox->chans[i]; + } + + if (!chan) { + dev_err(mbox->dev, "No free channels left\n"); + return ERR_PTR(-EBUSY); + } + + chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL); + if (!chan_info) + return ERR_PTR(-ENOMEM); + + chan_info->mhu = mhu; + chan_info->pchan = pchan; + chan_info->doorbell = doorbell; + + chan->con_priv = chan_info; + + dev_dbg(mbox->dev, "mbox: created channel phys: %d doorbell: %d\n", + pchan, doorbell); + + return chan; +} + static irqreturn_t mhu_rx_interrupt(int irq, void *p) { - struct mbox_chan *chan = p; - struct mhu_link *mlink = chan->con_priv; + struct arm_mhu *mhu = p; + unsigned int pchan = mhu_mbox_irq_to_pchan_num(mhu, irq); + struct mbox_chan *chan = mhu_mbox_to_channel(&mhu->mbox, pchan, 0); + void __iomem *base = mhu->mlink[pchan].rx_reg; u32 val; - val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); + val = readl_relaxed(base + INTR_STAT_OFS); if (!val) return IRQ_NONE; mbox_chan_received_data(chan, (void *)&val); - writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); + writel_relaxed(val, base + INTR_CLR_OFS); return IRQ_HANDLED; } static bool mhu_last_tx_done(struct mbox_chan *chan) { - struct mhu_link *mlink = chan->con_priv; - u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; + u32 val = readl_relaxed(base + INTR_STAT_OFS); return (val == 0); } static int mhu_send_data(struct mbox_chan *chan, void *data) { - struct mhu_link *mlink = chan->con_priv; + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; u32 *arg = data; - writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS); + writel_relaxed(*arg, base + INTR_SET_OFS); return 0; } static int mhu_startup(struct mbox_chan *chan) { - struct mhu_link *mlink = chan->con_priv; + struct mhu_channel *chan_info = chan->con_priv; + void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; u32 val; - val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); - writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS); + val = readl_relaxed(base + INTR_STAT_OFS); + writel_relaxed(val, base + INTR_CLR_OFS); return 0; } @@ -102,14 +227,46 @@ static const struct mbox_chan_ops mhu_ops = { .last_tx_done = mhu_last_tx_done, }; +static const struct mhu_mbox_pdata arm_mhu_pdata = { + .num_pchans = 3, + .num_doorbells = 1, + .support_doorbells = false, +}; + +static const struct of_device_id mhu_mbox_match[] = { + { .compatible = "arm,mhu", .data = (void *)&arm_mhu_pdata }, + {} +}; + +MODULE_DEVICE_TABLE(of, mhu_mbox_match); + static int mhu_probe(struct amba_device *adev, const struct amba_id *id) { - int i, err; + int i, err, max_chans; struct arm_mhu *mhu; + struct mbox_chan *chans; + struct mhu_mbox_pdata *pdata; + const struct of_device_id *match; struct device *dev = &adev->dev; - int mhu_reg[MHU_CHANS] = {MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET}; + int mhu_reg[MHU_NUM_PCHANS] = { + MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET, + }; + + match = of_match_device(mhu_mbox_match, dev); + if (!match) { + dev_err(dev, "No configuration found\n"); + return -ENODEV; + } + pdata = (struct mhu_mbox_pdata *)match->data; + + if (pdata->num_pchans > MHU_NUM_PCHANS) { + dev_err(dev, "Number of physical channel can't exceed %d\n", + MHU_NUM_PCHANS); + return -EINVAL; + } + + max_chans = pdata->support_doorbells ? MHU_CHAN_MAX : MHU_NUM_PCHANS; - /* Allocate memory for device */ mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL); if (!mhu) return -ENOMEM; @@ -120,14 +277,22 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR(mhu->base); } + chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL); + if (!chans) + return -ENOMEM; + + dev->platform_data = pdata; + + mhu->dev = dev; mhu->mbox.dev = dev; - mhu->mbox.chans = &mhu->chan[0]; - mhu->mbox.num_chans = MHU_CHANS; + mhu->mbox.chans = chans; + mhu->mbox.num_chans = max_chans; mhu->mbox.ops = &mhu_ops; mhu->mbox.txdone_irq = false; mhu->mbox.txdone_poll = true; mhu->mbox.txpoll_period = 1; + mhu->mbox.of_xlate = mhu_mbox_xlate; amba_set_drvdata(adev, mhu); err = mbox_controller_register(&mhu->mbox); @@ -136,7 +301,7 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return err; } - for (i = 0; i < MHU_CHANS; i++) { + for (i = 0; i < pdata->num_pchans; i++) { int irq = mhu->mlink[i].irq = adev->irq[i]; if (irq <= 0) { @@ -144,13 +309,12 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) continue; } - mhu->chan[i].con_priv = &mhu->mlink[i]; mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i]; mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; err = devm_request_threaded_irq(dev, irq, NULL, mhu_rx_interrupt, IRQF_ONESHOT, - "mhu_link", &mhu->chan[i]); + "mhu_link", mhu); if (err) { dev_err(dev, "Can't claim IRQ %d\n", irq); mbox_controller_unregister(&mhu->mbox); From patchwork Wed May 24 10:16:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 100437 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp202112qge; Wed, 24 May 2017 03:18:25 -0700 (PDT) X-Received: by 10.84.164.193 with SMTP id l1mr28028631plg.154.1495621105298; Wed, 24 May 2017 03:18:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495621105; cv=none; d=google.com; s=arc-20160816; b=R+5grONP9x8AdU5llbVQ2ioh2HeBibZ1tkGbKAOdm8mkT3zI7FWfrFYIs6/KQ6Pw4t LW86m4AK8LmwN7oebEvU7TzpT4dzXFpSaGK8BqaNMoB2NdgeH+nvDLQp9/CBt2jADmlw yKvzxOB+vLeiyl5nXe3OSPTKj0SyRUwBPLnnDkPaGZSyqB8uI/dUoXWwSaOo45Ysu3j/ gNWYSK33TppTA4aZrHoRLOtiwQ6e+cfYAJEaGj0Ov6NPIzx6rd+Nl6yuFVQ2l1/Ju6sl lazCWbfVNZNVPhJ83I8KQcSzxu2UgBNnjP3KTs8VedVCXe7Pg2uoV4Dv37S/zfGu/Kc2 9NEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=i564DOyAsxvRvgbWFPWZ/RmXlDwoL7gU6W5JFrvcc40=; b=bYQc9fdEwyCaYW1HM6p/NO55C9gR93hVNsvd9Zz6ihifdBkhQ269a4eoViHTcJgh7R B9EnFQN6O7GhBGUXgcpj0qgSt+TOXR+TYvX/knK/MGf286Kb+FJiLOCB0PQQFk2U/WRh j5zmaVs5CdUOLjyI56hfyObbP4vnGAHn0jiS6EQKsKcU/V1icPSN0kou8ue9QmPdtAm6 PoxZAP56noHJULRujsXBTVsz2oHw/auefbfzyb/I+PuSKXGTvh0SOCpx956TLj7f+LJS ED5YKCYRlIVvzOTkWeP18mP2UNAcLUDdEFP3FRPTzs3VkWm0/D4Bh6aZ/PfHd0hcxlzL HxUQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f21si24352864pfk.205.2017.05.24.03.18.24; Wed, 24 May 2017 03:18:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969354AbdEXKSV (ORCPT + 25 others); Wed, 24 May 2017 06:18:21 -0400 Received: from foss.arm.com ([217.140.101.70]:35540 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S968581AbdEXKRH (ORCPT ); Wed, 24 May 2017 06:17:07 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F42315BF; Wed, 24 May 2017 03:17:07 -0700 (PDT) Received: from e107155-lin.cambridge.arm.com (unknown [10.1.211.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 38CEC3F578; Wed, 24 May 2017 03:17:06 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org, Jassi Brar Cc: Sudeep Holla , devicetree@vger.kernel.org, Alexey Klimov , Jassi Brar Subject: [PATCH v2 6/6] mailbox: arm_mhu: add support to read and record mbox-name Date: Wed, 24 May 2017 11:16:43 +0100 Message-Id: <1495621003-4291-7-git-send-email-sudeep.holla@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> References: <1495621003-4291-1-git-send-email-sudeep.holla@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org It's sometimes useful to identify the mailbox controller with the name as specified in the devicetree via mbox-name property especially in a system with multiple controllers. This patch adds support to read and record the mailbox controller name. Cc: Alexey Klimov Cc: Jassi Brar Signed-off-by: Sudeep Holla --- drivers/mailbox/arm_mhu.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/mailbox/arm_mhu.c b/drivers/mailbox/arm_mhu.c index 79d2392d7f3b..08ed22e9e347 100644 --- a/drivers/mailbox/arm_mhu.c +++ b/drivers/mailbox/arm_mhu.c @@ -47,6 +47,7 @@ struct arm_mhu { struct mhu_link mlink[MHU_NUM_PCHANS]; struct mbox_controller mbox; struct device *dev; + const char *name; }; /** @@ -257,8 +258,8 @@ static struct mbox_chan *mhu_mbox_xlate(struct mbox_controller *mbox, chan->con_priv = chan_info; - dev_dbg(mbox->dev, "mbox: created channel phys: %d doorbell: %d\n", - pchan, doorbell); + dev_dbg(mbox->dev, "mbox: %s, created channel phys: %d doorbell: %d\n", + mhu->name, pchan, doorbell); return chan; } @@ -366,6 +367,7 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) struct mhu_mbox_pdata *pdata; const struct of_device_id *match; struct device *dev = &adev->dev; + struct device_node *np = dev->of_node; int mhu_reg[MHU_NUM_PCHANS] = { MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET, }; @@ -395,6 +397,10 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR(mhu->base); } + err = of_property_read_string(np, "mbox-name", &mhu->name); + if (err) + mhu->name = np->full_name; + chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL); if (!chans) return -ENOMEM; @@ -446,7 +452,7 @@ static int mhu_probe(struct amba_device *adev, const struct amba_id *id) } } - dev_info(dev, "ARM MHU Mailbox registered\n"); + dev_info(dev, "%s mailbox registered\n", mhu->name); return 0; }