From patchwork Wed Sep 8 13:03:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 508127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A165C433EF for ; Wed, 8 Sep 2021 13:04:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6138B6115B for ; Wed, 8 Sep 2021 13:04:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238237AbhIHNFK (ORCPT ); Wed, 8 Sep 2021 09:05:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243317AbhIHNFG (ORCPT ); Wed, 8 Sep 2021 09:05:06 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BD4EC061757 for ; Wed, 8 Sep 2021 06:03:57 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mNxF6-00053t-3U; Wed, 08 Sep 2021 15:03:56 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1mNxF5-0004T3-Iv; Wed, 08 Sep 2021 15:03:55 +0200 Received: from mtr by dude03.red.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1mNxF5-00DpIS-IA; Wed, 08 Sep 2021 15:03:55 +0200 From: Michael Tretter To: linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil-cisco@xs4all.nl Cc: kernel@pengutronix.de, m.tretter@pengutronix.de Subject: [PATCH 1/7] media: allegro: fix row and column in response message Date: Wed, 8 Sep 2021 15:03:49 +0200 Message-Id: <20210908130355.3295403-2-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210908130355.3295403-1-m.tretter@pengutronix.de> References: <20210908130355.3295403-1-m.tretter@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-media@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The fields for the number of rows and columns in the encode frame response message are switched. This causes broken PPS, if the encoder uses tiles for encoding and the number of rows and columns differ. Write the fields of the response message into the correct fields of the the internal data structure when parsing the response message. Signed-off-by: Michael Tretter --- drivers/media/platform/allegro-dvt/allegro-mail.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-mail.c b/drivers/media/platform/allegro-dvt/allegro-mail.c index 7e08c5050f2e..fd26176598d3 100644 --- a/drivers/media/platform/allegro-dvt/allegro-mail.c +++ b/drivers/media/platform/allegro-dvt/allegro-mail.c @@ -429,8 +429,8 @@ allegro_dec_encode_frame(struct mcu_msg_encode_frame_response *msg, u32 *src) msg->frame_tag_size = src[i++]; msg->stuffing = src[i++]; msg->filler = src[i++]; - msg->num_column = FIELD_GET(GENMASK(31, 16), src[i]); - msg->num_row = FIELD_GET(GENMASK(15, 0), src[i++]); + msg->num_row = FIELD_GET(GENMASK(31, 16), src[i]); + msg->num_column = FIELD_GET(GENMASK(15, 0), src[i++]); msg->num_ref_idx_l1 = FIELD_GET(GENMASK(31, 24), src[i]); msg->num_ref_idx_l0 = FIELD_GET(GENMASK(23, 16), src[i]); msg->qp = FIELD_GET(GENMASK(15, 0), src[i++]); From patchwork Wed Sep 8 13:03:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 508124 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7028C433F5 for ; Wed, 8 Sep 2021 13:04:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E94A61139 for ; Wed, 8 Sep 2021 13:04:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244963AbhIHNFL (ORCPT ); Wed, 8 Sep 2021 09:05:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40306 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238232AbhIHNFH (ORCPT ); Wed, 8 Sep 2021 09:05:07 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C3F7C061796 for ; Wed, 8 Sep 2021 06:03:57 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mNxF6-00053v-5r; Wed, 08 Sep 2021 15:03:56 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1mNxF5-0004T9-Jp; Wed, 08 Sep 2021 15:03:55 +0200 Received: from mtr by dude03.red.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1mNxF5-00DpIY-J7; Wed, 08 Sep 2021 15:03:55 +0200 From: Michael Tretter To: linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil-cisco@xs4all.nl Cc: kernel@pengutronix.de, m.tretter@pengutronix.de Subject: [PATCH 3/7] media: allegro: correctly scale the bit rate in SPS Date: Wed, 8 Sep 2021 15:03:51 +0200 Message-Id: <20210908130355.3295403-4-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210908130355.3295403-1-m.tretter@pengutronix.de> References: <20210908130355.3295403-1-m.tretter@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-media@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The bit rate in the SPS can be scaled by an exponent, which allows to reduce the number of bits in the SPS in case of high bit rates. The driver did not scale the bitrate, but used a scaling exponent of 0. Fix this by properly calculating the scaling factor and writing the bit rate as value and scaling factor into the SPS. Signed-off-by: Michael Tretter --- drivers/media/platform/allegro-dvt/allegro-core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index 8bcb40637c93..9cd903bab0ca 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -1558,8 +1558,9 @@ static ssize_t allegro_h264_write_sps(struct allegro_channel *channel, sps->vui.nal_hrd_parameters_present_flag = 0; sps->vui.vcl_hrd_parameters_present_flag = 1; sps->vui.vcl_hrd_parameters.cpb_cnt_minus1 = 0; - sps->vui.vcl_hrd_parameters.bit_rate_scale = 0; /* See Rec. ITU-T H.264 (04/2017) p. 410 E-53 */ + sps->vui.vcl_hrd_parameters.bit_rate_scale = + ffs(channel->bitrate_peak) - 6; sps->vui.vcl_hrd_parameters.bit_rate_value_minus1[0] = channel->bitrate_peak / (1 << (6 + sps->vui.vcl_hrd_parameters.bit_rate_scale)) - 1; /* See Rec. ITU-T H.264 (04/2017) p. 410 E-54 */ From patchwork Wed Sep 8 13:03:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 508126 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BF0BC433EF for ; Wed, 8 Sep 2021 13:04:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E4F9F6115B for ; Wed, 8 Sep 2021 13:04:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346134AbhIHNFR (ORCPT ); Wed, 8 Sep 2021 09:05:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239213AbhIHNFH (ORCPT ); Wed, 8 Sep 2021 09:05:07 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C84FC06179A for ; Wed, 8 Sep 2021 06:03:57 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mNxF6-00053w-5S; Wed, 08 Sep 2021 15:03:56 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1mNxF5-0004TB-KC; Wed, 08 Sep 2021 15:03:55 +0200 Received: from mtr by dude03.red.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1mNxF5-00DpIe-JX; Wed, 08 Sep 2021 15:03:55 +0200 From: Michael Tretter To: linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil-cisco@xs4all.nl Cc: kernel@pengutronix.de, m.tretter@pengutronix.de Subject: [PATCH 4/7] media: allegro: extract nal value lookup functions to header Date: Wed, 8 Sep 2021 15:03:52 +0200 Message-Id: <20210908130355.3295403-5-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210908130355.3295403-1-m.tretter@pengutronix.de> References: <20210908130355.3295403-1-m.tretter@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-media@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The lookup of the h.264 or hevc values for the respective V4L2 controls is done by the driver that uses the sps/pps generator and not in the generator. Therefore, it is more intuitive to define these functions directly in the header and not in the module. Extract the functions to the headers as static inline functions. Also simplify the function name and add kernel-doc for the hevc functions. Signed-off-by: Michael Tretter --- .../media/platform/allegro-dvt/allegro-core.c | 16 +-- drivers/media/platform/allegro-dvt/nal-h264.c | 74 -------------- drivers/media/platform/allegro-dvt/nal-h264.h | 77 ++++++++++++++- drivers/media/platform/allegro-dvt/nal-hevc.c | 70 ------------- drivers/media/platform/allegro-dvt/nal-hevc.h | 99 ++++++++++++++++++- 5 files changed, 178 insertions(+), 158 deletions(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index 9cd903bab0ca..f0c6673f5af1 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -1507,14 +1507,14 @@ static ssize_t allegro_h264_write_sps(struct allegro_channel *channel, profile = v4l2_ctrl_g_ctrl(channel->mpeg_video_h264_profile); level = v4l2_ctrl_g_ctrl(channel->mpeg_video_h264_level); - sps->profile_idc = nal_h264_profile_from_v4l2(profile); + sps->profile_idc = nal_h264_profile(profile); sps->constraint_set0_flag = 0; sps->constraint_set1_flag = 1; sps->constraint_set2_flag = 0; sps->constraint_set3_flag = 0; sps->constraint_set4_flag = 0; sps->constraint_set5_flag = 0; - sps->level_idc = nal_h264_level_from_v4l2(level); + sps->level_idc = nal_h264_level(level); sps->seq_parameter_set_id = 0; sps->log2_max_frame_num_minus4 = LOG2_MAX_FRAME_NUM - 4; sps->pic_order_cnt_type = 0; @@ -1653,12 +1653,12 @@ static ssize_t allegro_hevc_write_vps(struct allegro_channel *channel, vps->temporal_id_nesting_flag = 1; ptl = &vps->profile_tier_level; - ptl->general_profile_idc = nal_hevc_profile_from_v4l2(profile); + ptl->general_profile_idc = nal_hevc_profile(profile); ptl->general_profile_compatibility_flag[ptl->general_profile_idc] = 1; - ptl->general_tier_flag = nal_hevc_tier_from_v4l2(tier); + ptl->general_tier_flag = nal_hevc_tier(tier); ptl->general_progressive_source_flag = 1; ptl->general_frame_only_constraint_flag = 1; - ptl->general_level_idc = nal_hevc_level_from_v4l2(level); + ptl->general_level_idc = nal_hevc_level(level); vps->sub_layer_ordering_info_present_flag = 0; vps->max_dec_pic_buffering_minus1[0] = num_ref_frames; @@ -1690,12 +1690,12 @@ static ssize_t allegro_hevc_write_sps(struct allegro_channel *channel, sps->temporal_id_nesting_flag = 1; ptl = &sps->profile_tier_level; - ptl->general_profile_idc = nal_hevc_profile_from_v4l2(profile); + ptl->general_profile_idc = nal_hevc_profile(profile); ptl->general_profile_compatibility_flag[ptl->general_profile_idc] = 1; - ptl->general_tier_flag = nal_hevc_tier_from_v4l2(tier); + ptl->general_tier_flag = nal_hevc_tier(tier); ptl->general_progressive_source_flag = 1; ptl->general_frame_only_constraint_flag = 1; - ptl->general_level_idc = nal_hevc_level_from_v4l2(level); + ptl->general_level_idc = nal_hevc_level(level); sps->seq_parameter_set_id = 0; sps->chroma_format_idc = 1; /* Only 4:2:0 sampling supported */ diff --git a/drivers/media/platform/allegro-dvt/nal-h264.c b/drivers/media/platform/allegro-dvt/nal-h264.c index 0ab2fcbee1b9..32663766340f 100644 --- a/drivers/media/platform/allegro-dvt/nal-h264.c +++ b/drivers/media/platform/allegro-dvt/nal-h264.c @@ -34,80 +34,6 @@ enum nal_unit_type { FILLER_DATA = 12, }; -/** - * nal_h264_profile_from_v4l2() - Get profile_idc for v4l2 h264 profile - * @profile: the profile as &enum v4l2_mpeg_video_h264_profile - * - * Convert the &enum v4l2_mpeg_video_h264_profile to profile_idc as specified - * in Rec. ITU-T H.264 (04/2017) A.2. - * - * Return: the profile_idc for the passed level - */ -int nal_h264_profile_from_v4l2(enum v4l2_mpeg_video_h264_profile profile) -{ - switch (profile) { - case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE: - return 66; - case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN: - return 77; - case V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED: - return 88; - case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH: - return 100; - default: - return -EINVAL; - } -} - -/** - * nal_h264_level_from_v4l2() - Get level_idc for v4l2 h264 level - * @level: the level as &enum v4l2_mpeg_video_h264_level - * - * Convert the &enum v4l2_mpeg_video_h264_level to level_idc as specified in - * Rec. ITU-T H.264 (04/2017) A.3.2. - * - * Return: the level_idc for the passed level - */ -int nal_h264_level_from_v4l2(enum v4l2_mpeg_video_h264_level level) -{ - switch (level) { - case V4L2_MPEG_VIDEO_H264_LEVEL_1_0: - return 10; - case V4L2_MPEG_VIDEO_H264_LEVEL_1B: - return 9; - case V4L2_MPEG_VIDEO_H264_LEVEL_1_1: - return 11; - case V4L2_MPEG_VIDEO_H264_LEVEL_1_2: - return 12; - case V4L2_MPEG_VIDEO_H264_LEVEL_1_3: - return 13; - case V4L2_MPEG_VIDEO_H264_LEVEL_2_0: - return 20; - case V4L2_MPEG_VIDEO_H264_LEVEL_2_1: - return 21; - case V4L2_MPEG_VIDEO_H264_LEVEL_2_2: - return 22; - case V4L2_MPEG_VIDEO_H264_LEVEL_3_0: - return 30; - case V4L2_MPEG_VIDEO_H264_LEVEL_3_1: - return 31; - case V4L2_MPEG_VIDEO_H264_LEVEL_3_2: - return 32; - case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: - return 40; - case V4L2_MPEG_VIDEO_H264_LEVEL_4_1: - return 41; - case V4L2_MPEG_VIDEO_H264_LEVEL_4_2: - return 42; - case V4L2_MPEG_VIDEO_H264_LEVEL_5_0: - return 50; - case V4L2_MPEG_VIDEO_H264_LEVEL_5_1: - return 51; - default: - return -EINVAL; - } -} - static void nal_h264_write_start_code_prefix(struct rbsp *rbsp) { u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8); diff --git a/drivers/media/platform/allegro-dvt/nal-h264.h b/drivers/media/platform/allegro-dvt/nal-h264.h index a19634fe8c0b..e03505593ec2 100644 --- a/drivers/media/platform/allegro-dvt/nal-h264.h +++ b/drivers/media/platform/allegro-dvt/nal-h264.h @@ -8,8 +8,10 @@ #ifndef __NAL_H264_H__ #define __NAL_H264_H__ +#include #include #include +#include /* * struct nal_h264_hrd_parameters - HRD parameters @@ -187,8 +189,79 @@ struct nal_h264_pps { }; }; -int nal_h264_profile_from_v4l2(enum v4l2_mpeg_video_h264_profile profile); -int nal_h264_level_from_v4l2(enum v4l2_mpeg_video_h264_level level); +/** + * nal_h264_profile() - Get profile_idc for v4l2 h264 profile + * @profile: the profile as &enum v4l2_mpeg_video_h264_profile + * + * Convert the &enum v4l2_mpeg_video_h264_profile to profile_idc as specified + * in Rec. ITU-T H.264 (04/2017) A.2. + * + * Return: the profile_idc for the passed level + */ +static inline int nal_h264_profile(enum v4l2_mpeg_video_h264_profile profile) +{ + switch (profile) { + case V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE: + return 66; + case V4L2_MPEG_VIDEO_H264_PROFILE_MAIN: + return 77; + case V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED: + return 88; + case V4L2_MPEG_VIDEO_H264_PROFILE_HIGH: + return 100; + default: + return -EINVAL; + } +} + +/** + * nal_h264_level() - Get level_idc for v4l2 h264 level + * @level: the level as &enum v4l2_mpeg_video_h264_level + * + * Convert the &enum v4l2_mpeg_video_h264_level to level_idc as specified in + * Rec. ITU-T H.264 (04/2017) A.3.2. + * + * Return: the level_idc for the passed level + */ +static inline int nal_h264_level(enum v4l2_mpeg_video_h264_level level) +{ + switch (level) { + case V4L2_MPEG_VIDEO_H264_LEVEL_1_0: + return 10; + case V4L2_MPEG_VIDEO_H264_LEVEL_1B: + return 9; + case V4L2_MPEG_VIDEO_H264_LEVEL_1_1: + return 11; + case V4L2_MPEG_VIDEO_H264_LEVEL_1_2: + return 12; + case V4L2_MPEG_VIDEO_H264_LEVEL_1_3: + return 13; + case V4L2_MPEG_VIDEO_H264_LEVEL_2_0: + return 20; + case V4L2_MPEG_VIDEO_H264_LEVEL_2_1: + return 21; + case V4L2_MPEG_VIDEO_H264_LEVEL_2_2: + return 22; + case V4L2_MPEG_VIDEO_H264_LEVEL_3_0: + return 30; + case V4L2_MPEG_VIDEO_H264_LEVEL_3_1: + return 31; + case V4L2_MPEG_VIDEO_H264_LEVEL_3_2: + return 32; + case V4L2_MPEG_VIDEO_H264_LEVEL_4_0: + return 40; + case V4L2_MPEG_VIDEO_H264_LEVEL_4_1: + return 41; + case V4L2_MPEG_VIDEO_H264_LEVEL_4_2: + return 42; + case V4L2_MPEG_VIDEO_H264_LEVEL_5_0: + return 50; + case V4L2_MPEG_VIDEO_H264_LEVEL_5_1: + return 51; + default: + return -EINVAL; + } +} ssize_t nal_h264_write_sps(const struct device *dev, void *dest, size_t n, struct nal_h264_sps *sps); diff --git a/drivers/media/platform/allegro-dvt/nal-hevc.c b/drivers/media/platform/allegro-dvt/nal-hevc.c index 15a352e45831..0999a2bdc812 100644 --- a/drivers/media/platform/allegro-dvt/nal-hevc.c +++ b/drivers/media/platform/allegro-dvt/nal-hevc.c @@ -35,76 +35,6 @@ enum nal_unit_type { FD_NUT = 38, }; -int nal_hevc_profile_from_v4l2(enum v4l2_mpeg_video_hevc_profile profile) -{ - switch (profile) { - case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN: - return 1; - case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10: - return 2; - case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE: - return 3; - default: - return -EINVAL; - } -} -EXPORT_SYMBOL_GPL(nal_hevc_profile_from_v4l2); - -int nal_hevc_tier_from_v4l2(enum v4l2_mpeg_video_hevc_tier tier) -{ - switch (tier) { - case V4L2_MPEG_VIDEO_HEVC_TIER_MAIN: - return 0; - case V4L2_MPEG_VIDEO_HEVC_TIER_HIGH: - return 1; - default: - return -EINVAL; - } -} -EXPORT_SYMBOL_GPL(nal_hevc_tier_from_v4l2); - -int nal_hevc_level_from_v4l2(enum v4l2_mpeg_video_hevc_level level) -{ - /* - * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ] - * shall be set equal to a value of 30 times the level number - * specified in Table A.6. - */ - int factor = 30 / 10; - - switch (level) { - case V4L2_MPEG_VIDEO_HEVC_LEVEL_1: - return factor * 10; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_2: - return factor * 20; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1: - return factor * 21; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_3: - return factor * 30; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1: - return factor * 31; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_4: - return factor * 40; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1: - return factor * 41; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_5: - return factor * 50; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1: - return factor * 51; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2: - return factor * 52; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_6: - return factor * 60; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1: - return factor * 61; - case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2: - return factor * 62; - default: - return -EINVAL; - } -} -EXPORT_SYMBOL_GPL(nal_hevc_level_from_v4l2); - static void nal_hevc_write_start_code_prefix(struct rbsp *rbsp) { u8 *p = rbsp->data + DIV_ROUND_UP(rbsp->pos, 8); diff --git a/drivers/media/platform/allegro-dvt/nal-hevc.h b/drivers/media/platform/allegro-dvt/nal-hevc.h index c09bbe5446aa..e67d94bd5341 100644 --- a/drivers/media/platform/allegro-dvt/nal-hevc.h +++ b/drivers/media/platform/allegro-dvt/nal-hevc.h @@ -8,9 +8,10 @@ #ifndef __NAL_HEVC_H__ #define __NAL_HEVC_H__ +#include #include #include -#include +#include struct nal_hevc_profile_tier_level { unsigned int general_profile_space; @@ -318,9 +319,99 @@ struct nal_hevc_pps { }; }; -int nal_hevc_profile_from_v4l2(enum v4l2_mpeg_video_hevc_profile profile); -int nal_hevc_tier_from_v4l2(enum v4l2_mpeg_video_hevc_tier tier); -int nal_hevc_level_from_v4l2(enum v4l2_mpeg_video_hevc_level level); +/** + * nal_hevc_profile() - Get profile_idc for v4l2 hevc profile + * @profile: the profile as &enum v4l2_mpeg_video_hevc_profile + * + * Convert the &enum v4l2_mpeg_video_hevc_profile to profile_idc as specified + * in Rec. ITU-T H.265 (02/2018) A.3. + * + * Return: the profile_idc for the passed level + */ +static inline int nal_hevc_profile(enum v4l2_mpeg_video_hevc_profile profile) +{ + switch (profile) { + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN: + return 1; + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10: + return 2; + case V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE: + return 3; + default: + return -EINVAL; + } +} + +/** + * nal_hevc_tier() - Get tier_flag for v4l2 hevc tier + * @tier: the tier as &enum v4l2_mpeg_video_hevc_tier + * + * Convert the &enum v4l2_mpeg_video_hevc_tier to tier_flag as specified + * in Rec. ITU-T H.265 (02/2018) A.4.1. + * + * Return: the tier_flag for the passed tier + */ +static inline int nal_hevc_tier(enum v4l2_mpeg_video_hevc_tier tier) +{ + switch (tier) { + case V4L2_MPEG_VIDEO_HEVC_TIER_MAIN: + return 0; + case V4L2_MPEG_VIDEO_HEVC_TIER_HIGH: + return 1; + default: + return -EINVAL; + } +} + +/** + * nal_hevc_level() - Get level_idc for v4l2 hevc level + * @level: the level as &enum v4l2_mpeg_video_hevc_level + * + * Convert the &enum v4l2_mpeg_video_hevc_level to level_idc as specified in + * Rec. ITU-T H.265 (02/2018) A.4.1. + * + * Return: the level_idc for the passed level + */ +static inline int nal_hevc_level(enum v4l2_mpeg_video_hevc_level level) +{ + /* + * T-Rec-H.265 p. 280: general_level_idc and sub_layer_level_idc[ i ] + * shall be set equal to a value of 30 times the level number + * specified in Table A.6. + */ + int factor = 30 / 10; + + switch (level) { + case V4L2_MPEG_VIDEO_HEVC_LEVEL_1: + return factor * 10; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_2: + return factor * 20; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1: + return factor * 21; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_3: + return factor * 30; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1: + return factor * 31; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_4: + return factor * 40; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1: + return factor * 41; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_5: + return factor * 50; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1: + return factor * 51; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2: + return factor * 52; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_6: + return factor * 60; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1: + return factor * 61; + case V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2: + return factor * 62; + default: + return -EINVAL; + } +} int nal_range_from_v4l2(enum v4l2_quantization quantization); int nal_color_primaries_from_v4l2(enum v4l2_colorspace colorspace); From patchwork Wed Sep 8 13:03:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 508125 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AE0BC433F5 for ; Wed, 8 Sep 2021 13:04:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 142B161139 for ; Wed, 8 Sep 2021 13:04:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351792AbhIHNFX (ORCPT ); Wed, 8 Sep 2021 09:05:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234530AbhIHNFJ (ORCPT ); Wed, 8 Sep 2021 09:05:09 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1158DC061575 for ; Wed, 8 Sep 2021 06:04:01 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mNxF9-0005CF-Dn; Wed, 08 Sep 2021 15:03:59 +0200 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1mNxF8-0004Tn-Ln; Wed, 08 Sep 2021 15:03:58 +0200 Received: from mtr by dude03.red.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1mNxF5-00DpIr-KG; Wed, 08 Sep 2021 15:03:55 +0200 From: Michael Tretter To: linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil-cisco@xs4all.nl Cc: kernel@pengutronix.de, m.tretter@pengutronix.de Subject: [PATCH 6/7] media: allegro: nal-hevc: implement generator for vui Date: Wed, 8 Sep 2021 15:03:54 +0200 Message-Id: <20210908130355.3295403-7-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210908130355.3295403-1-m.tretter@pengutronix.de> References: <20210908130355.3295403-1-m.tretter@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-media@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The NAL unit generator for HEVC does not support the generation of vui parameters. Implement it to allow drivers to set the vui parameters in the coded video stream. Signed-off-by: Michael Tretter --- drivers/media/platform/allegro-dvt/nal-hevc.c | 132 +++++++++++++++++- 1 file changed, 131 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/allegro-dvt/nal-hevc.c b/drivers/media/platform/allegro-dvt/nal-hevc.c index 0999a2bdc812..9cdf2756e0a3 100644 --- a/drivers/media/platform/allegro-dvt/nal-hevc.c +++ b/drivers/media/platform/allegro-dvt/nal-hevc.c @@ -207,6 +207,136 @@ static void nal_hevc_rbsp_vps(struct rbsp *rbsp, struct nal_hevc_vps *vps) rbsp_unsupported(rbsp); } +static void nal_hevc_rbsp_sub_layer_hrd_parameters(struct rbsp *rbsp, + struct nal_hevc_sub_layer_hrd_parameters *hrd) +{ + unsigned int i; + unsigned int cpb_cnt = 1; + + for (i = 0; i < cpb_cnt; i++) { + rbsp_uev(rbsp, &hrd->bit_rate_value_minus1[i]); + rbsp_uev(rbsp, &hrd->cpb_size_value_minus1[i]); + rbsp_bit(rbsp, &hrd->cbr_flag[i]); + } +} + +static void nal_hevc_rbsp_hrd_parameters(struct rbsp *rbsp, + struct nal_hevc_hrd_parameters *hrd) +{ + unsigned int i; + unsigned int max_num_sub_layers_minus_1 = 0; + + rbsp_bit(rbsp, &hrd->nal_hrd_parameters_present_flag); + rbsp_bit(rbsp, &hrd->vcl_hrd_parameters_present_flag); + if (hrd->nal_hrd_parameters_present_flag || hrd->vcl_hrd_parameters_present_flag) { + rbsp_bit(rbsp, &hrd->sub_pic_hrd_params_present_flag); + if (hrd->sub_pic_hrd_params_present_flag) { + rbsp_bits(rbsp, 8, &hrd->tick_divisor_minus2); + rbsp_bits(rbsp, 5, &hrd->du_cpb_removal_delay_increment_length_minus1); + rbsp_bit(rbsp, &hrd->sub_pic_cpb_params_in_pic_timing_sei_flag); + rbsp_bits(rbsp, 5, &hrd->dpb_output_delay_du_length_minus1); + } + rbsp_bits(rbsp, 4, &hrd->bit_rate_scale); + rbsp_bits(rbsp, 4, &hrd->cpb_size_scale); + if (hrd->sub_pic_hrd_params_present_flag) + rbsp_bits(rbsp, 4, &hrd->cpb_size_du_scale); + rbsp_bits(rbsp, 5, &hrd->initial_cpb_removal_delay_length_minus1); + rbsp_bits(rbsp, 5, &hrd->au_cpb_removal_delay_length_minus1); + rbsp_bits(rbsp, 5, &hrd->dpb_output_delay_length_minus1); + } + for (i = 0; i <= max_num_sub_layers_minus_1; i++) { + rbsp_bit(rbsp, &hrd->fixed_pic_rate_general_flag[i]); + if (!hrd->fixed_pic_rate_general_flag[i]) + rbsp_bit(rbsp, &hrd->fixed_pic_rate_within_cvs_flag[i]); + if (hrd->fixed_pic_rate_within_cvs_flag[i]) + rbsp_uev(rbsp, &hrd->elemental_duration_in_tc_minus1[i]); + else + rbsp_bit(rbsp, &hrd->low_delay_hrd_flag[i]); + if (!hrd->low_delay_hrd_flag[i]) + rbsp_uev(rbsp, &hrd->cpb_cnt_minus1[i]); + if (hrd->nal_hrd_parameters_present_flag) + nal_hevc_rbsp_sub_layer_hrd_parameters(rbsp, &hrd->vcl_hrd[i]); + if (hrd->vcl_hrd_parameters_present_flag) + nal_hevc_rbsp_sub_layer_hrd_parameters(rbsp, &hrd->vcl_hrd[i]); + } +} + +static void nal_hevc_rbsp_vui_parameters(struct rbsp *rbsp, + struct nal_hevc_vui_parameters *vui) +{ + if (!vui) { + rbsp->error = -EINVAL; + return; + } + + rbsp_bit(rbsp, &vui->aspect_ratio_info_present_flag); + if (vui->aspect_ratio_info_present_flag) { + rbsp_bits(rbsp, 8, &vui->aspect_ratio_idc); + if (vui->aspect_ratio_idc == 255) { + rbsp_bits(rbsp, 16, &vui->sar_width); + rbsp_bits(rbsp, 16, &vui->sar_height); + } + } + + rbsp_bit(rbsp, &vui->overscan_info_present_flag); + if (vui->overscan_info_present_flag) + rbsp_bit(rbsp, &vui->overscan_appropriate_flag); + + rbsp_bit(rbsp, &vui->video_signal_type_present_flag); + if (vui->video_signal_type_present_flag) { + rbsp_bits(rbsp, 3, &vui->video_format); + rbsp_bit(rbsp, &vui->video_full_range_flag); + + rbsp_bit(rbsp, &vui->colour_description_present_flag); + if (vui->colour_description_present_flag) { + rbsp_bits(rbsp, 8, &vui->colour_primaries); + rbsp_bits(rbsp, 8, &vui->transfer_characteristics); + rbsp_bits(rbsp, 8, &vui->matrix_coeffs); + } + } + + rbsp_bit(rbsp, &vui->chroma_loc_info_present_flag); + if (vui->chroma_loc_info_present_flag) { + rbsp_uev(rbsp, &vui->chroma_sample_loc_type_top_field); + rbsp_uev(rbsp, &vui->chroma_sample_loc_type_bottom_field); + } + + rbsp_bit(rbsp, &vui->neutral_chroma_indication_flag); + rbsp_bit(rbsp, &vui->field_seq_flag); + rbsp_bit(rbsp, &vui->frame_field_info_present_flag); + rbsp_bit(rbsp, &vui->default_display_window_flag); + if (vui->default_display_window_flag) { + rbsp_uev(rbsp, &vui->def_disp_win_left_offset); + rbsp_uev(rbsp, &vui->def_disp_win_right_offset); + rbsp_uev(rbsp, &vui->def_disp_win_top_offset); + rbsp_uev(rbsp, &vui->def_disp_win_bottom_offset); + } + + rbsp_bit(rbsp, &vui->vui_timing_info_present_flag); + if (vui->vui_timing_info_present_flag) { + rbsp_bits(rbsp, 32, &vui->vui_num_units_in_tick); + rbsp_bits(rbsp, 32, &vui->vui_time_scale); + rbsp_bit(rbsp, &vui->vui_poc_proportional_to_timing_flag); + if (vui->vui_poc_proportional_to_timing_flag) + rbsp_uev(rbsp, &vui->vui_num_ticks_poc_diff_one_minus1); + rbsp_bit(rbsp, &vui->vui_hrd_parameters_present_flag); + if (vui->vui_hrd_parameters_present_flag) + nal_hevc_rbsp_hrd_parameters(rbsp, &vui->nal_hrd_parameters); + } + + rbsp_bit(rbsp, &vui->bitstream_restriction_flag); + if (vui->bitstream_restriction_flag) { + rbsp_bit(rbsp, &vui->tiles_fixed_structure_flag); + rbsp_bit(rbsp, &vui->motion_vectors_over_pic_boundaries_flag); + rbsp_bit(rbsp, &vui->restricted_ref_pic_lists_flag); + rbsp_uev(rbsp, &vui->min_spatial_segmentation_idc); + rbsp_uev(rbsp, &vui->max_bytes_per_pic_denom); + rbsp_uev(rbsp, &vui->max_bits_per_min_cu_denom); + rbsp_uev(rbsp, &vui->log2_max_mv_length_horizontal); + rbsp_uev(rbsp, &vui->log2_max_mv_length_vertical); + } +} + static void nal_hevc_rbsp_sps(struct rbsp *rbsp, struct nal_hevc_sps *sps) { unsigned int i; @@ -275,7 +405,7 @@ static void nal_hevc_rbsp_sps(struct rbsp *rbsp, struct nal_hevc_sps *sps) rbsp_bit(rbsp, &sps->strong_intra_smoothing_enabled_flag); rbsp_bit(rbsp, &sps->vui_parameters_present_flag); if (sps->vui_parameters_present_flag) - rbsp_unsupported(rbsp); + nal_hevc_rbsp_vui_parameters(rbsp, &sps->vui); rbsp_bit(rbsp, &sps->extension_present_flag); if (sps->extension_present_flag) {