From patchwork Thu Dec 2 22:38:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 520220 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 595C3C4332F for ; Thu, 2 Dec 2021 22:38:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377270AbhLBWl3 (ORCPT ); Thu, 2 Dec 2021 17:41:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349648AbhLBWl2 (ORCPT ); Thu, 2 Dec 2021 17:41:28 -0500 Received: from mail-qt1-x830.google.com (mail-qt1-x830.google.com [IPv6:2607:f8b0:4864:20::830]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6690DC06174A for ; Thu, 2 Dec 2021 14:38:05 -0800 (PST) Received: by mail-qt1-x830.google.com with SMTP id t11so1425336qtw.3 for ; Thu, 02 Dec 2021 14:38:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=f4wEwRGAvWV62eq6qhVfiri6Nb4hpjnoIOmNcuvAebk=; b=nYuGcqSxfJvK26Nz8QP339CyA1GgMApRheufiGrJY8Ny/b2fQWFetRSyfl7N84wQk8 z5G+uNMn2v2OtNR9buulqPicQJQ9bFYynk2DgpxVRNAeaqWCjMja9R0HknxUdV0Hckw0 xGDx9wx0pMgFNpvEZ6ex1HikUZYalGkr8UjCMN4AIs7ilqOMQ42JYWRzKKXcU4nNtzBh hGrjgkxsXkYJFA6TU9nxgM1+tg6pXvn/zob6wwoqXLkpmyFBerDzB1Afwp3IyfCAa49T CxOKkmdcHHtM4z7/0/2VSoVnS/C0Klq+88hXHI+PXYZyRzW2DrPPeZwDyiHOMnv6obgE yyxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=f4wEwRGAvWV62eq6qhVfiri6Nb4hpjnoIOmNcuvAebk=; b=csxCew6GJ4erg3GVY1dDH9ne7ojRvqC/D/IS1GG8Tcq+EfJXprCw+RN1qc2KgXt4F4 hQK/6npYoLruwNbJU81dc6D+lPZKgQaUF4/6a8vKwdM+d40cDkNP66EFcbJb2eZUB5z1 qkMo6DZUcMgNaa/FNbFn0VUNwHXLlHAueYEsTpREDPDAKX7AeRChX7LVC9UxduU2JHbK bRMUL616qTE317ok3MkFn9GYioOsFnWfLkevWZOEszKIfsNa1RxWcmWMmTxbtDwfPM68 psMZBqT5XbhKMjRDYopsZdaPP8RUhLT7JlaVH7Z89o6jjqI8CH2pJ7SghnRsT3ya6GCr 2UDA== X-Gm-Message-State: AOAM531RmWDQkBfWCX1HRLQpdYjwLXLgdgGXMN80JH/I0+7I/lU829L/ nlp2tc0LAZNfTN0d9jWmjziwyw== X-Google-Smtp-Source: ABdhPJw+YHa9uiZBGEaEnWMn0nknXfpW0ZIHQPWb+uiSNgx8h/ZSuPB6/RYIxCt34bZaitZvQpkf2A== X-Received: by 2002:ac8:7e90:: with SMTP id w16mr17002223qtj.257.1638484684609; Thu, 02 Dec 2021 14:38:04 -0800 (PST) Received: from pop-os.fios-router.home (pool-71-163-245-5.washdc.fios.verizon.net. [71.163.245.5]) by smtp.googlemail.com with ESMTPSA id h3sm961152qko.78.2021.12.02.14.38.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 14:38:04 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] thermal: qcom: lmh: Add support for sm8150 Date: Thu, 2 Dec 2021 17:38:00 -0500 Message-Id: <20211202223802.382068-2-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202223802.382068-1-thara.gopinath@linaro.org> References: <20211202223802.382068-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add compatible to support LMh for sm8150 SoC. sm8150 does not require explicit enabling for various LMh subsystems. Move this piece of code under condition that it is executed only for sdm845 SoC. Signed-off-by: Thara Gopinath --- drivers/thermal/qcom/lmh.c | 61 ++++++++++++++++++++------------------ 1 file changed, 32 insertions(+), 29 deletions(-) diff --git a/drivers/thermal/qcom/lmh.c b/drivers/thermal/qcom/lmh.c index eafa7526eb8b..e390c3fd0272 100644 --- a/drivers/thermal/qcom/lmh.c +++ b/drivers/thermal/qcom/lmh.c @@ -138,35 +138,37 @@ static int lmh_probe(struct platform_device *pdev) return -EINVAL; } - if (!qcom_scm_lmh_dcvsh_available()) - return -EINVAL; - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling current subfunction\n", ret); - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling reliability subfunction\n", ret); - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) - dev_err(dev, "Error %d enabling BCL subfunction\n", ret); - - ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, - LMH_NODE_DCVS, node_id, 0); - if (ret) { - dev_err(dev, "Error %d enabling thermal subfunction\n", ret); - return ret; - } - - ret = qcom_scm_lmh_profile_change(0x1); - if (ret) { - dev_err(dev, "Error %d changing profile\n", ret); - return ret; + if (of_device_is_compatible(np, "qcom,sdm845-lmh")) { + if (!qcom_scm_lmh_dcvsh_available()) + return -EINVAL; + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling current subfunction\n", ret); + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling reliability subfunction\n", ret); + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) + dev_err(dev, "Error %d enabling BCL subfunction\n", ret); + + ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, + LMH_NODE_DCVS, node_id, 0); + if (ret) { + dev_err(dev, "Error %d enabling thermal subfunction\n", ret); + return ret; + } + + ret = qcom_scm_lmh_profile_change(0x1); + if (ret) { + dev_err(dev, "Error %d changing profile\n", ret); + return ret; + } } /* Set default thermal trips */ @@ -214,6 +216,7 @@ static int lmh_probe(struct platform_device *pdev) static const struct of_device_id lmh_table[] = { { .compatible = "qcom,sdm845-lmh", }, + { .compatible = "qcom,sm8150-lmh", }, {} }; MODULE_DEVICE_TABLE(of, lmh_table); From patchwork Thu Dec 2 22:38:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 519803 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4135DC433F5 for ; Thu, 2 Dec 2021 22:38:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377372AbhLBWld (ORCPT ); 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[71.163.245.5]) by smtp.googlemail.com with ESMTPSA id h3sm961152qko.78.2021.12.02.14.38.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 14:38:05 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] arm64: dts: qcom: sm8150: Add support for LMh node Date: Thu, 2 Dec 2021 17:38:01 -0500 Message-Id: <20211202223802.382068-3-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202223802.382068-1-thara.gopinath@linaro.org> References: <20211202223802.382068-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add LMh nodes for cpu cluster0 and cpu cluster1 for sm8150 SoC. Signed-off-by: Thara Gopinath --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 81b4ff2cc4cd..e755d7ab78dd 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3650,6 +3650,30 @@ cpufreq_hw: cpufreq@18323000 { #freq-domain-cells = <1>; }; + lmh_cluster1: lmh@18350800 { + compatible = "qcom,sm8150-lmh"; + reg = <0 0x18350800 0 0x400>; + interrupts = ; + cpus = <&CPU4>; + qcom,lmh-temp-arm-millicelsius = <60000>; + qcom,lmh-temp-low-millicelsius = <84500>; + qcom,lmh-temp-high-millicelsius = <85000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + lmh_cluster0: lmh@18358800 { + compatible = "qcom,sm8150-lmh"; + reg = <0 0x18358800 0 0x400>; + interrupts = ; + cpus = <&CPU0>; + qcom,lmh-temp-arm-millicelsius = <60000>; + qcom,lmh-temp-low-millicelsius = <84500>; + qcom,lmh-temp-high-millicelsius = <85000>; + interrupt-controller; + #interrupt-cells = <1>; + }; + wifi: wifi@18800000 { compatible = "qcom,wcn3990-wifi"; reg = <0 0x18800000 0 0x800000>; From patchwork Thu Dec 2 22:38:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thara Gopinath X-Patchwork-Id: 520219 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77E53C433F5 for ; Thu, 2 Dec 2021 22:38:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377456AbhLBWlk (ORCPT ); Thu, 2 Dec 2021 17:41:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349648AbhLBWlb (ORCPT ); Thu, 2 Dec 2021 17:41:31 -0500 Received: from mail-qt1-x82c.google.com (mail-qt1-x82c.google.com [IPv6:2607:f8b0:4864:20::82c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4376CC06175C for ; Thu, 2 Dec 2021 14:38:07 -0800 (PST) Received: by mail-qt1-x82c.google.com with SMTP id n15so1475274qta.0 for ; Thu, 02 Dec 2021 14:38:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/YgkxkUgYa3cGXFN75ZNVpxqudNeMPhQu2Vflsaslk8=; b=kXDO6ZiBZCIi/mnCweRXGLA2xMwJarSMYy8jU8Z8J97OsNm9qT9phk279CqJLkXe6C 5DZfMIaCv0yJnDUQC1GhxA9g+q2wTyOiTURiMqwAqAmMLBMnlrXu8UOsTSKS14GWUisV 2w/D3o4NV3RxmAFx2gxN4xub2KfvmqX/rbRQRbewW+bHRa/aEvsgl56iTkPKQrIZyrNe P5ZX4ntuJFRUFY5HC1ZTXzSVx+/jvgFWCC74+7oCctqssZ+zC3vV/VqF9amWg8tkWiFB n0+ZJmcNgWxSoxD2JmOboNsMenMN+6zrbu4iD/TWCEcy+kXDlJY8zzPNYl2olhOZ6D/B DEfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/YgkxkUgYa3cGXFN75ZNVpxqudNeMPhQu2Vflsaslk8=; b=FPlZMu4WIHBVOSXvQxMDkc3Yh4b+znb09vaKGEijJRqvcEANtjUFF4IPmkHG2Muq7j SGm8NJPeV5RZUFs7sNwATM2osaTLJb/RDkCWrOTDeLkxhsG44ahcD6JwILQzgW97XmbK MSNZdbJMQkY6JLDjiT+sjnk2qObL4iVj3hXP4ZV0rfiuEchd0omz41nPodeTiqZh/N/y WhuN+sQ5PO+b8A5BMblKLzZuOGtW27+CPlVXGDFwpwhJ0yovrPllDyfkM+TiRg4uOII3 4we1Ybtw4AXZwvVAFfRdt4XGvBdzIJwpuKKXSUVhPuqmdzlDQyuOe7MD7e6RNOKGF8dP VQbA== X-Gm-Message-State: AOAM533WbReftGUmy0LPaMjJ/TLlUDpC+tDA2npVOlu32rrOW6DgXIZo 355TvcAP7icSojwep50PLmnvHbSbSbHmJQ== X-Google-Smtp-Source: ABdhPJw5thbB/dwtKRrrsemIkR0hgl49PqQvYWmXUWSSKHPwBpOe14Uc2RUufrjd5T2vkX1MAo4jAg== X-Received: by 2002:ac8:5c53:: with SMTP id j19mr16615598qtj.40.1638484686382; Thu, 02 Dec 2021 14:38:06 -0800 (PST) Received: from pop-os.fios-router.home (pool-71-163-245-5.washdc.fios.verizon.net. [71.163.245.5]) by smtp.googlemail.com with ESMTPSA id h3sm961152qko.78.2021.12.02.14.38.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 14:38:06 -0800 (PST) From: Thara Gopinath To: agross@kernel.org, bjorn.andersson@linaro.org, daniel.lezcano@linaro.org, rafael@kernel.org, rui.zhang@intel.com, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] dt-bindings: thermal: Add sm8150 compatible string for LMh Date: Thu, 2 Dec 2021 17:38:02 -0500 Message-Id: <20211202223802.382068-4-thara.gopinath@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211202223802.382068-1-thara.gopinath@linaro.org> References: <20211202223802.382068-1-thara.gopinath@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Extend the LMh dt binding document to include compatible string supporting sm8150 SoC. Signed-off-by: Thara Gopinath --- Documentation/devicetree/bindings/thermal/qcom-lmh.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml index 289e9a845600..a9b7388ca9ac 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - qcom,sdm845-lmh + - qcom,sm8150-lmh reg: items: