From patchwork Sat Dec 4 21:58:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 521767 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDD87C43219 for ; Sat, 4 Dec 2021 21:58:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344786AbhLDWBv (ORCPT ); Sat, 4 Dec 2021 17:01:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238719AbhLDWBu (ORCPT ); Sat, 4 Dec 2021 17:01:50 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39A1FC061354 for ; Sat, 4 Dec 2021 13:58:24 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id j140-20020a1c2392000000b003399ae48f58so7554087wmj.5 for ; Sat, 04 Dec 2021 13:58:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZcRHvW6bfEvOLIyYySuv2qE2GSS7ehbl/asNSPEPqM4=; b=OxluEssHaHt7b4Y1wzk2CJ2CYgLfrnV/SOjRgF5vkWac43NVlHwNDlSfNdtHhMB80T rTGlepvaNLu6+BX1EYd9QoLIe/hAbqiTM3cju7y8nLium7OleT9jelzZb7FLjqdV0KME 0zMerUUm8AyE9us2zkPWmM3XrFw1JqWGmdUoVIUfZKknPt+fofl8L9NtC4DBtaV+Y/pi XebiI4XzyLrvaCoV+lD32fkcGnVwIZP5InWoW2jqZfdNmjMvh7qmlJzCYLmaGCTReQy7 uutw5BhARgHt0LhDvDHT4GtUbNex7OwswcotkfYynkr2s//y7/8sfzLGydof4ZXjsUC+ aEIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZcRHvW6bfEvOLIyYySuv2qE2GSS7ehbl/asNSPEPqM4=; b=c5MDnNj72fTYW0u/p0wQn3EEMhNXaP+/PLow11WZEcpOe6S4givAzzAaGUYEDw794L sV2ew0AsHLfHoY2roBF/a0ONs7nA+WdrUpCvkZlQ1uqIWOAhnjocUbGlEtGF+caxkm5X ToLUQ8JNyu1mTRDMEC8LOCjfs2oG7eAry90YtQhfswb7gxrVdSuOXwgMmglOQAvOVar8 4cc+MkhqysoWAQhmIhc8zieR2BReo1u+tWDnvpmDbE2vlX5GEBOuoMTVb7cHkoAp666m PJEg1xw5Bt0lqQELAE1PUuz7dy/Yq3Ssct4B396PDNWwl/ZlbAVgcV0jnbVVHUNFptEc X+tg== X-Gm-Message-State: AOAM5310EgMHHHMqvEiO8T4n+29zUfCXy79icFqN2hqCTNLF/jRq2rdU npOskyt23TiSht3+GdwXhV0AIg== X-Google-Smtp-Source: ABdhPJwVC8MKd1vm071VRJRXaqyeKtlMiHmYQZ0TpGQP/SNUSu5amnBQKqwqI0LBLWvYE9IE23mpPQ== X-Received: by 2002:a05:600c:a49:: with SMTP id c9mr26055932wmq.172.1638655102741; Sat, 04 Dec 2021 13:58:22 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id az4sm9249960wmb.20.2021.12.04.13.58.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Dec 2021 13:58:22 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 1/8] dt-bindings: i2c: exynos5: Convert to dtschema Date: Sat, 4 Dec 2021 23:58:13 +0200 Message-Id: <20211204215820.17378-2-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Convert Samsung Exynos High Speed I2C bindings doc to DT schema format. Changes during bindings conversion: 1. Added missing required clock properties (driver fails when it's unable to get the clock) 2. Removed properties and descriptions that can be found in schemas/i2c/i2c-controller.yaml [1] 3. Fixed the example so it can be validated by dtschema [1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - Added R-b tag by Krzysztof Kozlowski .../devicetree/bindings/i2c/i2c-exynos5.txt | 53 ------------ .../devicetree/bindings/i2c/i2c-exynos5.yaml | 80 +++++++++++++++++++ 2 files changed, 80 insertions(+), 53 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.txt create mode 100644 Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt deleted file mode 100644 index 2dbc0b62daa6..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Samsung's High Speed I2C controller - -The Samsung's High Speed I2C controller is used to interface with I2C devices -at various speeds ranging from 100khz to 3.4Mhz. - -Required properties: - - compatible: value should be. - -> "samsung,exynos5-hsi2c", (DEPRECATED) - for i2c compatible with HSI2C available - on Exynos5250 and Exynos5420 SoCs. - -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available - on Exynos5250 and Exynos5420 SoCs. - -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available - on Exynos5260 SoCs. - -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available - on Exynos7 SoCs. - - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: interrupt number to the cpu. - - #address-cells: always 1 (for i2c addresses) - - #size-cells: always 0 - - - Pinctrl: - - pinctrl-0: Pin control group to be used for this controller. - - pinctrl-names: Should contain only one value - "default". - -Optional properties: - - clock-frequency: Desired operating frequency in Hz of the bus. - -> If not specified, the bus operates in fast-speed mode at - at 100khz. - -> If specified, the bus operates in high-speed mode only if the - clock-frequency is >= 1Mhz. - -Example: - -hsi2c@12ca0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12ca0000 0x100>; - interrupts = <56>; - clock-frequency = <100000>; - - pinctrl-0 = <&i2c4_bus>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - - s2mps11_pmic@66 { - compatible = "samsung,s2mps11-pmic"; - reg = <0x66>; - }; -}; diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml new file mode 100644 index 000000000000..16853f6edc53 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung's High Speed I2C controller + +maintainers: + - Krzysztof Kozlowski + +description: | + The Samsung's High Speed I2C controller is used to interface with I2C devices + at various speeds ranging from 100kHz to 3.4MHz. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - enum: + - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 + - samsung,exynos5260-hsi2c # Exynos5260 + - samsung,exynos7-hsi2c # Exynos7 + - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 + deprecated: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-frequency: + default: 100000 + description: + Desired operating frequency in Hz of the bus. + + If not specified, the bus operates in fast-speed mode at 100kHz. + + If specified, the bus operates in high-speed mode only if the + clock-frequency is >= 1MHz. + + clocks: + maxItems: 1 + description: I2C operating clock + + clock-names: + const: hsi2c + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + hsi2c_8: i2c@12e00000 { + compatible = "samsung,exynos5250-hsi2c"; + reg = <0x12e00000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + clocks = <&clock CLK_USI4>; + clock-names = "hsi2c"; + + pmic@66 { + /* compatible = "samsung,s2mps11-pmic"; */ + reg = <0x66>; + }; + }; From patchwork Sat Dec 4 21:58:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 520683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50173C433EF for ; Sat, 4 Dec 2021 21:58:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345233AbhLDWBx (ORCPT ); Sat, 4 Dec 2021 17:01:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344863AbhLDWBv (ORCPT ); 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Sat, 04 Dec 2021 13:58:23 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 2/8] dt-bindings: i2c: exynos5: Add exynosautov9-hsi2c compatible Date: Sat, 4 Dec 2021 23:58:14 +0200 Message-Id: <20211204215820.17378-3-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Jaewon Kim This patch adds new "samsung,exynosautov9-hsi2c" compatible. It is for i2c compatible with HSI2C available on Exynos SoC with USI. Signed-off-by: Jaewon Kim Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski Acked-by: Rob Herring --- Changes in v2: - Added R-b tag by Krzysztof Kozlowski - Removed quotes around compatible strings - Added Exynos850 to comment Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index 16853f6edc53..bb6c22fbc442 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -13,6 +13,11 @@ description: | The Samsung's High Speed I2C controller is used to interface with I2C devices at various speeds ranging from 100kHz to 3.4MHz. + In case the HSI2C controller is encapsulated within USI block (it's the case + e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to + define USI node in device tree file, choosing "i2c" configuration. Please see + Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. + allOf: - $ref: /schemas/i2c/i2c-controller.yaml# @@ -23,6 +28,7 @@ properties: - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 - samsung,exynos5260-hsi2c # Exynos5260 - samsung,exynos7-hsi2c # Exynos7 + - samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850 - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 deprecated: true From patchwork Sat Dec 4 21:58:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 520680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 841FAC433FE for ; Sat, 4 Dec 2021 21:58:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379621AbhLDWCL (ORCPT ); Sat, 4 Dec 2021 17:02:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47450 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345345AbhLDWBx (ORCPT ); Sat, 4 Dec 2021 17:01:53 -0500 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB2DBC061359 for ; Sat, 4 Dec 2021 13:58:26 -0800 (PST) Received: by mail-wm1-x32c.google.com with SMTP id y196so5168361wmc.3 for ; Sat, 04 Dec 2021 13:58:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TQEb5+4d/MHt4xPSobaL7ml5ouD0gEGBDjqG0G4xX9M=; b=bMvib3+0+Wys7m2opfbcYMtwZH0h9iF7p5WHE975CgOxfIggqJfOAwhbBGQiOkpmLp Y7yrLRbn730nzfj7KgrVmU1ut8gDYH3Fh0l/e/Bje+IE62QakfP23MEcqkdYEPG9VF9q Ean/drejcExfdq6JZQdEa8CRmITPgg/mQ4YSk6PHwnja3k2790wCXwB1TowknWC5Bjq2 9iwwAgaoij7yFXiepCq8DjpEE2YbgnJ9NWvg4I0UqvnY3KME+H0d7h0/Hunl4soe+P3U wYrCB/WjFHO10eut0MjupN93G9AD3QAA1DPPrlk4jWunAW6PSkJOXdBtk2wj2X4qzASk uokA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TQEb5+4d/MHt4xPSobaL7ml5ouD0gEGBDjqG0G4xX9M=; b=VVkzwfPKK7h9tWZabu1HdiMw+FvMvUHlLfjjF6zw81+sf7wpVLmvcepx4Xp/TFei8h RqctfRg+EUVIlfvdiAcs+5ihcZs9wlnEfZPU4WXNGAF4dcXquWmdzHGd7wIYhkRGGQzP sH6bWVwBbqCxuwxoeD1O6OCFB8+qkyzdIAlzULLbUDJm8g+CUBZ+SuHeV3Wrsx86GNzF qtMqeHut+WXHn989sX7VvviCw+09nDD4d+oj0+VrJ+qypeCOmaWkmijb64LW9dn1/FSU D1++qM2JeP/ZF0IzN11VR8kQtl6RcyEnN/IeU3hZ2GDj6fXB/Nc3RKdJrx+hmTWW2Evw M3rg== X-Gm-Message-State: AOAM530R/zE0VoK46bIXjcikRtavlnL5NBy0nj6a/lHqy1wbRYMm3sy9 bR2qcmDifYjkXhr7ekoeZkArzg== X-Google-Smtp-Source: ABdhPJxsmUmcm4wGrsq5SHc9haax2YPJ+pJMSSGHPb093CeXkzhok2gdt19LICBfpHEVXblBur9Cbw== X-Received: by 2002:a1c:1c8:: with SMTP id 191mr25771329wmb.90.1638655105330; Sat, 04 Dec 2021 13:58:25 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id q8sm6570843wrx.71.2021.12.04.13.58.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Dec 2021 13:58:24 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 3/8] dt-bindings: i2c: exynos5: Add bus clock Date: Sat, 4 Dec 2021 23:58:15 +0200 Message-Id: <20211204215820.17378-4-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a part of USIv2 block, there are two clocks provided to HSI2C controller: - PCLK: bus clock (APB), provides access to register interface - IPCLK: operating IP-core clock; SCL is derived from this one Both clocks have to be asserted for HSI2C to be functional in that case. Modify bindings doc to allow specifying bus clock in addition to already described operating clock. Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - Added 'clock-names' property to 'required:' in case of ExynosAutoV9 - Added example for two clocks case .../devicetree/bindings/i2c/i2c-exynos5.yaml | 59 +++++++++++++++++-- 1 file changed, 53 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml index bb6c22fbc442..19874e8b73b9 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml @@ -18,9 +18,6 @@ description: | define USI node in device tree file, choosing "i2c" configuration. Please see Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. -allOf: - - $ref: /schemas/i2c/i2c-controller.yaml# - properties: compatible: oneOf: @@ -49,11 +46,16 @@ properties: clock-frequency is >= 1MHz. clocks: - maxItems: 1 - description: I2C operating clock + minItems: 1 + items: + - description: I2C operating clock + - description: Bus clock (APB) clock-names: - const: hsi2c + minItems: 1 + items: + - const: hsi2c + - const: hsi2c_pclk required: - compatible @@ -61,6 +63,31 @@ required: - interrupts - clocks +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov9-hsi2c + + then: + properties: + clocks: + minItems: 2 + + clock-names: + minItems: 2 + + required: + - clock-names + + else: + properties: + clocks: + maxItems: 1 + unevaluatedProperties: false examples: @@ -84,3 +111,23 @@ examples: reg = <0x66>; }; }; + + - | + #include + #include + + hsi2c_2: i2c@138c0000 { + compatible = "samsung,exynosautov9-hsi2c"; + reg = <0x138c0000 0xc0>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>, + <&cmu_peri CLK_GOUT_HSI2C2_PCLK>; + clock-names = "hsi2c", "hsi2c_pclk"; + + pmic@66 { + /* compatible = "samsung,s2mps11-pmic"; */ + reg = <0x66>; + }; + }; From patchwork Sat Dec 4 21:58:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 521764 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE40CC433EF for ; Sat, 4 Dec 2021 21:58:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345466AbhLDWBz (ORCPT ); Sat, 4 Dec 2021 17:01:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345401AbhLDWBy (ORCPT ); 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Sat, 04 Dec 2021 13:58:26 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 4/8] i2c: exynos5: Add support for ExynosAutoV9 SoC Date: Sat, 4 Dec 2021 23:58:16 +0200 Message-Id: <20211204215820.17378-5-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Jaewon Kim ExynosAutoV9 functioning logic mostly follows I2C_TYPE_EXYNOS7, but timing calculation and configuration procedure is changed: e.g. only timing_s3 has to be set now. Another change of HSI2C controller in ExynosAutoV9 SoC is that it's now a part of USIv2 IP-core. No changes is needed for I2C driver though, as all USI related configuration is done in USI driver. Signed-off-by: Jaewon Kim Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski --- Changes in v2: - Added R-b tag by Krzysztof Kozlowski drivers/i2c/busses/i2c-exynos5.c | 62 +++++++++++++++++++++++++++----- 1 file changed, 53 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index c2e4bab11366..5198e71e8dab 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -169,6 +169,7 @@ enum i2c_type_exynos { I2C_TYPE_EXYNOS5, I2C_TYPE_EXYNOS7, + I2C_TYPE_EXYNOSAUTOV9, }; struct exynos5_i2c { @@ -230,6 +231,11 @@ static const struct exynos_hsi2c_variant exynos7_hsi2c_data = { .hw = I2C_TYPE_EXYNOS7, }; +static const struct exynos_hsi2c_variant exynosautov9_hsi2c_data = { + .fifo_depth = 64, + .hw = I2C_TYPE_EXYNOSAUTOV9, +}; + static const struct of_device_id exynos5_i2c_match[] = { { .compatible = "samsung,exynos5-hsi2c", @@ -243,6 +249,9 @@ static const struct of_device_id exynos5_i2c_match[] = { }, { .compatible = "samsung,exynos7-hsi2c", .data = &exynos7_hsi2c_data + }, { + .compatible = "samsung,exynosautov9-hsi2c", + .data = &exynosautov9_hsi2c_data }, {}, }; MODULE_DEVICE_TABLE(of, exynos5_i2c_match); @@ -281,6 +290,31 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) i2c->op_clock; int div, clk_cycle, temp; + /* + * In case of HSI2C controllers in ExynosAutoV9: + * + * FSCL = IPCLK / ((CLK_DIV + 1) * 16) + * T_SCL_LOW = IPCLK * (CLK_DIV + 1) * (N + M) + * [N : number of 0's in the TSCL_H_HS] + * [M : number of 0's in the TSCL_L_HS] + * T_SCL_HIGH = IPCLK * (CLK_DIV + 1) * (N + M) + * [N : number of 1's in the TSCL_H_HS] + * [M : number of 1's in the TSCL_L_HS] + * + * Result of (N + M) is always 8. + * In general case, we don't need to control timing_s1 and timing_s2. + */ + if (i2c->variant->hw == I2C_TYPE_EXYNOSAUTOV9) { + div = ((clkin / (16 * i2c->op_clock)) - 1); + i2c_timing_s3 = div << 16; + if (hs_timings) + writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_HS3); + else + writel(i2c_timing_s3, i2c->regs + HSI2C_TIMING_FS3); + + return 0; + } + /* * In case of HSI2C controller in Exynos5 series * FPCLK / FI2C = @@ -422,7 +456,10 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id) writel(int_status, i2c->regs + HSI2C_INT_STATUS); /* handle interrupt related to the transfer status */ - if (i2c->variant->hw == I2C_TYPE_EXYNOS7) { + switch (i2c->variant->hw) { + case I2C_TYPE_EXYNOSAUTOV9: + fallthrough; + case I2C_TYPE_EXYNOS7: if (int_status & HSI2C_INT_TRANS_DONE) { i2c->trans_done = 1; i2c->state = 0; @@ -443,7 +480,12 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id) i2c->state = -ETIMEDOUT; goto stop; } - } else if (int_status & HSI2C_INT_I2C) { + + break; + case I2C_TYPE_EXYNOS5: + if (!(int_status & HSI2C_INT_I2C)) + break; + trans_status = readl(i2c->regs + HSI2C_TRANS_STATUS); if (trans_status & HSI2C_NO_DEV_ACK) { dev_dbg(i2c->dev, "No ACK from device\n"); @@ -465,6 +507,8 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id) i2c->trans_done = 1; i2c->state = 0; } + + break; } if ((i2c->msg->flags & I2C_M_RD) && (int_status & @@ -569,13 +613,13 @@ static void exynos5_i2c_bus_check(struct exynos5_i2c *i2c) { unsigned long timeout; - if (i2c->variant->hw != I2C_TYPE_EXYNOS7) + if (i2c->variant->hw == I2C_TYPE_EXYNOS5) return; /* - * HSI2C_MASTER_ST_LOSE state in EXYNOS7 variant before transaction - * indicates that bus is stuck (SDA is low). In such case bus recovery - * can be performed. + * HSI2C_MASTER_ST_LOSE state (in Exynos7 and ExynosAutoV9 variants) + * before transaction indicates that bus is stuck (SDA is low). + * In such case bus recovery can be performed. */ timeout = jiffies + msecs_to_jiffies(100); for (;;) { @@ -611,10 +655,10 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop) unsigned long flags; unsigned short trig_lvl; - if (i2c->variant->hw == I2C_TYPE_EXYNOS7) - int_en |= HSI2C_INT_I2C_TRANS; - else + if (i2c->variant->hw == I2C_TYPE_EXYNOS5) int_en |= HSI2C_INT_I2C; + else + int_en |= HSI2C_INT_I2C_TRANS; i2c_ctl = readl(i2c->regs + HSI2C_CTL); i2c_ctl &= ~(HSI2C_TXCHON | HSI2C_RXCHON); From patchwork Sat Dec 4 21:58:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 521766 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F6F8C4332F for ; Sat, 4 Dec 2021 21:58:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345413AbhLDWB5 (ORCPT ); Sat, 4 Dec 2021 17:01:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47486 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352179AbhLDWBz (ORCPT ); Sat, 4 Dec 2021 17:01:55 -0500 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54DACC061A83 for ; Sat, 4 Dec 2021 13:58:29 -0800 (PST) Received: by mail-wr1-x42f.google.com with SMTP id c4so13632780wrd.9 for ; Sat, 04 Dec 2021 13:58:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pVkIUWY0OSvWRa+LskKzcmg/hbEtnNu06lHh+/SBJ88=; b=jtTQqh7N0SLriwGsBR5oh0PgT7Jb6IvnfLcNr4UJCU7ejNXjRbNwMSbzX1KGXmaaG6 GU6xm/tW7D46MPx91EQjMCL1IcBgFZ0K2v/Le4wMyzyp2Ov4UTNKsiFw44dODIPekDk1 Q8cZC9SdVLtkFHC+Re3xzQ4cZoEr3Y8v/tm5UDFeGXONzTy0dow3wKiKdv6mLfReRmaJ 6C4nf6bFbfs6MaIuSYakLR5kixjBjabh4cg98kzUBjWNsLTmJXf8VRcHYUtUy3vOXfIi 8ZI77swJ9/21gyKgo181tXTClcrqpKdn3chSh3tPLxo4Sv5XQ+gfV+fp15C9005U/QF2 Xp2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pVkIUWY0OSvWRa+LskKzcmg/hbEtnNu06lHh+/SBJ88=; b=xNU1AL9Q/zQXecUhBDiwuvEJri0+6UQK1DgGY3LzfmzJ7xZuOlZceX03uC5NQ60QNl oqf1//wD06qyur+0zZ0IHdsNJ24TUAlMilE0bi9c3QrxJwaLuIagaP3OWY4Z06TVzE/n sdAWnI+fj/6pWyutU17tVXiWgiEHejqn5fZgfuO94dpBWAOWIHw5XG578I57EkX+OrDO RkaQQN1vMhH2XM3yY1h0O/ICri7t8cvfvdsLazIFvWuDOcA861u+BDSygmIleZKIvK7k cFEMbUM9YoVt6oXp8ONaV4AZbyo8AuQpDZ2ukkUq4IUGEkNvJ1CzNttnanH8zQgD3Wvq rvXQ== X-Gm-Message-State: AOAM531v/o/uC40y//q4C2Rn6VzLyCAZK35HCZDbVcew2fuY5zm0w3zk Lyuqt6/qS9crFjzXjpYSFyMQ7Q== X-Google-Smtp-Source: ABdhPJysRLvjvu3wwayEb3/5YITYMgCYzIXsHPLKl9uQ1yLZrkaU1RGJ4o2xUUWgaAf5lepVHhuPxw== X-Received: by 2002:adf:f1cc:: with SMTP id z12mr31501907wro.395.1638655107961; Sat, 04 Dec 2021 13:58:27 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id g13sm9318810wrd.57.2021.12.04.13.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Dec 2021 13:58:27 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 5/8] i2c: exynos5: Add bus clock support Date: Sat, 4 Dec 2021 23:58:17 +0200 Message-Id: <20211204215820.17378-6-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org In new Exynos SoCs (like Exynos850) where HSI2C is implemented as a part of USIv2 block, there are two clocks provided to HSI2C controller: - PCLK: bus clock (APB), provides access to register interface - IPCLK: operating IP-core clock; SCL is derived from this one Both clocks have to be asserted for HSI2C to be functional in that case. Add code to obtain and enable/disable PCLK in addition to already handled operating clock. Make it optional though, as older Exynos SoC variants only have one HSI2C clock. Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski Reviewed-by: Chanho Park --- Changes in v2: - Added R-b tag by Krzysztof Kozlowski - Added R-b tag by Chanho Park drivers/i2c/busses/i2c-exynos5.c | 46 ++++++++++++++++++++++++++------ 1 file changed, 38 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index 5198e71e8dab..9cde5ecb9449 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -182,7 +182,8 @@ struct exynos5_i2c { unsigned int irq; void __iomem *regs; - struct clk *clk; + struct clk *clk; /* operating clock */ + struct clk *pclk; /* bus clock */ struct device *dev; int state; @@ -757,10 +758,14 @@ static int exynos5_i2c_xfer(struct i2c_adapter *adap, struct exynos5_i2c *i2c = adap->algo_data; int i, ret; - ret = clk_enable(i2c->clk); + ret = clk_enable(i2c->pclk); if (ret) return ret; + ret = clk_enable(i2c->clk); + if (ret) + goto err_pclk; + for (i = 0; i < num; ++i) { ret = exynos5_i2c_xfer_msg(i2c, msgs + i, i + 1 == num); if (ret) @@ -768,6 +773,8 @@ static int exynos5_i2c_xfer(struct i2c_adapter *adap, } clk_disable(i2c->clk); +err_pclk: + clk_disable(i2c->pclk); return ret ?: num; } @@ -807,10 +814,18 @@ static int exynos5_i2c_probe(struct platform_device *pdev) return -ENOENT; } - ret = clk_prepare_enable(i2c->clk); + i2c->pclk = devm_clk_get(&pdev->dev, "hsi2c_pclk"); + if (IS_ERR(i2c->pclk)) + i2c->pclk = NULL; /* pclk is optional */ + + ret = clk_prepare_enable(i2c->pclk); if (ret) return ret; + ret = clk_prepare_enable(i2c->clk); + if (ret) + goto err_pclk; + i2c->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(i2c->regs)) { ret = PTR_ERR(i2c->regs); @@ -853,6 +868,7 @@ static int exynos5_i2c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, i2c); clk_disable(i2c->clk); + clk_disable(i2c->pclk); dev_info(&pdev->dev, "%s: HSI2C adapter\n", dev_name(&i2c->adap.dev)); @@ -860,6 +876,9 @@ static int exynos5_i2c_probe(struct platform_device *pdev) err_clk: clk_disable_unprepare(i2c->clk); + + err_pclk: + clk_disable_unprepare(i2c->pclk); return ret; } @@ -870,6 +889,7 @@ static int exynos5_i2c_remove(struct platform_device *pdev) i2c_del_adapter(&i2c->adap); clk_unprepare(i2c->clk); + clk_unprepare(i2c->pclk); return 0; } @@ -881,6 +901,7 @@ static int exynos5_i2c_suspend_noirq(struct device *dev) i2c_mark_adapter_suspended(&i2c->adap); clk_unprepare(i2c->clk); + clk_unprepare(i2c->pclk); return 0; } @@ -890,21 +911,30 @@ static int exynos5_i2c_resume_noirq(struct device *dev) struct exynos5_i2c *i2c = dev_get_drvdata(dev); int ret = 0; - ret = clk_prepare_enable(i2c->clk); + ret = clk_prepare_enable(i2c->pclk); if (ret) return ret; + ret = clk_prepare_enable(i2c->clk); + if (ret) + goto err_pclk; + ret = exynos5_hsi2c_clock_setup(i2c); - if (ret) { - clk_disable_unprepare(i2c->clk); - return ret; - } + if (ret) + goto err_clk; exynos5_i2c_init(i2c); clk_disable(i2c->clk); + clk_disable(i2c->pclk); i2c_mark_adapter_resumed(&i2c->adap); return 0; + +err_clk: + clk_disable_unprepare(i2c->clk); +err_pclk: + clk_disable_unprepare(i2c->pclk); + return ret; } #endif From patchwork Sat Dec 4 21:58:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 520682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B435C433EF for ; Sat, 4 Dec 2021 21:58:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355824AbhLDWB6 (ORCPT ); Sat, 4 Dec 2021 17:01:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355715AbhLDWB5 (ORCPT ); Sat, 4 Dec 2021 17:01:57 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B8671C061359 for ; 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Sat, 04 Dec 2021 13:58:29 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id z6sm7924914wmp.9.2021.12.04.13.58.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Dec 2021 13:58:29 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 6/8] i2c: exynos5: Mention Exynos850 and ExynosAutoV9 in Kconfig Date: Sat, 4 Dec 2021 23:58:18 +0200 Message-Id: <20211204215820.17378-7-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org I2C controller chosen by I2C_EXYNOS5 config option is also suitable for Exynos850 and ExynosAutoV9 SoCs. State that specifically in I2C_EXYNOS5 symbol help section. Signed-off-by: Sam Protsenko Reviewed-by: Krzysztof Kozlowski Reviewed-by: Chanho Park --- Changes in v2: - Added R-b tag by Krzysztof Kozlowski - Added R-b tag by Chanho Park drivers/i2c/busses/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index df89cb809330..42da31c1ab70 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -617,7 +617,7 @@ config I2C_EXYNOS5 help High-speed I2C controller on Samsung Exynos5 and newer Samsung SoCs: Exynos5250, Exynos5260, Exynos5410, Exynos542x, Exynos5800, - Exynos5433 and Exynos7. + Exynos5433, Exynos7, Exynos850 and ExynosAutoV9. Choose Y here only if you build for such Samsung SoC. config I2C_GPIO From patchwork Sat Dec 4 21:50:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 520685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04290C43219 for ; Sat, 4 Dec 2021 21:51:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379232AbhLDVzC (ORCPT ); Sat, 4 Dec 2021 16:55:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379410AbhLDVyM (ORCPT ); Sat, 4 Dec 2021 16:54:12 -0500 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97B6EC061354 for ; Sat, 4 Dec 2021 13:50:46 -0800 (PST) Received: by mail-wm1-x32b.google.com with SMTP id y196so5161657wmc.3 for ; Sat, 04 Dec 2021 13:50:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=68SA4R0NxLIr37Da5nfLfh6Rq6kJdXUgL0ant2P/Sj4=; b=DfQH/J3lFsJL/4doc0DHJyFgiG3tiIT0umEEr7A3zlof5Zq6UT/vmsg4AFlAVdOrff HO4eDSGhUaxJKCUJSJu5oWEIhODphofDUFYX2LZaY3o9r4syF6kf2yZyxrT6kY1fREqw 2m7ZZodHelhkBQH3Ubx33XZo4i3YkuvUjMP2qwfMLR93BcPMjXajsbiFfPcJNrLy3/mZ hBqaMCXzpIBIXgtKxup5Oa0WywuhdUGG1M8DruurLCvfBpqC1Vq2Tdqtz9IPjdrjTcQ9 e4g9Ou68nCZVdhJOLsysk1SRV2HjcoA2i8+xe6/mXR90nn0R03i8HRIF5+56ovFml+x1 Jd8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=68SA4R0NxLIr37Da5nfLfh6Rq6kJdXUgL0ant2P/Sj4=; b=0FPmsw7GhyBmH7oeHqhs1r+fqqpb7fvVL2EYV1QZVihus/wp4oWKl/MUEO+aYQupmo msbQAMnENIq2GJL/bqRutYxyXbgwwLdJMvC9UKHXqbrck5iBaE2mSgTlwl/eTQVJ9FAm UbcpkomMoxIRhOA/r7v8c9HKjHNi+Gdk+nrmQkCiIKijJOOiEkdCXeJU2MrLH1yzJKXQ BvAOCJcbXSWBhhSUKxYKf6n8eT8dU/7mUz7bMFfz0tf6hbvMD8BYtpm6ZzOTjewhu6te aZsGgPY9iXbOgHh1LSZ5zvrDBQvrr1uNtvf5Ij4K59DF++pY21EhXwWWz6gXB9JWrLwS 8Jlw== X-Gm-Message-State: AOAM530zgmKaskydmURGQUMNE48tMbPsDnEouDEbvs2NmXQqjoMPM29B 6SzNoAQ3MqxPl7UjxXyuFWKctw== X-Google-Smtp-Source: ABdhPJxg6zYHX/wn2h11gWbATGIfIOzg77VcmmUb7U9+Dht0OhnO402P6b76UA+S4iJShOKRrtakrg== X-Received: by 2002:a05:600c:4e01:: with SMTP id b1mr26102478wmq.109.1638654645242; Sat, 04 Dec 2021 13:50:45 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id f7sm11250303wmg.6.2021.12.04.13.50.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Dec 2021 13:50:44 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 7/8] arm: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260 Date: Sat, 4 Dec 2021 23:50:32 +0200 Message-Id: <20211204215033.5134-8-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215033.5134-1-semen.protsenko@linaro.org> References: <20211204215033.5134-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org In Device Tree specification it's recommended to use "i2c" name for I2C nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some warnings like this when validating HS-I2C nodes: hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match '^i2c(@.*)?' From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml Rename hsi2c@* to i2c@* to fix those warnings. Signed-off-by: Sam Protsenko --- Changes in v2: - This patch was added in v2 arch/arm/boot/dts/exynos5260.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi index 52fa211525ce..524d244050e0 100644 --- a/arch/arm/boot/dts/exynos5260.dtsi +++ b/arch/arm/boot/dts/exynos5260.dtsi @@ -368,7 +368,7 @@ mmc_2: mmc@12160000 { status = "disabled"; }; - hsi2c_0: hsi2c@12da0000 { + hsi2c_0: i2c@12da0000 { compatible = "samsung,exynos5260-hsi2c"; reg = <0x12DA0000 0x1000>; interrupts = ; @@ -381,7 +381,7 @@ hsi2c_0: hsi2c@12da0000 { status = "disabled"; }; - hsi2c_1: hsi2c@12db0000 { + hsi2c_1: i2c@12db0000 { compatible = "samsung,exynos5260-hsi2c"; reg = <0x12DB0000 0x1000>; interrupts = ; @@ -394,7 +394,7 @@ hsi2c_1: hsi2c@12db0000 { status = "disabled"; }; - hsi2c_2: hsi2c@12dc0000 { + hsi2c_2: i2c@12dc0000 { compatible = "samsung,exynos5260-hsi2c"; reg = <0x12DC0000 0x1000>; interrupts = ; @@ -407,7 +407,7 @@ hsi2c_2: hsi2c@12dc0000 { status = "disabled"; }; - hsi2c_3: hsi2c@12dd0000 { + hsi2c_3: i2c@12dd0000 { compatible = "samsung,exynos5260-hsi2c"; reg = <0x12DD0000 0x1000>; interrupts = ; From patchwork Sat Dec 4 21:58:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Protsenko X-Patchwork-Id: 520681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CC6EC433F5 for ; Sat, 4 Dec 2021 21:58:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379606AbhLDWCC (ORCPT ); Sat, 4 Dec 2021 17:02:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1355804AbhLDWCA (ORCPT ); Sat, 4 Dec 2021 17:02:00 -0500 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00371C0611F7 for ; Sat, 4 Dec 2021 13:58:33 -0800 (PST) Received: by mail-wr1-x430.google.com with SMTP id i5so13727814wrb.2 for ; Sat, 04 Dec 2021 13:58:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K3czBnhF20hlEpxNiPEsab7v5hRpy0g/kc9Op3PQw6E=; b=BwaXfdv9uHPs4/S9MCysQwKfbqm+jRls2xetHfv7k/INNCJY1MZBG0P+Yyt5CQjUq1 iU7tVhKGQFyzhFoJKl/sUovosGLTdgjRG74tuvqJDkvHEFx+n+oqqVOidF4qjTyLHNCX JbZHOcGWBoFRF7LuHNldZGos/kJOhKprlYgjjSfAssUdeiTrvm6Z2hIEqrzu9q13MPD7 yiIhQK2gjPaHsurlqNkQ66hUejwvGBndWaqjVzbt2wv32/jz8jIjvJbkyyrQkVuQCRIw QTxAkBnCH5w6Kjudbw3GheGJh/Pu0c/XUQTJ1Iz5krkIekpmonrFKVEb/pCrawhyYXaz BM9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K3czBnhF20hlEpxNiPEsab7v5hRpy0g/kc9Op3PQw6E=; b=PTLK3Ph4KoDxNelN+doB2glY6LvVEdrr6lMaX/w6oc+GeTJwBi/jCCv360uh/SQr9/ ReT7nbatdzwGgBnB3eGg2afxWKZ+zh9z+4Kna9cGadEMXjATdeG0gNt0QbfmniLTOwAq ASy4Z7OvaoILx/DzhIsh3AomR2utcWS/t9n3ZeIikkTfFnKTjQAtpOWBdB9QheLs/YEp esesWaiqsHYkP03AYPpHn2QacAERDMJLH7Myqm9stD+9vnWplK+oLSuR31fMlr3oQHG2 W+W+86UUHiSNhHV7t3nC4pcs+o9eY3yzsG588xn6l+X53Hiv35KZbX0eKMCADjNeaTjk XVGQ== X-Gm-Message-State: AOAM532KgIUsmNc7BrmufeabA6yoB1bW8b0hOw2nPUGWNsutyuuCErCc vAX03UGoBNIw+v46jWES17SDVg== X-Google-Smtp-Source: ABdhPJzRzXh9PoQKBWgC49dO5zw8dDQvG3kBQOHpIfzrNE0X2J0p6J5ntD0kS+faZJyLGgscMtRqxw== X-Received: by 2002:adf:e512:: with SMTP id j18mr31678383wrm.532.1638655112603; Sat, 04 Dec 2021 13:58:32 -0800 (PST) Received: from localhost ([31.134.121.151]) by smtp.gmail.com with ESMTPSA id a10sm9315145wmq.27.2021.12.04.13.58.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Dec 2021 13:58:32 -0800 (PST) From: Sam Protsenko To: Krzysztof Kozlowski , Rob Herring Cc: Jaewon Kim , Chanho Park , David Virag , Youngmin Nam , Wolfram Sang , Arnd Bergmann , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org Subject: [PATCH v2 RESEND 8/8] arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7 Date: Sat, 4 Dec 2021 23:58:20 +0200 Message-Id: <20211204215820.17378-9-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211204215820.17378-1-semen.protsenko@linaro.org> References: <20211204215820.17378-1-semen.protsenko@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org In Device Tree specification it's recommended to use "i2c" name for I2C nodes. Now that i2c-exynos5 dt-schema binding was added, it shows some warnings like this when validating HS-I2C nodes: hsi2c@xxxxxxxxx: $nodename:0: 'hsi2c@xxxxxxxx' does not match '^i2c(@.*)?' From schema: Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml Rename hsi2c@* to i2c@* to fix those warnings. Signed-off-by: Sam Protsenko --- Changes in v2: - This patch was added in v2 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 24 +++++++++++----------- arch/arm64/boot/dts/exynos/exynos7.dtsi | 24 +++++++++++----------- 2 files changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 4422021cf4b2..bfe4ed8a23d6 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1585,7 +1585,7 @@ pwm: pwm@14dd0000 { status = "disabled"; }; - hsi2c_0: hsi2c@14e40000 { + hsi2c_0: i2c@14e40000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e40000 0x1000>; interrupts = ; @@ -1598,7 +1598,7 @@ hsi2c_0: hsi2c@14e40000 { status = "disabled"; }; - hsi2c_1: hsi2c@14e50000 { + hsi2c_1: i2c@14e50000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e50000 0x1000>; interrupts = ; @@ -1611,7 +1611,7 @@ hsi2c_1: hsi2c@14e50000 { status = "disabled"; }; - hsi2c_2: hsi2c@14e60000 { + hsi2c_2: i2c@14e60000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e60000 0x1000>; interrupts = ; @@ -1624,7 +1624,7 @@ hsi2c_2: hsi2c@14e60000 { status = "disabled"; }; - hsi2c_3: hsi2c@14e70000 { + hsi2c_3: i2c@14e70000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e70000 0x1000>; interrupts = ; @@ -1637,7 +1637,7 @@ hsi2c_3: hsi2c@14e70000 { status = "disabled"; }; - hsi2c_4: hsi2c@14ec0000 { + hsi2c_4: i2c@14ec0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14ec0000 0x1000>; interrupts = ; @@ -1650,7 +1650,7 @@ hsi2c_4: hsi2c@14ec0000 { status = "disabled"; }; - hsi2c_5: hsi2c@14ed0000 { + hsi2c_5: i2c@14ed0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14ed0000 0x1000>; interrupts = ; @@ -1663,7 +1663,7 @@ hsi2c_5: hsi2c@14ed0000 { status = "disabled"; }; - hsi2c_6: hsi2c@14ee0000 { + hsi2c_6: i2c@14ee0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14ee0000 0x1000>; interrupts = ; @@ -1676,7 +1676,7 @@ hsi2c_6: hsi2c@14ee0000 { status = "disabled"; }; - hsi2c_7: hsi2c@14ef0000 { + hsi2c_7: i2c@14ef0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14ef0000 0x1000>; interrupts = ; @@ -1689,7 +1689,7 @@ hsi2c_7: hsi2c@14ef0000 { status = "disabled"; }; - hsi2c_8: hsi2c@14d90000 { + hsi2c_8: i2c@14d90000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14d90000 0x1000>; interrupts = ; @@ -1702,7 +1702,7 @@ hsi2c_8: hsi2c@14d90000 { status = "disabled"; }; - hsi2c_9: hsi2c@14da0000 { + hsi2c_9: i2c@14da0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14da0000 0x1000>; interrupts = ; @@ -1715,7 +1715,7 @@ hsi2c_9: hsi2c@14da0000 { status = "disabled"; }; - hsi2c_10: hsi2c@14de0000 { + hsi2c_10: i2c@14de0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14de0000 0x1000>; interrupts = ; @@ -1728,7 +1728,7 @@ hsi2c_10: hsi2c@14de0000 { status = "disabled"; }; - hsi2c_11: hsi2c@14df0000 { + hsi2c_11: i2c@14df0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14df0000 0x1000>; interrupts = ; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index c73a597ca66e..c3efbc8add38 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -359,7 +359,7 @@ pinctrl_bus1: pinctrl@14870000 { interrupts = ; }; - hsi2c_0: hsi2c@13640000 { + hsi2c_0: i2c@13640000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13640000 0x1000>; interrupts = ; @@ -372,7 +372,7 @@ hsi2c_0: hsi2c@13640000 { status = "disabled"; }; - hsi2c_1: hsi2c@13650000 { + hsi2c_1: i2c@13650000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13650000 0x1000>; interrupts = ; @@ -385,7 +385,7 @@ hsi2c_1: hsi2c@13650000 { status = "disabled"; }; - hsi2c_2: hsi2c@14e60000 { + hsi2c_2: i2c@14e60000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e60000 0x1000>; interrupts = ; @@ -398,7 +398,7 @@ hsi2c_2: hsi2c@14e60000 { status = "disabled"; }; - hsi2c_3: hsi2c@14e70000 { + hsi2c_3: i2c@14e70000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e70000 0x1000>; interrupts = ; @@ -411,7 +411,7 @@ hsi2c_3: hsi2c@14e70000 { status = "disabled"; }; - hsi2c_4: hsi2c@13660000 { + hsi2c_4: i2c@13660000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13660000 0x1000>; interrupts = ; @@ -424,7 +424,7 @@ hsi2c_4: hsi2c@13660000 { status = "disabled"; }; - hsi2c_5: hsi2c@13670000 { + hsi2c_5: i2c@13670000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13670000 0x1000>; interrupts = ; @@ -437,7 +437,7 @@ hsi2c_5: hsi2c@13670000 { status = "disabled"; }; - hsi2c_6: hsi2c@14e00000 { + hsi2c_6: i2c@14e00000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e00000 0x1000>; interrupts = ; @@ -450,7 +450,7 @@ hsi2c_6: hsi2c@14e00000 { status = "disabled"; }; - hsi2c_7: hsi2c@13e10000 { + hsi2c_7: i2c@13e10000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13e10000 0x1000>; interrupts = ; @@ -463,7 +463,7 @@ hsi2c_7: hsi2c@13e10000 { status = "disabled"; }; - hsi2c_8: hsi2c@14e20000 { + hsi2c_8: i2c@14e20000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x14e20000 0x1000>; interrupts = ; @@ -476,7 +476,7 @@ hsi2c_8: hsi2c@14e20000 { status = "disabled"; }; - hsi2c_9: hsi2c@13680000 { + hsi2c_9: i2c@13680000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13680000 0x1000>; interrupts = ; @@ -489,7 +489,7 @@ hsi2c_9: hsi2c@13680000 { status = "disabled"; }; - hsi2c_10: hsi2c@13690000 { + hsi2c_10: i2c@13690000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x13690000 0x1000>; interrupts = ; @@ -502,7 +502,7 @@ hsi2c_10: hsi2c@13690000 { status = "disabled"; }; - hsi2c_11: hsi2c@136a0000 { + hsi2c_11: i2c@136a0000 { compatible = "samsung,exynos7-hsi2c"; reg = <0x136a0000 0x1000>; interrupts = ;