From patchwork Thu Nov 8 09:04:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 150487 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp583530ljp; Thu, 8 Nov 2018 01:06:18 -0800 (PST) X-Google-Smtp-Source: AJdET5dmXljCIxCQa2mPBh6ZeEaklBQuN+yN2tX/wOJwzLy9/RtpvMPywomH86U3dRHWw/50PWL8 X-Received: by 2002:a17:902:aa8d:: with SMTP id d13-v6mr3810382plr.74.1541667977857; Thu, 08 Nov 2018 01:06:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541667977; cv=none; d=google.com; s=arc-20160816; b=BnSTS8GZyoy5wGIHKML1SsPa/iugbFT/Cq5D6ROiaJ2GOb3a7aclBZKV3+USdFGNvc tW4TLrWmyVYZldSEEDhaUDME72GgykiR02m69t03e0tVdvohx4VNNAZatwSMfSRxIfV9 3GF8fxP3FSP1e6FFXcdZ/eav5wate1z/pYk3JagagSoskfQXjdSUoTIkZOfdaZgEMMPj yXP6m83Tgh//tfU2kH7Abr5qz3lGxuKcQPYHbSW6yoDBH9iPaO1rRzllvqmkdtZAoGdP G6B6h0ZJgGv8DdK2Hkm9JadtC85LlBdNZzbne/VByZbRnt/3f5TTX0kWy9MoDIoi+vHt WAzA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=jRCk5lNBlPCD7GwKBzaRehaZeMJbLJXp2+/KqxIsFvY=; b=SNuNktD2vvMbVldDY/cMNGSoywdt/3VlGX/ruxY/P7LfnhnscM2hsKIOlvM/3ppirM SgMzoqwuHYW4+GiretSyy8h4D+G/Z7xACpGT91c4AT6scWpJURu2xdak6LRbiDEizZ45 JfD4dWPxs9hKKQijHMex3QFoEYELyHrEaRXCVoQ7NgCIHahOtcOfZmJKwoA8Dk6vgrx0 uFYTL+uHFPEz3qMz4jQ7OIxxgBoOc9CusLTmCkM0drGavxTy9nlqCXAxs+pz5PXi7ZWd jxQ33MsM+tqfO5z5+/ssj6NH2hkTuaOuJACQD4Jc4uK3j64ayoRTgvA6Fdm0vmoNuiWX BjTg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PRCeYAKI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 08 Nov 2018 01:05:16 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1094:149:440c:9368:8cda:a020]) by smtp.gmail.com with ESMTPSA id l140-v6sm6974469wmb.24.2018.11.08.01.05.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Nov 2018 01:05:15 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Benjamin Gaignard Subject: [PATCH v2 1/4] dt-bindings: hwlock: Document STM32 hwspinlock bindings Date: Thu, 8 Nov 2018 10:04:59 +0100 Message-Id: <20181108090502.14543-2-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20181108090502.14543-1-benjamin.gaignard@st.com> References: <20181108090502.14543-1-benjamin.gaignard@st.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add bindings for STM32 hardware spinlock device Signed-off-by: Benjamin Gaignard --- version 2 : - change clock name from hwspinlock to hsem to be align with hardware documentation .../bindings/hwlock/st,stm32-hwspinlock.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt -- 2.15.0 diff --git a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt new file mode 100644 index 000000000000..6e933b218574 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt @@ -0,0 +1,23 @@ +STM32 Hardware Spinlock Device Binding +------------------------------------- + +Required properties : +- compatible : should be "st,stm32-hwspinlock". +- reg : the register address of hwspinlock. +- #hwlock-cells : hwlock users only use the hwlock id to represent a specific + hwlock, so the number of cells should be <1> here. +- clock-names : Must contain "hwspinlock". +- clocks : Must contain a phandle entry for the clock in clock-names, see the + common clock bindings. + +Please look at the generic hwlock binding for usage information for consumers, +"Documentation/devicetree/bindings/hwlock/hwlock.txt" + +Example of hwlock provider: + hwspinlock@4c000000 { + compatible = "st,stm32-hwspinlock"; + #hwlock-cells = <1>; + reg = <0x4c000000 0x400>; + clocks = <&rcc HSEM>; + clock-names = "hsem"; + }; From patchwork Thu Nov 8 09:05:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 150485 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp582631ljp; Thu, 8 Nov 2018 01:05:24 -0800 (PST) X-Google-Smtp-Source: AJdET5f7iyEQz/pu+P3pEMPynrp45jQT906qqGwzPcOTH97VAcLmL9hF1zoS/NksThluyl+dVmNl X-Received: by 2002:a62:250:: with SMTP id 77-v6mr3871494pfc.16.1541667924001; Thu, 08 Nov 2018 01:05:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541667923; cv=none; d=google.com; s=arc-20160816; b=zewbdpk33zbjx2N3l2KBT7Mw/ibcCqHWtMlv3qtB44PiCvbHcsVQVNX/Iyqk0kHifS 31KS1EyUrNHI4bgQsXOU+wu1ppYnYwUaf98RC6RFisIS9o3ptdOC5WiosmrrXykm6fM2 xHmP+UMSahvgw2fF3IUJacVgQQngibwPIMh4MHx3OChnCx1qO7QCJpJQUi3cdnsL/vw1 paSXZlRnNww/J6+QgwGH/Qey9yKxgJeL72Bz+U0CFSsDDIppvaDObdlWYrL6QmHUEoBx edLkR04AVvvIOSU1WQdkm+h5Uv0NOHXhFWXMdrQGMmdKfX81CQMvn+CZiBtJOEkY6Flc 0Zug== ARC-Message-Signature: i=1; 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