From patchwork Tue Dec 7 21:08:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 521698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93E94C433FE for ; Tue, 7 Dec 2021 21:08:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241636AbhLGVM1 (ORCPT ); Tue, 7 Dec 2021 16:12:27 -0500 Received: from mout.gmx.net ([212.227.17.21]:41853 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241620AbhLGVM0 (ORCPT ); Tue, 7 Dec 2021 16:12:26 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1638911326; bh=ucTTqYfqrAIEEQUOAqIQuTU4lLZGs0Rtoae2Ggs56Lk=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=JMxB8wxG8C8TyjLgWq12CJQRzhzbOn2CbRMLngVQ5T8LFHWpTO+dYH6M30ZHNejGj mXmUQTZLQd12/0pIJEiQtAk94jqUVZAdmUadPmMp7sM0ZQlXyswZVDmdI4baHwuvsP KFMe/32VdpZ4b7JrIT7xDQr/J9Db3OmzT9dQYrsY= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([5.146.194.160]) by mail.gmx.net (mrgmx105 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MQMuX-1nGNHb1yxV-00MIU3; Tue, 07 Dec 2021 22:08:46 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair Subject: [PATCH v2 1/8] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Date: Tue, 7 Dec 2021 22:08:16 +0100 Message-Id: <20211207210823.1975632-2-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211207210823.1975632-1-j.neuschaefer@gmx.net> References: <20211207210823.1975632-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:5z6fEwkITtvUUGanwwbUAU9wniS3Wxx/3lxzUrIulEn2I63yJtD 2ZJaoUkFgy/5lelXXUnnsIeIHi4tAIEojSrz6nzdNhILkTKHXJu6zGm31w/lk2gfZfIlHhj e2brlbpU+yQqnd6seeDz8jx/m5Lz8NcDzo5HEayRqFXGGof3x+eAq1CdqtzNKsdBetFbDRN 87M0qpknnQsCbuVPCN2mA== X-UI-Out-Filterresults: notjunk:1;V03:K0:BdxySlRDLD8=:YMshSa6kD+dYBdTNnTBAsk UeMhi1NiJHp6Yf88bupwAc+LxGKIiR8SoJeN2oFWYnisPRBrOyUzb+GpnZaJWsmhMZc4rSrdw nPkL1FL7e7Bn+1AAOtFlHkH6cFq5W1ZXPbiI3sSSBkuiBlGteJOR1QcU7AJb19XgPyRakjaS1 z+K0Uovf7uoH2iH2VBkg2BAGx4q1l1U+uw6/HhpzYJhxIRhtdbnKWhMaW85yR14ZHMwRKpHlI WFriqjcrbVoECGnCyNko/A2eeNczLraAEq8WMIJc0uF13Bl+/H5TKMnJHvlSsxXzwLj6tpDZP sXcf9OfOV+0uutcyyPkp4lGGys7AJtlevK+UtXESDebc2tXH0LQ73DkaUb3nnP9juzBPzC1DV bn2KUyFdrSFPTptnZg/o72xUlmlCymSt+6XJYTKXvhDlj+sVpOrubweaToQRYC1fcY0Yld2Xu qj2wm/E1gGo7Qo07UimbL4tc7DFwLk7oRYQjugdLzRoj+DY6a4QXwGxK8J/TlfmuXlc53kDFW ltOpJez/x12B/0/nuU1qwEA5innGtu9XS/TyweFA1lCpiEIJdetkm7O5GDN00QXQDIrEXE3IZ CLPzrYArvaKTLt2TVU+eVQm5Fd/1HyoTF2WMtlMvThxn70ur1+BapfrDgWCF0KPrs/Dl7HMu4 8gcZcyuVvoRR9W6W1Wgx+HiLus/S3y1OyHrbBalrosvchez6fq4Kjk2YhrgUs0nVpNbK2RxxY ZBT6W7yzQc37NFVkTM9M56GNqMn6c4O2DcmcX/WxtlntLUkAQHuAD0Wg4rJSOGR3n/DjefVEY j65Wp6/sA81mRBsuUzBzIQpGcH4izDHl4paY3NzzDHaUYug/cXEKyrwqoVlGpTTEXeE7ySHyd UvFHhoojM3QODJHL8XwAXnRcTPk4/Z7wgbJHy0mV6Y6+5U6MSjt96i5fMJMyNvF768/5ZEplc 47Tsu8OoYr8/w+FE2FMStNOJvbgm3LMTzc1wdOUVsVAG2QgrsbJFNMHSlVFW1sz7QhATlPurb 6O/9FPAAS7RKtR49U1oPeFq3FAt7k+qWaGbqRkCHcHJqwojWlXJZKaNgO+1P4SknsmqcJn1TJ h96n/2qkTawnWI= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A nuvoton,*-gcr node is present in nuvoton-common-npcm7xx.dtsi and will be added to nuvoton-wpcm450.dtsi. It is necessary for the NPCM7xx and WPCM450 pinctrl drivers, and may later be used to retrieve SoC model and version information. This patch adds a binding to describe this node. Signed-off-by: Jonathan Neuschäfer --- v2: - Rename node in example to syscon@800000 - Add subnode to example v1: - https://lore.kernel.org/lkml/20210602120329.2444672-2-j.neuschaefer@gmx.net/ --- .../bindings/arm/npcm/nuvoton,gcr.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml -- 2.30.2 diff --git a/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml new file mode 100644 index 0000000000000..62020d7ac305b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Global Control Registers block in Nuvoton SoCs + +maintainers: + - Jonathan Neuschäfer + +description: | + The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs + that expose misc functionality such as chip model and version information or + pinmux settings. + +properties: + compatible: + items: + - enum: + - nuvoton,wpcm450-gcr + - nuvoton,npcm750-gcr + - const: syscon + - const: simple-mfd + reg: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + gcr: syscon@800000 { + compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd"; + reg = <0x800000 0x1000>; + + uart-mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x38 0x07>; + idle-states = <2>; + }; + }; From patchwork Tue Dec 7 21:08:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 521697 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2003BC433F5 for ; Tue, 7 Dec 2021 21:09:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241644AbhLGVM2 (ORCPT ); Tue, 7 Dec 2021 16:12:28 -0500 Received: from mout.gmx.net ([212.227.15.19]:60173 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241633AbhLGVM1 (ORCPT ); Tue, 7 Dec 2021 16:12:27 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1638911329; bh=KuuD6eeMVERCTcB38ObnXFq9aI+j62KUONB7+XNWmJ8=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=jdNIaXUDI61KFrl2Uu0kT7UxcRjjqO8DfRWt4ncRFTfj2rMk5/OK1R5mRekNs9mys ETarCqHd5oWGS51PRb1C6o+D+mOfRNnsdDlWGiVLo7CPTuoxqrgLK+brZFyMcCOpXZ l7Z51DWkqwYMuFhyzHY+Y34HyoUn5Cuj4a1hI2RM= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([5.146.194.160]) by mail.gmx.net (mrgmx005 [212.227.17.190]) with ESMTPSA (Nemesis) id 1ML9yS-1nBgah0rA2-00IAob; Tue, 07 Dec 2021 22:08:49 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v2 2/8] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Date: Tue, 7 Dec 2021 22:08:17 +0100 Message-Id: <20211207210823.1975632-3-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211207210823.1975632-1-j.neuschaefer@gmx.net> References: <20211207210823.1975632-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:EtnkHO3/DgWnnNDn9NeWYv3hTDh3PjMdqIiWBau9Fa2MKUIVYWZ /2Fy9Yc2jXJUIRJJ8bcHEsfFzYKpeRiWr5n6J7yHi42PF4FvPETUwac8BO4qCwodPdbRUHR TxWTZEiLhqtALU3mEY7zTrqkrQww2my+8LWAJCfBX+v6lLhwNGbCgP9lS0eLvybCmBi4VIr u/2epOCUVYoRviwPqamEQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:Y0aYPSWaj9w=:yLYx2bO7tUZnINS6uBXipG V9ChDAAOGIKJ+vfw1AUIE4PWsSO6KTVjHBvaL+tlX1GL3x35v/9qdRZa6qAmw+41Hoa32evCV JCoDkLljd7B3LfyWG6/KgscRuhHBV7Ufhx3Ij7XuqYJyDhCHp8arn/Qxib/y9P1QvzQ9yHNbG I4HAKOMBr+rbQRLhW3UhJJaOKjZV36uRcrscwZyXwGYCZKmARERByxRDKi1NQCdbaO+bDMdy5 yMVf4URgR1CHDKgakMxtKOewsqquqblh0D+LeCK1SyscBCFKVwu41sK+aywP985HCumBIcCdE lDOQum+pAuLY0W63ashC297z9tsQ5zP4vzB48HqVkgzXOm3I21dx+LvYV7NoSEITLy7xLIryc RKP88CGA/EsKOhqupNVy8Vk3zlocTaMxpx32zeO+4awmhE+ja4F34scimakXlwyKnQR0TQofD +xVyxdVXcNZVyTYGKDK2Kq2ZutSpuqD1QcA5Kj5XNUetUatPIIu/sjsxUDrjwmsR6OUaSmNAT yh6D/EZk38frUmwuy8wPWqUmMOyCa8hb2ZYUrPCuUIOIn7XVEdzhhJGL8MmTklB8fryOhhqLF 02JhHJehkr/baQLLDKjf2vEJzF0/0Zw1lfw1ap/5IyWJ7UGUbEr8IDQcaUU7nsnRlmdEhhFT+ INC+k0XxINHGjbzZuCnJZMKVmDKdgQOAs3MNIfNETnOFSt5c6dvkuBGzyLBb5K19NZt9BXq38 /B/TBFWze5at2ad2CY5moFhkrX+YFJ+psMc2jQ9TYLqVWaCIpjLIJ1I8saDjgwNYlZKpX3k7t 8vyzFFTbAe1ytlhNBamj8AUc3xs1GHpUgYI9cC/GFQGrOpbE8wGi4ti081VNlE9jyLVBybnup iG7pYpqYIPPAXTfi9pNOzbQrFo+HVx1NPKCLMi3Lozwi/4ObbbhtHD51ny2xzIHN9VWaRwWAS pzxKRdSU9V2ZZIKe55x1IZuD5AMH5qvWs4sKgUtRROTU+N9ztbWxxnZQkjMk1bD8MA84ZNwzn 4ygjsDe+N189FXivGvn8NECpK/9YJxFOY8POdetZYqQIM/Afio2ubOsGYRh7haOj5MUOAB9VB Ifo6WQdwupJFz0= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All files in Documentation/devicetree/bindings/arm/npcm/ belong to the Nuvoton NPCM architecture, even when their names might not spell it out explicitly. Signed-off-by: Jonathan Neuschäfer --- v2: - no changes v1: - https://lore.kernel.org/lkml/20210602120329.2444672-3-j.neuschaefer@gmx.net/ --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- 2.30.2 diff --git a/MAINTAINERS b/MAINTAINERS index 360e9aa0205d6..eff3edafd8814 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2338,6 +2338,7 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers) S: Supported F: Documentation/devicetree/bindings/*/*/*npcm* F: Documentation/devicetree/bindings/*/*npcm* +F: Documentation/devicetree/bindings/arm/npcm/* F: arch/arm/boot/dts/nuvoton-npcm* F: arch/arm/mach-npcm/ F: drivers/*/*npcm* From patchwork Tue Dec 7 21:08:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 521696 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27BE0C433FE for ; Tue, 7 Dec 2021 21:09:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241758AbhLGVMs (ORCPT ); Tue, 7 Dec 2021 16:12:48 -0500 Received: from mout.gmx.net ([212.227.17.20]:48733 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241754AbhLGVMf (ORCPT ); Tue, 7 Dec 2021 16:12:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1638911339; bh=aJK3aYkTjoNYFomlmBvcJiDYDAbn3yEMMH9PnGcwh0Q=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=V+apZi5Z0+zV19MkjBbX4/XYTOQl0U/cArYg5ZMl2USooSis7W1dZIM6t29q3PxaU 3nsKTqAyfc7vmRwQla2ZFPhL/fu/1a25QQRUxjpku3eC8D7hBQurPrZFXvD47dY1zG 1ClI7t3t80QPe1TUohZ5J+ZtN9eRTG3iidqlZjnY= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([5.146.194.160]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MFsYx-1mmDeH3JKp-00HQoC; Tue, 07 Dec 2021 22:08:58 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v2 6/8] ARM: dts: wpcm450: Add pinctrl and GPIO nodes Date: Tue, 7 Dec 2021 22:08:21 +0100 Message-Id: <20211207210823.1975632-7-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211207210823.1975632-1-j.neuschaefer@gmx.net> References: <20211207210823.1975632-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:usq2/YSpx5wQW1MyCXV07rtFXO7Ivj8A7enhBPFJxzJs5IuTmaR ckAN38qm7/pxxiUpvfjpUuJCr9f46BPCSem0daz6ogwZy+o8mQsbHPabpmodHB6/3gHFrlj Cbhkc4cqWlOFsg2VLaQ8Ts1Sl00St4JleGysUjV4QoO7B2EArNlhdgc4Fp6onvhPewpa58C BfZEppyS9BkFrmPrDwGAQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:MeXJvmA2qww=:tZZ1gd1d8hrBvKOxGmsN9d utbwS06se01yGQaIQ960mOinzwa7be0TWDBaN3Hrv8U7u6xjRNBy40V3Aa0df3It5Ebs76HNR PW1307ibCHkhxRIRyIuHquZ4MU7jPU2aW2fFcLbUPIEtf8a7+TaVzknR+oRw9lbAn+/iUwlYl gn+VVC6x5xFy3Je1x9JpKToY6ruyyLw1net/TWVpiqMSQf2coX8NWDwJxJeShLvqGUGe0tCnd 2dO63p6qGaP6yyd1tU0nDKNygRl+3lHxMF4i3HfkkVoyIQx//H6FMY3LehtuJEMpwrcsA/t6r 32BrA7BEEyD4sLP7fKMkwDBTwL6onoQOXtJnZxoFEZykOmWnU2o+XX32jEogr2sYXTcu1PUsZ BVwd7PfLGA9/tlCnv5cssGMRo8xE4OBCSboeffWq0yn4LOoDd4rIabYjKbPGIdDHVn85E3MSb inFBL+jDBzT75p+49eZmyCLcW0BKu/K3XM2CV9w/mEm56R9CDn/P0J3G//PIINDeewuS+Y9kN L4rhYoqboW+1MVLG1XwrZb3RfmnSZxR8gq55pFk51wJ4iI+kZO0NDm7Dwf3cTTVHh2ODQpgst e3frKGKXXRbo+/YUjGSbm+P5RJkxNw6pQSt9OpZHcP9s+rpq6zu0PJfLmgtNy78Jdcgf8EWf6 h+oesDOR4XBFBtJgcvlOJbx9EZU6pjFLWDVukBEuXLPDBQzzHOQVJNDDW3TME00AT4HKWXiK2 Oe2ojapzSCb1IGSEvhog8p+k5Swm45Ts5lx74KKqoFottJW5BHZORCqk4iIkg3uBsk5ph6bnm kXrDm2OsjUC7jZwSUmmwbJIs4XDi6WL9Wj6F0q4giJgx4jM2LuJ1NflsSgae6p2oUjH46YR0N hq9UHL4guNP55X11K0munVngAoS6qCx4C4FxtLRijTBJ3A5sf3fgk3YUOCdF9fLHfb9fb4CK/ o7fLQcsGXavKITDUeWxo2cfeCHf19Ag3K0+83XMQW2r7sfhomA5xh8AImjILM9F52mNdbJ17L eHbBHJvd8IR0bVyakxOP7wdXV0ruEwWv+EOFIYs6zLtIBfwl9sigGjKJ062eMNCcZwp5jaaFr ys8YtwUJKcgV8c= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the pin controller and GPIO banks to the devicetree for the WPCM450 SoC. Signed-off-by: Jonathan Neuschäfer --- v2: - Move GPIO banks into subnodes - Add /alias/gpio* v1: - https://lore.kernel.org/lkml/20210602120329.2444672-7-j.neuschaefer@gmx.net/ --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 74 ++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index a17ee70085dd0..a795cc4128654 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -8,6 +8,17 @@ / { #address-cells = <1>; #size-cells = <1>; + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + gpio7 = &gpio7; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -77,5 +88,68 @@ aic: interrupt-controller@b8002000 { interrupt-controller; #interrupt-cells = <2>; }; + + pinctrl: pinctrl@b8003000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + gpio0: gpio@0 { + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH + 3 IRQ_TYPE_LEVEL_HIGH + 4 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + nuvoton,interrupt-map = <0 16 0>; + }; + + gpio1: gpio@1 { + reg = <1>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + nuvoton,interrupt-map = <16 2 8>; + }; + + gpio2: gpio@2 { + reg = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio3: gpio@3 { + reg = <3>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio4: gpio@4 { + reg = <4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio5: gpio@5 { + reg = <5>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio6: gpio@6 { + reg = <6>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio7: gpio@7 { + reg = <7>; + gpio-controller; + #gpio-cells = <2>; + }; + }; }; }; From patchwork Tue Dec 7 21:08:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 521695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E605FC4332F for ; Tue, 7 Dec 2021 21:09:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241786AbhLGVMy (ORCPT ); Tue, 7 Dec 2021 16:12:54 -0500 Received: from mout.gmx.net ([212.227.17.22]:44053 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241770AbhLGVMj (ORCPT ); Tue, 7 Dec 2021 16:12:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1638911340; bh=ydeSff7ARSMRyer2h0d+ysVTraGKpuyvVeQKsq5VJR8=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=T9lTMve6OGkkF88AplB53qlRFXm0fKHzFXSBQ31Wh1df1U2S9lX6m7sJrt9wly+Il 8V5sheFbKAstTJPkU6aRS0yIMaWlK0x7ZPvI8QvcWf5S54JHGnvzuKZLqiz32S++mo 67aku9rwTkRp2b3kinXk7fWoiRzkNxTa6p42Dza8= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([5.146.194.160]) by mail.gmx.net (mrgmx105 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MLzBp-1nBxRS3hRZ-00Hsmq; Tue, 07 Dec 2021 22:08:59 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v2 7/8] ARM: dts: wpcm450: Add pin functions Date: Tue, 7 Dec 2021 22:08:22 +0100 Message-Id: <20211207210823.1975632-8-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211207210823.1975632-1-j.neuschaefer@gmx.net> References: <20211207210823.1975632-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:xPSju/tOW5OV/wGSkbiyijYM7IDYw6LltJqtBLSOpIeyTa3NxH3 vmF73ZHXxWgqfbe5IJXq/qNtkv47ZHdamDZFg+MoGzxfe63imFGEr4EVPMTy98HnQXfWkwf c6HnOWa51B2hYSUWjWlky7B4Wv39yDzrkwL2YZkTNTMu2CD3teyYnfu30nCRenZ5ZFn2lcH mRwsS4aTaq0XtJtXE2nYQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:gSo5a5iquJs=:x76q+v18WI3JdeYPsXy5v8 H5FLcwMYpCG0UIvazeDFddTZD04vnUWWb78gYsDC7qVjnPckQbAqPMWdzhWzLtBF9t2LIX0zs dcAkzrWnwARrwgdUYg5GQxsKYzwr4J8z11Wss0C7SNGpWwB9X0Oodrj44GThgotPiqruY3Ona sX6czn1vCImfsqcFd9SpwWl+6We+v8lKcwvIKyBlwU9pyTQNB7N9lAQs7KwYAoonr0hJu1EeO +jV7GwK4z4CRMi0ZUZv9lXaeqkJ9thrP0YdSPFxbQR8dSNWhTTGY9WgOBwHCKqTDvyMslxETM T/s29MaiyMsfrCBJ/WmCPqdaMWDbsq6gyFL+lhxEmbOhGj4zTC5CYkRMzfmD54gci0MZh9B0O 5QcDWqXg0bf9VeqPoQd06NtFNGZLUVws16gh0jCyu/0anNA//kdnYhHoR1fxrKNM5OTsznqeC bdCaRfR7kfpchfAXuuwidfRGA1kDvifbxT5Y94xwK4C8yiZqbM1agapPwGr780P+lo2NQqXC0 8uqY99WRDL7M/pKqUzeziJ7qlPx8bdz1p6nKqPRO3TBa0wQirfXnFAvgCl8MH+GJP0yO5mpST FN3XcXwYJ9rlWzSq5A0VZr3f9CVgQBLEyBmsUcKwMVmpkFyULfA5idtiJDmUOdZZxB1CMt9sM GcavnR/0rVgGiKh2RKMXk2pqF9zBjsbVUd9P2BLXMj5utG9zNXprxtf2gQzjHqRzx21bRHUFQ Xjhrs8lpczYioZqAxCyPc+/hvNw9zMl/o6EOSxgK2zP3djhLAwfGE9m354vYHV66sJyQ9tNcu X/HvtAihJKs2uwLcb/fB2eGpC1TWZmLkRndVvJ+l3SuYc4YMEa/TDiDP+qky9RY2L28itr7Xg K3UCXtNWMtIccGyfxRxnsT0yG6A46U3telvCzMjOz4PZQ++wNXkfWvEEKRhXf+Sh+/+NvaMdy 0Xhrpqu0NtWQyCPHMlz1Z+vtfpxCLH8p7Rf6HLbwoGA0lqbjJ8wQEWm328HV9nhkB0M72Wm6b 7OI9SqiWCT5B4E5e4oDQ3kwuL4UFSIU50RJBlWJ/zDFmh6tW+cCKRCYATzjqc4Jge8nmoRYzP JqxVSfc+zxM+Wg= Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org As done in nuvoton-common-npcm7xx.dtsi, this patch adds pinmux nodes for all pin functions to nuvoton-wpcm450.dtsi. Signed-off-by: Jonathan Neuschäfer --- I'm not quite convinced of the value of this patch, as the pin functions could easily be specified in board.dts files when needed. v2: - no changes v1: - https://lore.kernel.org/lkml/20210602120329.2444672-8-j.neuschaefer@gmx.net/ --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 305 +++++++++++++++++++++++++ 1 file changed, 305 insertions(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index a795cc4128654..b377e61714bcb 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -150,6 +150,311 @@ gpio7: gpio@7 { gpio-controller; #gpio-cells = <2>; }; + + smb3_pins: smb3-pins { + groups = "smb3"; + function = "smb3"; + }; + + smb4_pins: smb4-pins { + groups = "smb4"; + function = "smb4"; + }; + + smb5_pins: smb5-pins { + groups = "smb5"; + function = "smb5"; + }; + + scs1_pins: scs1-pins { + groups = "scs1"; + function = "scs1"; + }; + + scs2_pins: scs2-pins { + groups = "scs2"; + function = "scs2"; + }; + + scs3_pins: scs3-pins { + groups = "scs3"; + function = "scs3"; + }; + + smb0_pins: smb0-pins { + groups = "smb0"; + function = "smb0"; + }; + + smb1_pins: smb1-pins { + groups = "smb1"; + function = "smb1"; + }; + + smb2_pins: smb2-pins { + groups = "smb2"; + function = "smb2"; + }; + + bsp_pins: bsp-pins { + groups = "bsp"; + function = "bsp"; + }; + + hsp1_pins: hsp1-pins { + groups = "hsp1"; + function = "hsp1"; + }; + + hsp2_pins: hsp2-pins { + groups = "hsp2"; + function = "hsp2"; + }; + + r1err_pins: r1err-pins { + groups = "r1err"; + function = "r1err"; + }; + + r1md_pins: r1md-pins { + groups = "r1md"; + function = "r1md"; + }; + + rmii2_pins: rmii2-pins { + groups = "rmii2"; + function = "rmii2"; + }; + + r2err_pins: r2err-pins { + groups = "r2err"; + function = "r2err"; + }; + + r2md_pins: r2md-pins { + groups = "r2md"; + function = "r2md"; + }; + + kbcc_pins: kbcc-pins { + groups = "kbcc"; + function = "kbcc"; + }; + + dvo0_pins: dvo0-pins { + groups = "dvo"; + function = "dvo0"; + }; + + dvo3_pins: dvo3-pins { + groups = "dvo"; + function = "dvo3"; + }; + + clko_pins: clko-pins { + groups = "clko"; + function = "clko"; + }; + + smi_pins: smi-pins { + groups = "smi"; + function = "smi"; + }; + + uinc_pins: uinc-pins { + groups = "uinc"; + function = "uinc"; + }; + + gspi_pins: gspi-pins { + groups = "gspi"; + function = "gspi"; + }; + + mben_pins: mben-pins { + groups = "mben"; + function = "mben"; + }; + + xcs2_pins: xcs2-pins { + groups = "xcs2"; + function = "xcs2"; + }; + + xcs1_pins: xcs1-pins { + groups = "xcs1"; + function = "xcs1"; + }; + + sdio_pins: sdio-pins { + groups = "sdio"; + function = "sdio"; + }; + + sspi_pins: sspi-pins { + groups = "sspi"; + function = "sspi"; + }; + + fi0_pins: fi0-pins { + groups = "fi0"; + function = "fi0"; + }; + + fi1_pins: fi1-pins { + groups = "fi1"; + function = "fi1"; + }; + + fi2_pins: fi2-pins { + groups = "fi2"; + function = "fi2"; + }; + + fi3_pins: fi3-pins { + groups = "fi3"; + function = "fi3"; + }; + + fi4_pins: fi4-pins { + groups = "fi4"; + function = "fi4"; + }; + + fi5_pins: fi5-pins { + groups = "fi5"; + function = "fi5"; + }; + + fi6_pins: fi6-pins { + groups = "fi6"; + function = "fi6"; + }; + + fi7_pins: fi7-pins { + groups = "fi7"; + function = "fi7"; + }; + + fi8_pins: fi8-pins { + groups = "fi8"; + function = "fi8"; + }; + + fi9_pins: fi9-pins { + groups = "fi9"; + function = "fi9"; + }; + + fi10_pins: fi10-pins { + groups = "fi10"; + function = "fi10"; + }; + + fi11_pins: fi11-pins { + groups = "fi11"; + function = "fi11"; + }; + + fi12_pins: fi12-pins { + groups = "fi12"; + function = "fi12"; + }; + + fi13_pins: fi13-pins { + groups = "fi13"; + function = "fi13"; + }; + + fi14_pins: fi14-pins { + groups = "fi14"; + function = "fi14"; + }; + + fi15_pins: fi15-pins { + groups = "fi15"; + function = "fi15"; + }; + + pwm0_pins: pwm0-pins { + groups = "pwm0"; + function = "pwm0"; + }; + + pwm1_pins: pwm1-pins { + groups = "pwm1"; + function = "pwm1"; + }; + + pwm2_pins: pwm2-pins { + groups = "pwm2"; + function = "pwm2"; + }; + + pwm3_pins: pwm3-pins { + groups = "pwm3"; + function = "pwm3"; + }; + + pwm4_pins: pwm4-pins { + groups = "pwm4"; + function = "pwm4"; + }; + + pwm5_pins: pwm5-pins { + groups = "pwm5"; + function = "pwm5"; + }; + + pwm6_pins: pwm6-pins { + groups = "pwm6"; + function = "pwm6"; + }; + + pwm7_pins: pwm7-pins { + groups = "pwm7"; + function = "pwm7"; + }; + + hg0_pins: hg0-pins { + groups = "hg0"; + function = "hg0"; + }; + + hg1_pins: hg1-pins { + groups = "hg1"; + function = "hg1"; + }; + + hg2_pins: hg2-pins { + groups = "hg2"; + function = "hg2"; + }; + + hg3_pins: hg3-pins { + groups = "hg3"; + function = "hg3"; + }; + + hg4_pins: hg4-pins { + groups = "hg4"; + function = "hg4"; + }; + + hg5_pins: hg5-pins { + groups = "hg5"; + function = "hg5"; + }; + + hg6_pins: hg6-pins { + groups = "hg6"; + function = "hg6"; + }; + + hg7_pins: hg7-pins { + groups = "hg7"; + function = "hg7"; + }; }; }; };