From patchwork Wed Dec 15 04:34:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 524649 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D405C433EF for ; Wed, 15 Dec 2021 04:35:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239734AbhLOEfF (ORCPT ); Tue, 14 Dec 2021 23:35:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239735AbhLOEfE (ORCPT ); Tue, 14 Dec 2021 23:35:04 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1051BC06173F; Tue, 14 Dec 2021 20:35:04 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id B1812CE1BFB; Wed, 15 Dec 2021 04:35:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 609ADC3460B; Wed, 15 Dec 2021 04:34:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639542899; bh=ew2ogF06dXNGi9pAo0OWriibGYCVYjyM2fN8TTJwYQM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vf6dZfgE5Ixs7NA8Eo8bjwYubQ1QD6jZIeRIlBdaap7UsZL+dos98zqCw5GAHu8ES iP9JDhcKVqllBGXQ3NhVGchxg7zk0A7G2NTcq29GY6JeZlGQax6RER+tZI/U2R73Nr NefBpADVHVTgHvM/uNmF/pkCFZ2nPUmi6VkMLkHwEAgkdMo7B4qsJR4s/y2yxI4Uwe K5xMCkHIF1iTiJbITBXSnSnlsjhoexktga3NJUph6h5XthPUaQi5fGyjM4PStW9ccQ V+BoK84GMtdTpIqQHtuErErMbZ5xm42Qkwr3Ws5jEhoY3l/k71AHyqwJypt3fcRrDz FdFdAnJqP1f2w== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , Konrad Dybcio , devicetree@vger.kernel.org Subject: [PATCH v3 02/11] arm64: dts: qcom: sm8450: Add tlmm nodes Date: Wed, 15 Dec 2021 10:04:31 +0530 Message-Id: <20211215043440.605624-3-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211215043440.605624-1-vkoul@kernel.org> References: <20211215043440.605624-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add tlmm node found in SM8450 SoC and uart pin configuration Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 96fbf4be3f89..fb93d53d3433 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -343,6 +343,8 @@ uart7: serial@99c000 { reg = <0 0x0099c000 0 0x4000>; clock-names = "se"; clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>; interrupts = ; #address-cells = <1>; #size-cells = <0>; @@ -366,6 +368,32 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + tlmm: pinctrl@f100000 { + compatible = "qcom,sm8450-tlmm"; + reg = <0 0x0f100000 0 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 211>; + wakeup-parent = <&pdc>; + + qup_uart7_rx: qup-uart7-rx { + pins = "gpio26"; + function = "qup7"; + drive-strength = <2>; + bias-disable; + }; + + qup_uart7_tx: qup-uart7-tx { + pins = "gpio27"; + function = "qup7"; + drive-strength = <2>; + bias-disable; + }; + }; + intc: interrupt-controller@17100000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; From patchwork Wed Dec 15 04:34:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 524648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CE75C433F5 for ; Wed, 15 Dec 2021 04:35:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239728AbhLOEfL (ORCPT ); Tue, 14 Dec 2021 23:35:11 -0500 Received: from sin.source.kernel.org ([145.40.73.55]:46486 "EHLO sin.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236512AbhLOEfJ (ORCPT ); Tue, 14 Dec 2021 23:35:09 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 72793CE1C09; Wed, 15 Dec 2021 04:35:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4DEEFC34600; Wed, 15 Dec 2021 04:35:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639542905; bh=o43MS1iwY7lmLuBfPF6I5dCF09PMcpDX/HWgUMI+gDY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=khoy2vXylEnhKC7Y13qdpPVvvHKci5Q91HssNRiwq3hGoHktQs/oU5V2B3Ob6ra6C qz6iIMxPIsjEnhuRz/cYD60dpgwsqJX4XtZ0W5Z2RSYEXrAFHa7MCfk2aeuFhjEmBa xM/zloqiwY/35KbstZDu2pxmPaUXnHB+dJi1dqYpP6YxSZWGrhKAMDNaK/JKxFHLs/ M+Sp8iMU6dKfZvtiMLp+Rm+sWUPOTbxy431g7FkYDpzEGBlopNV2WgD/LhrK8V8e+z BYFiAFxkJZpPzrjdE/M8v3bQMmChiewvdYcoQY6doCjPsSwyrtMjsbmEqb/Oq1K0hy pGSWL9Grbc4GA== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , Konrad Dybcio , devicetree@vger.kernel.org Subject: [PATCH v3 04/11] arm64: dts: qcom: sm8450: add smmu nodes Date: Wed, 15 Dec 2021 10:04:33 +0530 Message-Id: <20211215043440.605624-5-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211215043440.605624-1-vkoul@kernel.org> References: <20211215043440.605624-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the apps smmu node as found in the SM8450 SoC Signed-off-by: Vinod Koul Acked-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 103 +++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d9439c6ebfa2..d29680c405bf 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -615,6 +615,109 @@ qup_uart7_tx: qup-uart7-tx { }; }; + apps_smmu: iommu@15000000 { + compatible = "qcom,sm8450-smmu-500", "arm,mmu-500"; + reg = <0 0x15000000 0 0x100000>; + #iommu-cells = <2>; + #global-interrupts = <2>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + intc: interrupt-controller@17100000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; From patchwork Wed Dec 15 04:34:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 524647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 59A09C433F5 for ; Wed, 15 Dec 2021 04:35:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239744AbhLOEfP (ORCPT ); Tue, 14 Dec 2021 23:35:15 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:51732 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239741AbhLOEfP (ORCPT ); Tue, 14 Dec 2021 23:35:15 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1DA54617D7; Wed, 15 Dec 2021 04:35:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 311D4C34604; Wed, 15 Dec 2021 04:35:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639542914; bh=yTb5v+MXsxOvthbocV50YF6Ma7wZxkLSZxgBWsbzZqc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qBChwHGhyoA5csTEiF9d7kkk37P9nSNTPtPDYxnz/Z08on5PHzZgUcXmnnQ5FRAw2 Mg3gmFyaEZcMc/NgfFAsnziaXhuEzdp4L3+5m4Auj42z0u55NFYJxfk3Wh/bsKXYqd ZxPjuG3YYV/Su16OOR/KYS3pmUZnz7TbzFdOi8Zg/W4C5sXTS3++1dqy+AriyYbC0n dMzVBkvpXwU2j7HaGjZXPlNSh/oq6IdPdjFy0fw1EIidpYLF9b33+DnVwD5/x5icpP 3B4yrCNcmHHujOecFe/DBFZnEvy19wUKDBytcd+5Uh7eK577gfvitVGnDDpnR7b/h2 BRGAPC9Qpzhhw== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , Konrad Dybcio , devicetree@vger.kernel.org Subject: [PATCH v3 07/11] arm64: dts: qcom: sm8450: add ufs nodes Date: Wed, 15 Dec 2021 10:04:36 +0530 Message-Id: <20211215043440.605624-8-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211215043440.605624-1-vkoul@kernel.org> References: <20211215043440.605624-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the UFS and QMP PHY node for SM8450 SoC Signed-off-by: Vinod Koul Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 72 ++++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d29680c405bf..9556d2fc46e0 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -815,6 +815,78 @@ rpmhcc: clock-controller { clocks = <&xo_board>; }; }; + + ufs_mem_hc: ufshc@1d84000 { + compatible = "qcom,sm8450-ufshc", "qcom,ufshc", + "jedec,ufs-2.0"; + reg = <0 0x01d84000 0 0x3000>; + interrupts = ; + phys = <&ufs_mem_phy_lanes>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + #reset-cells = <1>; + resets = <&gcc GCC_UFS_PHY_BCR>; + reset-names = "rst"; + + power-domains = <&gcc UFS_PHY_GDSC>; + + iommus = <&apps_smmu 0xe0 0x0>; + + clock-names = + "core_clk", + "bus_aggr_clk", + "iface_clk", + "core_clk_unipro", + "ref_clk", + "tx_lane0_sync_clk", + "rx_lane0_sync_clk", + "rx_lane1_sync_clk"; + clocks = + <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_UFS_PHY_AHB_CLK>, + <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, + <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; + freq-table-hz = + <75000000 300000000>, + <0 0>, + <0 0>, + <75000000 300000000>, + <75000000 300000000>, + <0 0>, + <0 0>, + <0 0>; + status = "disabled"; + }; + + ufs_mem_phy: phy@1d87000 { + compatible = "qcom,sm8450-qmp-ufs-phy"; + reg = <0 0x01d87000 0 0xe10>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clock-names = "ref", "ref_aux", "qref"; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&gcc GCC_UFS_0_CLKREF_EN>; + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; + + ufs_mem_phy_lanes: lanes@1d87400 { + reg = <0 0x01d87400 0 0x108>, + <0 0x01d87600 0 0x1e0>, + <0 0x01d87c00 0 0x1dc>, + <0 0x01d87800 0 0x108>, + <0 0x01d87a00 0 0x1e0>; + #phy-cells = <0>; + #clock-cells = <0>; + }; + }; }; timer { From patchwork Wed Dec 15 04:34:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 524646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53BD3C43219 for ; Wed, 15 Dec 2021 04:35:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239748AbhLOEfS (ORCPT ); Tue, 14 Dec 2021 23:35:18 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]:51764 "EHLO dfw.source.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239740AbhLOEfS (ORCPT ); Tue, 14 Dec 2021 23:35:18 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 100D2617DA; Wed, 15 Dec 2021 04:35:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2763AC34600; Wed, 15 Dec 2021 04:35:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639542917; bh=DHq8x3NS0uPYWBdWXJqA4Z7Tx3toHalCV1Y52lRkrWg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Y5eiaHd9n45pJP5VFROxNP9+oZIKWUhyPgfb2hioa9FgLYMS5afYmWAnCwenwwTCU cULkRzZ4SV5y/aqnYz5jB91lhIOgrcpHLquzk6ZYZDvgA2OHHBSoSq9SHoT7P+u7cD NTp8VG3t2ZysEizKm31rx09iwoJ0wDGfrvojWlqDIfV9vcX1BEK5Y/LURWM/V6cMv/ HYwoETrPi+Jh5FLWre1VDCcLeAwt2xY3+8sDyFGcn02vR1SG4yHiAMW37vSgz/PEYZ oB3xlyFgWTvQtEjYR303+oaIuGScQnY2j3Y1JbYbHvnD2NGpLKXSBM1lfBgq1eqtRa Mj5f4x0sK+K/Q== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vinod Koul , Andy Gross , Rob Herring , Konrad Dybcio , devicetree@vger.kernel.org Subject: [PATCH v3 08/11] arm64: dts: qcom: sm8450-qrd: enable ufs nodes Date: Wed, 15 Dec 2021 10:04:37 +0530 Message-Id: <20211215043440.605624-9-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211215043440.605624-1-vkoul@kernel.org> References: <20211215043440.605624-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the UFS and phy node and add the regulators used by them. Signed-off-by: Vinod Koul Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts index 2ab19608a455..4b7ad190d538 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts @@ -353,3 +353,23 @@ &tlmm { &uart7 { status = "okay"; }; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l7b_2p5>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l9b_1p2>; + vccq-max-microamp = <1200000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l5b_0p88>; + vdda-pll-supply = <&vreg_l6b_1p2>; + vdda-max-microamp = <173000>; + vdda-pll-max-microamp = <24900>; +}; From patchwork Wed Dec 15 04:34:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 524645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DB67C433FE for ; Wed, 15 Dec 2021 04:35:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239751AbhLOEf1 (ORCPT ); Tue, 14 Dec 2021 23:35:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239726AbhLOEfZ (ORCPT ); Tue, 14 Dec 2021 23:35:25 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F07ACC06173E; Tue, 14 Dec 2021 20:35:24 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 82235617D2; Wed, 15 Dec 2021 04:35:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5570BC34608; Wed, 15 Dec 2021 04:35:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639542923; bh=Vd9kxCRzDbGb5FCo+00iF4zQOsjd4QYOTa28clj2axY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=s0J9kR+TDDl4WDjiTluGePS9httKRvEU8WUe4S8ivQtOMTenl7BvH4HnP6rWqZeNR gk0j81yiXvkXvsiUOwqfZPjNcc0Qap6CS8mov5yi+HqYwpYRlFzGATPpze/YUOjJGR 8aYPUwpbFgXNff9IpQkhk7wy5IrEoEPlgFo8XJhyG6actcid2gzzSXzn4nD/GZOdfK BBiBd6LQyU3idoMvJMzJ6UWJZCnguo0uDAZ8O4muOANbgdUpHayKYr+mNmPRPfKQHZ bSsE60ReLxApoSAfXtg00YmTghq3HbNYS/is+QRrdwMlHVxHjC0DBn74+s3WbtSJih CZPPnDOYBVNlg== From: Vinod Koul To: Bjorn Andersson Cc: linux-arm-msm@vger.kernel.org, Vladimir Zapolskiy , Andy Gross , Rob Herring , Konrad Dybcio , devicetree@vger.kernel.org, Vinod Koul Subject: [PATCH v3 10/11] arm64: dts: qcom: sm8450: add cpufreq support Date: Wed, 15 Dec 2021 10:04:39 +0530 Message-Id: <20211215043440.605624-11-vkoul@kernel.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211215043440.605624-1-vkoul@kernel.org> References: <20211215043440.605624-1-vkoul@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Vladimir Zapolskiy The change adds a description of a SM8450 cpufreq-epss controller and references to it from CPU nodes. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 8fff4d54933f..56e3e8f771bd 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -44,6 +44,7 @@ CPU0: cpu@0 { next-level-cache = <&L2_0>; power-domains = <&CPU_PD0>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; L2_0: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -61,6 +62,7 @@ CPU1: cpu@100 { next-level-cache = <&L2_100>; power-domains = <&CPU_PD1>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; L2_100: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -75,6 +77,7 @@ CPU2: cpu@200 { next-level-cache = <&L2_200>; power-domains = <&CPU_PD2>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; L2_200: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -89,6 +92,7 @@ CPU3: cpu@300 { next-level-cache = <&L2_300>; power-domains = <&CPU_PD3>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 0>; L2_300: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -103,6 +107,7 @@ CPU4: cpu@400 { next-level-cache = <&L2_400>; power-domains = <&CPU_PD4>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; L2_400: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -117,6 +122,7 @@ CPU5: cpu@500 { next-level-cache = <&L2_500>; power-domains = <&CPU_PD5>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; L2_500: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -132,6 +138,7 @@ CPU6: cpu@600 { next-level-cache = <&L2_600>; power-domains = <&CPU_PD6>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 1>; L2_600: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -146,6 +153,7 @@ CPU7: cpu@700 { next-level-cache = <&L2_700>; power-domains = <&CPU_PD7>; power-domain-names = "psci"; + qcom,freq-domain = <&cpufreq_hw 2>; L2_700: l2-cache { compatible = "cache"; next-level-cache = <&L3_0>; @@ -867,6 +875,21 @@ rpmhpd_opp_turbo_l1: opp10 { }; }; + cpufreq_hw: cpufreq@17d91000 { + compatible = "qcom,sm8450-cpufreq-epss", "qcom,cpufreq-epss"; + reg = <0 0x17d91000 0 0x1000>, + <0 0x17d92000 0 0x1000>, + <0 0x17d93000 0 0x1000>; + reg-names = "freq-domain0", "freq-domain1", "freq-domain2"; + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; + clock-names = "xo", "alternate"; + interrupts = , + , + ; + interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2"; + #freq-domain-cells = <1>; + }; + ufs_mem_hc: ufshc@1d84000 { compatible = "qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0";