From patchwork Fri Dec 17 10:12:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 525239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7FFBC433FE for ; Fri, 17 Dec 2021 10:12:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234739AbhLQKM4 (ORCPT ); Fri, 17 Dec 2021 05:12:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234738AbhLQKM4 (ORCPT ); Fri, 17 Dec 2021 05:12:56 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BEAAC06173E; Fri, 17 Dec 2021 02:12:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 06DB6620E5; Fri, 17 Dec 2021 10:12:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5C8ECC36AEA; Fri, 17 Dec 2021 10:12:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639735975; bh=dH8n7XUB1hLxYi6SAGbwQxNYY+TqA+ySoHz3F9+B+do=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cQzyhvI5KJkFziFEyLauhMS8wcVOFeE007vOX8MrViQtCpyuUd2WxMSDRRuxWxBuW D9MrOGC82RmQ4bhs3j3XMObXD0DExnJD4XnxjYOaeaUSwKoIw0fPjhGqNSX9u+FIqC j+DvpSymDKCjsd9AyIRF7Fnz05sCmLm7VHdIKV5eAYDsep5DB18sYr+9cOk0katxM1 z0v6LrnOLGHczpW3Pc+2aeiSOfoZQEJ/WgHQOyvE1mTt+/tn4/tpIwMfWuKBKofUQp 1TPxz95FZimnV9CDD6nlf7VJM7zvw1uWK8RyxPdzanaDN1GP4zEqfbmTLbPcno88uD Ef4hxz57kyE5Q== Received: from mchehab by mail.kernel.org with local (Exim 4.94.2) (envelope-from ) id 1myAEP-000g6B-6k; Fri, 17 Dec 2021 11:12:53 +0100 From: Mauro Carvalho Chehab To: Wei Xu , Rob Herring Cc: Mauro Carvalho Chehab , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mauro Carvalho Chehab Subject: [PATCH v2 2/7] dt-bindings: clock: hi3670-clock.txt: add pmctrl compatible Date: Fri, 17 Dec 2021 11:12:46 +0100 Message-Id: <3495df40d10eecb2326cd0ef002cc708244c0fd8.1639735742.git.mchehab@kernel.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Mauro Carvalho Chehab Add a compatible for the Power Management domain controller, which is needed in order to control power for the PCI devices on HiKey 970. Acked-by: Rob Herring Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Mauro Carvalho Chehab --- See [PATCH v2 0/7] at: https://lore.kernel.org/all/cover.1639735742.git.mchehab@kernel.org/ Documentation/devicetree/bindings/clock/hi3670-clock.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/hi3670-clock.txt b/Documentation/devicetree/bindings/clock/hi3670-clock.txt index 66f3697eca78..8e9f12a3ba5b 100644 --- a/Documentation/devicetree/bindings/clock/hi3670-clock.txt +++ b/Documentation/devicetree/bindings/clock/hi3670-clock.txt @@ -15,6 +15,7 @@ Required Properties: - "hisilicon,hi3670-iomcu" - "hisilicon,hi3670-media1-crg" - "hisilicon,hi3670-media2-crg" + - "hisilicon,hi3670-pmctrl" - reg: physical base address of the controller and length of memory mapped region. From patchwork Fri Dec 17 10:12:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 525236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 522AAC43219 for ; Fri, 17 Dec 2021 10:13:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234804AbhLQKND (ORCPT ); Fri, 17 Dec 2021 05:13:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234760AbhLQKM6 (ORCPT ); Fri, 17 Dec 2021 05:12:58 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4802C06173E; Fri, 17 Dec 2021 02:12:57 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A79C9B82788; Fri, 17 Dec 2021 10:12:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 676BFC36AEE; Fri, 17 Dec 2021 10:12:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639735975; bh=D5n3Gqz846mEtcLkrq2xHAalohEXwI4fhrOFgrUoiqM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MuAGJLPXqzOt1o/9sYxx2OMX+KCPQbFNp2P83OOqjLO51uF8ZNQOibIGnYr1OwTz2 ivcll4VVyUDdBACNvaAq6YaqeU9KXoGqtN1DC5Wr7rJdh0mUyUaw7Yhsktyv8jOarb yh1lhARoKhCjGd6WenUQ1LLujoFvw/5He1gLQu+u0iMPZ0RHoanCWhsLOA6sYHNPO1 gGKyfNMRv/RHyqhbdCyH5J3Ifmg+6LOTW9/60DQWNJ/QSyeG269pU2jtSppSfrF7/e 8wvoMRcdAZzpRhKgvhJztd9Xy0w8jVOwajf4g8FhxE6XkNGh1WRJUAP0Him12PUH+f 8R4O6IiXnoQ9g== Received: from mchehab by mail.kernel.org with local (Exim 4.94.2) (envelope-from ) id 1myAEP-000g6K-A6; Fri, 17 Dec 2021 11:12:53 +0100 From: Mauro Carvalho Chehab To: Wei Xu , Rob Herring Cc: Mauro Carvalho Chehab , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mauro Carvalho Chehab Subject: [PATCH v2 4/7] arm64: dts: hisilicon: Add support for Hikey 970 USB3 PHY Date: Fri, 17 Dec 2021 11:12:48 +0100 Message-Id: <302bdf9f49298c2378dfe64ab3808d70e7ba7cdb.1639735742.git.mchehab@kernel.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Mauro Carvalho Chehab Add the USB3 bindings for Kirin 970 phy and Hikey 970 board. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Mauro Carvalho Chehab --- See [PATCH v2 0/7] at: https://lore.kernel.org/all/cover.1639735742.git.mchehab@kernel.org/ .../boot/dts/hisilicon/hi3670-hikey970.dts | 83 +++++++++++++++++++ arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 56 +++++++++++++ 2 files changed, 139 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts index 7c32f5fd5cc5..60594db07041 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts @@ -430,3 +430,86 @@ &uart6 { label = "LS-UART1"; status = "okay"; }; + +&usb_phy { + phy-supply = <&ldo17>; +}; + +&i2c1 { + status = "okay"; + + rt1711h: rt1711h@4e { + compatible = "richtek,rt1711h"; + reg = <0x4e>; + status = "okay"; + interrupt-parent = <&gpio27>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_cfg_func>; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <10000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@1 { + reg = <1>; + usb_con_ss: endpoint { + remote-endpoint = <&dwc3_ss>; + }; + }; + }; + }; + port { + #address-cells = <1>; + #size-cells = <0>; + + rt1711h_ep: endpoint@0 { + reg = <0>; + remote-endpoint = <&hikey_usb_ep1>; + }; + }; + }; +}; + +&i2c2 { + /* USB HUB is on this bus at address 0x44 */ + status = "okay"; +}; + +&dwc3 { /* USB */ + dr_mode = "otg"; + maximum-speed = "super-speed"; + phy_type = "utmi"; + snps,dis-del-phy-power-chg-quirk; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + snps,tx_de_emphasis_quirk; + snps,tx_de_emphasis = <1>; + snps,dis-split-quirk; + snps,gctl-reset-quirk; + usb-role-switch; + role-switch-default-mode = "host"; + port { + #address-cells = <1>; + #size-cells = <0>; + dwc3_role_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&hikey_usb_ep0>; + }; + + dwc3_ss: endpoint@1 { + reg = <1>; + remote-endpoint = <&usb_con_ss>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 636c8817df7e..782e1487666d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -8,6 +8,7 @@ #include #include +#include / { compatible = "hisilicon,hi3670"; @@ -785,5 +786,60 @@ i2c4: i2c@fdf0d000 { pinctrl-0 = <&i2c4_pmx_func &i2c4_cfg_func>; status = "disabled"; }; + + usb3_otg_bc: usb3_otg_bc@ff200000 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0xff200000 0x0 0x1000>; + + usb_phy: usbphy { + compatible = "hisilicon,hi3670-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,sctrl-syscon = <&sctrl>; + hisilicon,eye-diagram-param = <0xFDFEE4>; + hisilicon,tx-vboost-lvl = <0x5>; + }; + }; + + usb31_misc_rst: usb31_misc_rst_controller { + compatible = "hisilicon,hi3660-reset"; + #reset-cells = <2>; + hisi,rst-syscon = <&usb3_otg_bc>; + }; + + usb3: hisi_dwc3 { + compatible = "hisilicon,hi3670-dwc3"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&crg_ctrl HI3670_CLK_GATE_ABB_USB>, + <&crg_ctrl HI3670_HCLK_GATE_USB3OTG>, + <&crg_ctrl HI3670_CLK_GATE_USB3OTG_REF>, + <&crg_ctrl HI3670_ACLK_GATE_USB3DVFS>; + clock-names = "clk_gate_abb_usb", + "hclk_gate_usb3otg", + "clk_gate_usb3otg_ref", + "aclk_gate_usb3dvfs"; + + assigned-clocks = <&crg_ctrl HI3670_ACLK_GATE_USB3DVFS>; + assigned-clock-rates = <238000000>; + resets = <&crg_rst 0x90 6>, + <&crg_rst 0x90 7>, + <&usb31_misc_rst 0xA0 8>, + <&usb31_misc_rst 0xA0 9>; + + dwc3: usb@ff100000 { + compatible = "snps,dwc3"; + reg = <0x0 0xff100000 0x0 0x100000>; + + interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>, + <0 161 IRQ_TYPE_LEVEL_HIGH>; + + phys = <&usb_phy>; + phy-names = "usb3-phy"; + }; + }; }; }; From patchwork Fri Dec 17 10:12:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 525235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2147C433FE for ; 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d=kernel.org; s=k20201202; t=1639735975; bh=C2307qGVcQra+sGbtc3mGL9UeC8p+us/HaJ7iZdqqUs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iU0vsHlcveq4k1QDFDa/ZL/M4qrzUiwKW5X52LSxv9OJOLknQY9Ifk+LKoz0WTnyL UZkdUQm9QACj1fkXOxEDC46jEkffKliVDubYjCuNWw7uDzizCmdy5veP9cX648m7YE tpa3FXOViM9ukKDm5ceQtvaf+g+mnnhCyxW/arcIitx193TBQ+YR6QbsaXCqAfegxR jgW4dnN013yOAihMjPsE+olmmUKoP7Ghg4IFQ2xaZOPG9ZyncGfsFGIXQUTsttfQq8 YGfythb2oylQWeQkpNzPJ7Qc367pEFCkmnWG/0CL+DwUjpJpOwyU7MoGedstdyuinb xT9vnlFGzXIGA== Received: from mchehab by mail.kernel.org with local (Exim 4.94.2) (envelope-from ) id 1myAEP-000g6O-Br; Fri, 17 Dec 2021 11:12:53 +0100 From: Mauro Carvalho Chehab To: Wei Xu , Rob Herring Cc: Manivannan Sadhasivam , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mauro Carvalho Chehab , Mauro Carvalho Chehab Subject: [PATCH v2 5/7] arm64: dts: HiSilicon: Add support for HiKey 970 PCIe controller hardware Date: Fri, 17 Dec 2021 11:12:49 +0100 Message-Id: <20c72e7a82a4fe6080136fbee5c73d9c9d477b7d.1639735742.git.mchehab@kernel.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Manivannan Sadhasivam Add DTS bindings for the HiKey 970 board's PCIe hardware. Co-developed-by: Mauro Carvalho Chehab Signed-off-by: Manivannan Sadhasivam Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Mauro Carvalho Chehab --- See [PATCH v2 0/7] at: https://lore.kernel.org/all/cover.1639735742.git.mchehab@kernel.org/ arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 107 ++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 782e1487666d..b47654b50139 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -177,6 +177,12 @@ sctrl: sctrl@fff0a000 { #clock-cells = <1>; }; + pmctrl: pmctrl@fff31000 { + compatible = "hisilicon,hi3670-pmctrl", "syscon"; + reg = <0x0 0xfff31000 0x0 0x1000>; + #clock-cells = <1>; + }; + iomcu: iomcu@ffd7e000 { compatible = "hisilicon,hi3670-iomcu", "syscon"; reg = <0x0 0xffd7e000 0x0 0x1000>; @@ -660,6 +666,107 @@ gpio28: gpio@fff1d000 { clock-names = "apb_pclk"; }; + pcie_phy: pcie-phy@fc000000 { + compatible = "hisilicon,hi970-pcie-phy"; + reg = <0x0 0xfc000000 0x0 0x80000>; + + phy-supply = <&ldo33>; + + clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>, + <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3670_ACLK_GATE_PCIE>; + clock-names = "phy_ref", "aux", + "apb_phy", "apb_sys", + "aclk"; + + /* vboost iboost pre post main */ + hisilicon,eye-diagram-param = <0xffffffff 0xffffffff + 0xffffffff 0xffffffff + 0xffffffff>; + + #phy-cells = <0>; + }; + + pcie@f4000000 { + compatible = "hisilicon,kirin970-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000000>, + <0x0 0xfc180000 0x0 0x1000>, + <0x0 0xf5000000 0x0 0x2000>; + reg-names = "dbi", "apb", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + phys = <&pcie_phy>; + ranges = <0x02000000 0x0 0x00000000 + 0x0 0xf6000000 + 0x0 0x02000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupts = ; + interrupt-names = "msi"; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0x0 0 0 1 + &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 2 + &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 3 + &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 4 + &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; + reset-gpios = <&gpio7 0 0>; + hisilicon,clken-gpios = <&gpio27 3 0>, <&gpio17 0 0>, + <&gpio20 6 0>; + pcie@0,0 { // Lane 0: PCIe switch: Bus 1, Device 0 + reg = <0 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + pcie@0,0 { // Lane 0: upstream + reg = <0 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + pcie@1,0 { // Lane 4: M.2 + reg = <0x0800 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + reset-gpios = <&gpio3 1 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + + pcie@5,0 { // Lane 5: Mini PCIe + reg = <0x2800 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + reset-gpios = <&gpio27 4 0 >; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + + pcie@7,0 { // Lane 6: Ethernet + reg = <0x3800 0 0 0 0>; + compatible = "pciclass,0604"; + device_type = "pci"; + reset-gpios = <&gpio25 2 0 >; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + }; + }; + /* UFS */ ufs: ufs@ff3c0000 { compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1"; From patchwork Fri Dec 17 10:12:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 525237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 899A3C433FE for ; Fri, 17 Dec 2021 10:13:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232647AbhLQKNC (ORCPT ); Fri, 17 Dec 2021 05:13:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234764AbhLQKM6 (ORCPT ); Fri, 17 Dec 2021 05:12:58 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63A61C06173F; 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Fri, 17 Dec 2021 11:12:53 +0100 From: Mauro Carvalho Chehab To: Wei Xu , Rob Herring Cc: Mauro Carvalho Chehab , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mauro Carvalho Chehab Subject: [PATCH v2 6/7] arm64: dts: hisilicon: Add usb mux hub for hikey970 Date: Fri, 17 Dec 2021 11:12:50 +0100 Message-Id: X-Mailer: git-send-email 2.33.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Mauro Carvalho Chehab Add dt bindings for Kirin 970 USB HUB. Such board comes with an integrated USB HUB provided via a TI TUSB8041 4-port USB 3.0 hub. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Mauro Carvalho Chehab --- See [PATCH v2 0/7] at: https://lore.kernel.org/all/cover.1639735742.git.mchehab@kernel.org/ .../boot/dts/hisilicon/hi3670-hikey970.dts | 23 +++++++++++++++++++ arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 10 ++++---- 2 files changed, 28 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts index 60594db07041..95ca49f1e455 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts @@ -53,6 +53,29 @@ wlan_en: wlan-en-1-8v { startup-delay-us = <70000>; enable-active-high; }; + + usb-hub { + compatible = "hisilicon,usbhub"; + typec-vbus-gpios = <&gpio26 1 0>; + otg-switch-gpios = <&gpio4 2 0>; + hub-reset-en-gpios = <&gpio0 3 0>; + hub-vdd-supply = <&ldo17>; + usb-role-switch; + + port { + #address-cells = <1>; + #size-cells = <0>; + + hikey_usb_ep0: endpoint@0 { + reg = <0>; + remote-endpoint = <&dwc3_role_switch>; + }; + hikey_usb_ep1: endpoint@1 { + reg = <1>; + remote-endpoint = <&rt1711h_ep>; + }; + }; + }; }; /* diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index b47654b50139..486dc93ab47b 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -915,7 +915,7 @@ usb31_misc_rst: usb31_misc_rst_controller { hisi,rst-syscon = <&usb3_otg_bc>; }; - usb3: hisi_dwc3 { + usb3: dwc3 { compatible = "hisilicon,hi3670-dwc3"; #address-cells = <2>; #size-cells = <2>; @@ -925,10 +925,10 @@ usb3: hisi_dwc3 { <&crg_ctrl HI3670_HCLK_GATE_USB3OTG>, <&crg_ctrl HI3670_CLK_GATE_USB3OTG_REF>, <&crg_ctrl HI3670_ACLK_GATE_USB3DVFS>; - clock-names = "clk_gate_abb_usb", - "hclk_gate_usb3otg", - "clk_gate_usb3otg_ref", - "aclk_gate_usb3dvfs"; + clock-names = "abb", + "hclk", + "ref", + "aclk"; assigned-clocks = <&crg_ctrl HI3670_ACLK_GATE_USB3DVFS>; assigned-clock-rates = <238000000>; From patchwork Fri Dec 17 10:12:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 525238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C33FC433EF for ; Fri, 17 Dec 2021 10:13:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234761AbhLQKM6 (ORCPT ); Fri, 17 Dec 2021 05:12:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39276 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234748AbhLQKM5 (ORCPT ); Fri, 17 Dec 2021 05:12:57 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F107AC061574; Fri, 17 Dec 2021 02:12:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 93761620E5; Fri, 17 Dec 2021 10:12:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8FB46C36B02; Fri, 17 Dec 2021 10:12:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1639735975; bh=pH4F/hKaDAo8h6YPe6yQklEHUIa1UBskbn4kAw+qsCc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tXUeT8Gm2htr6bczJiWXTKy3jOVbIOrSOFrbGb1thqmqXwArWD5IogeHg3xGGCJRs Hv2lsxBzZFahv82wUsQsSUe9jnKWcZ/7bo/xc0T4nZLz8pIHLzWy8K9lDW6TEljNq5 wVgIpGIh1MSFgkce8pVmDNtiJ66ugWAQgnbZm8gF0ecRAg6i6ewnNq6hYYbMOZIIG/ jUJW6vbTTcibIPKmP2rTN2tg0GixZTeBhFH3PQmXG8ZLnGantpjHbZoDyKqVXykdOm qPJy9h+2evxMjqjVrsfC0u6tRKkPbhiA4d6Z/CjnIs3pQnDNuwHfOK8pnjgecetXoV oipw2czCh9cgA== Received: from mchehab by mail.kernel.org with local (Exim 4.94.2) (envelope-from ) id 1myAEP-000g6W-FP; Fri, 17 Dec 2021 11:12:53 +0100 From: Mauro Carvalho Chehab To: Wei Xu , Rob Herring Cc: John Stultz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mauro Carvalho Chehab , Mauro Carvalho Chehab Subject: [PATCH v2 7/7] arm64: dts: hisilicon: Add usb mux hub for hikey960 Date: Fri, 17 Dec 2021 11:12:51 +0100 Message-Id: X-Mailer: git-send-email 2.33.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: John Stultz Add dt bindings for Kirin 960 USB HUB. Such board comes with an integrated USB HUB provided via a Microchip USB5734 4-port high-speed hub controller. [mchehab: modified it to adapt to the merged DT schema] Signed-off-by: John Stultz Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Mauro Carvalho Chehab --- See [PATCH v2 0/7] at: https://lore.kernel.org/all/cover.1639735742.git.mchehab@kernel.org/ .../boot/dts/hisilicon/hi3660-hikey960.dts | 35 +++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index f68580dc87d8..135501e57f86 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -197,6 +197,37 @@ optee { method = "smc"; }; }; + + usb_hub_vdd: usb_hub_vdd { + compatible = "regulator-fixed"; + regulator-name = "hub-vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio5 6 0>; + enable-active-high; + }; + + usb-hub { + compatible = "hisilicon,usbhub"; + typec-vbus-gpios = <&gpio25 2 GPIO_ACTIVE_HIGH>; + otg-switch-gpios = <&gpio25 6 GPIO_ACTIVE_HIGH>; + hub-vdd-supply = <&usb_hub_vdd>; + usb-role-switch; + + port { + #address-cells = <1>; + #size-cells = <0>; + + hikey_usb_ep0: endpoint@0 { + reg = <0>; + remote-endpoint = <&dwc3_role_switch>; + }; + hikey_usb_ep1: endpoint@1 { + reg = <1>; + remote-endpoint = <&rt1711h_ep>; + }; + }; + }; }; /* @@ -564,7 +595,7 @@ port { rt1711h_ep: endpoint@0 { reg = <0>; - remote-endpoint = <&dwc3_role_switch>; + remote-endpoint = <&hikey_usb_ep1>; }; }; }; @@ -686,7 +717,7 @@ port { #size-cells = <0>; dwc3_role_switch: endpoint@0 { reg = <0>; - remote-endpoint = <&rt1711h_ep>; + remote-endpoint = <&hikey_usb_ep0>; }; dwc3_ss: endpoint@1 {