From patchwork Tue Nov 13 05:50:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sasha Levin X-Patchwork-Id: 150918 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp4011769ljp; Mon, 12 Nov 2018 21:59:44 -0800 (PST) X-Google-Smtp-Source: AJdET5dfPOfIXztZ+VplFehNhplAczBIcW0cS7tQacNQT6mDsJ+EtnM4QeSv8ImbuFRn6z9qORta X-Received: by 2002:a63:907:: with SMTP id 7-v6mr3516203pgj.121.1542088784565; Mon, 12 Nov 2018 21:59:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542088784; cv=none; d=google.com; s=arc-20160816; b=nhvV5uzmf3g1vsLYjVD887mUiwWJMfBXN+2vq6DnvVYiv2vLCsoXGPPxBSQNc7uT2G 4SGBH5HLlV9FzX4wKj0gTBA3m+YoKgdyOdi34uKceIDrIBGqgJUWSDX1ZF0fGam15cyZ kwlkxQ/xOlECfAHNQi8ikLeSVS7GxjGmRTAHEvaTy3KmExWYcaDTNbIiiHcqE58kdcJg 4FR9zr7FU9ds9YHnJbPp4G7wI/VXmrTYpnyfGUSBfyqcLLehr+xKxP6dLLyqmM+GrAh8 hoiscRLmQPSJ87dsDx2F9LlfamoSNfEjF8rzvALeyfqi8hJOEY5TJd7Gl8S2/E09X8O+ 8jSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=8Rt6vU85V7RumWVE6qGuUrEbdnKr7pp2AQAKScVTZCI=; b=h89zPoUFuyP36Pq6fz4MSCnv08T+aEDt724AwZzYWw6lx6/NfuAiXG0xTKwWp4sNeI DB+niFkgADgHWLS6IWW7Y1ejOGhnS85k4qtKuQ3xWHFVqGxgm0UkB2iqNGgQGzYht07p 46YniXiXaaHLu4W1NneDDnrG1C7k1RuDd/0pJU/jpzCfx6194Ch6aXLb2Euc9e9Kv04t Xa92RBqw3yYz+SQv5HJ/WbmJRJTJYfrKRasA838AHt2aJ82BSgG7mad8uzJ5cvWBJmlA kNozYaafrxSHwHtIPlwB9qGiyDsW5xlAaIC5Zadc3o3QEk4sT5+oDyaXCu9VcEkNuD4y DgQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=p+pjfoGA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 194si18303522pgg.519.2018.11.12.21.59.44; Mon, 12 Nov 2018 21:59:44 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=p+pjfoGA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732299AbeKMPr6 (ORCPT + 32 others); Tue, 13 Nov 2018 10:47:58 -0500 Received: from mail.kernel.org ([198.145.29.99]:33966 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732277AbeKMPr5 (ORCPT ); Tue, 13 Nov 2018 10:47:57 -0500 Received: from sasha-vm.mshome.net (unknown [64.114.255.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8FBF82251C; Tue, 13 Nov 2018 05:51:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542088289; bh=rEW7FOhsjb5KfIVyFm4ZAPHnT612BU0DenklrHKMRwA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=p+pjfoGAUcddffV0Q0bJDh688kcTuvlO5ZXGje+gFRTd+ifklQ2TNXM3HUWJGEmij 4PARDxopDlG7BwzzDhlL3Hgj1D32Tc62GdIEZTMzsFl6f/x8qFBk8KlzFnconLuvtf YwW+pUJmj9V7Kq5u2opUjiasXBz6Wsdox8VAoJy0= From: Sasha Levin To: stable@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Sasha Levin , linux-clk@vger.kernel.org Subject: [PATCH AUTOSEL 4.18 25/39] clk: samsung: exynos5420: Enable PERIS clocks for suspend Date: Tue, 13 Nov 2018 00:50:39 -0500 Message-Id: <20181113055053.78352-25-sashal@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181113055053.78352-1-sashal@kernel.org> References: <20181113055053.78352-1-sashal@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marek Szyprowski [ Upstream commit b33228029d842269e17bba591609e83ed422005d ] Ensure that clocks for core SoC modules (including TZPC0..9 modules) are enabled for suspend/resume cycle. This fixes suspend/resume support on Exynos5422-based Odroid XU3/XU4 boards. Suggested-by: Joonyoung Shim Signed-off-by: Marek Szyprowski Signed-off-by: Sylwester Nawrocki Signed-off-by: Sasha Levin --- drivers/clk/samsung/clk-exynos5420.c | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 95e1bf69449b..d4f77c4eb277 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -281,6 +281,7 @@ static const struct samsung_clk_reg_dump exynos5420_set_clksrc[] = { { .offset = GATE_BUS_TOP, .value = 0xffffffff, }, { .offset = GATE_BUS_DISP1, .value = 0xffffffff, }, { .offset = GATE_IP_PERIC, .value = 0xffffffff, }, + { .offset = GATE_IP_PERIS, .value = 0xffffffff, }, }; static int exynos5420_clk_suspend(void) From patchwork Tue Nov 13 05:50:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sasha Levin X-Patchwork-Id: 150917 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp4011549ljp; Mon, 12 Nov 2018 21:59:24 -0800 (PST) X-Google-Smtp-Source: AJdET5cGvbzinin7qUZG3VNNGtA0ljYWC4XAidTdnQjAF3gTBc1u+bApZ3oz3ZFsicLqllgTDhbP X-Received: by 2002:a17:902:162:: with SMTP id 89-v6mr3746559plb.293.1542088764453; Mon, 12 Nov 2018 21:59:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542088764; cv=none; d=google.com; s=arc-20160816; b=GNcnaCdI/5Z1zfS/VBbh8BhA594bntdORYPvrj1tXdHzRobSdcJckOUYPYhRFsVNGR fCUea4X0gYg9zini9g14CP+WmPvzyNdcG0paknnxOaRGqnc4AB6qJCM+U0m5YI4pdwYR fNv02JDWbpaVp2g7atYTh4NdVgdJHAeH7sw2lZ5rnQfzMRobzP8zPifpRNzCuZ8mv3N5 Q63s7naFMRUTK1sbCwvrvs/vxKMveA12z8rFC/1ADFwAYKLOep/fRwViETPKTVU/LtBZ 9DFfVNwko1DRZIiROqd8qvnMbldNYG07KYzxxhlhVxDpH4sapl7Yog+gE9/Tp2+t2bQ7 6cdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=VS43ED2BrrI9e5CRdFEb/NM/QglhXIK2WnafVXaTMmg=; b=cswXpyNmUyvEcuwe2Fw2k7dXIvQGuWewN6k/VosJBo55NzokbLJVc8ngAPrN/xv0BE fXWR48nFwX163aP+gVOm/mFKXyEecdFFUNSnoctD7AP08TT04fSXXkyLoP8WS7dmvPl8 sOboM+A42+U4NT/yeD55cdlWE3pd9DADjmrtvsh47FEZQLKknExFTI6a31SyPATAwEZv 0KC78j2K1QQQ8FL9spiBy4YD+aVyhtBZ3wCOIhStJb/SdTb7We/S91mBrzcUHYbcK7Ty HobQVlQPirRJl15oyRcoTv5FtHfy/CnorYICl8ZQX4AzSG7LKNFWMGOak5jMfudveUEX jwSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hPzzDY6c; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o1si19159930pgq.13.2018.11.12.21.59.24; Mon, 12 Nov 2018 21:59:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=hPzzDY6c; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732797AbeKMPzv (ORCPT + 32 others); Tue, 13 Nov 2018 10:55:51 -0500 Received: from mail.kernel.org ([198.145.29.99]:34152 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732321AbeKMPsC (ORCPT ); Tue, 13 Nov 2018 10:48:02 -0500 Received: from sasha-vm.mshome.net (unknown [64.114.255.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C45472250E; Tue, 13 Nov 2018 05:51:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542088294; bh=E2HvajGKfnBA7PUztu3wLh9JVDEUx2G74JVEOGeSf0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hPzzDY6ceU1+q+CY6pdO9JzSkbfR3+7oKjMreprUdV4jbV1PhcRfKGxynFflbdCss NI/0K8/b2GD9S/DeBXWhXVCijO+c8+Tm7ojywUtiRbguFdCNBkrPz+L3uH3zNbVOMy K/bRsMTBmPetJIfOcRCioHIU5KCrq31fc9TFvamw= From: Sasha Levin To: stable@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jerome Brunet , Sasha Levin , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH AUTOSEL 4.18 30/39] clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary Date: Tue, 13 Nov 2018 00:50:44 -0500 Message-Id: <20181113055053.78352-30-sashal@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181113055053.78352-1-sashal@kernel.org> References: <20181113055053.78352-1-sashal@kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jerome Brunet [ Upstream commit 2303a9ca693e585a558497ad737728fec97e2b8a ] CLK_GET_RATE_NOCACHE should only be necessary when the registers controlling the rate of clock may change outside of CCF. On Amlogic, it should only be the case for the hdmi pll which is directly controlled by the display driver (WIP to fix this). The other plls should not require this flag. Reviewed-by: Martin Blumenstingl Tested-by: Martin Blumenstingl Signed-off-by: Jerome Brunet Signed-off-by: Sasha Levin --- drivers/clk/meson/axg.c | 1 - drivers/clk/meson/gxbb.c | 12 ++++++++---- drivers/clk/meson/meson8b.c | 3 --- 3 files changed, 8 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index bd4dbc696b88..00e7ebc65a43 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -97,7 +97,6 @@ static struct clk_regmap axg_sys_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index 177fffb9ebef..46ede408c993 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -214,7 +214,6 @@ static struct clk_regmap gxbb_fixed_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -277,6 +276,10 @@ static struct clk_regmap gxbb_hdmi_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "hdmi_pll_pre_mult" }, .num_parents = 1, + /* + * Display directly handle hdmi pll registers ATM, we need + * NOCACHE to keep our view of the clock as accurate as possible + */ .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -335,6 +338,10 @@ static struct clk_regmap gxl_hdmi_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, + /* + * Display directly handle hdmi pll registers ATM, we need + * NOCACHE to keep our view of the clock as accurate as possible + */ .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -372,7 +379,6 @@ static struct clk_regmap gxbb_sys_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -419,7 +425,6 @@ static struct clk_regmap gxbb_gp0_pll = { .ops = &meson_clk_pll_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -473,7 +478,6 @@ static struct clk_regmap gxl_gp0_pll = { .ops = &meson_clk_pll_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c index 7447d96a265f..74697e145dde 100644 --- a/drivers/clk/meson/meson8b.c +++ b/drivers/clk/meson/meson8b.c @@ -132,7 +132,6 @@ static struct clk_regmap meson8b_fixed_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -169,7 +168,6 @@ static struct clk_regmap meson8b_vid_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, }; @@ -207,7 +205,6 @@ static struct clk_regmap meson8b_sys_pll = { .ops = &meson_clk_pll_ro_ops, .parent_names = (const char *[]){ "xtal" }, .num_parents = 1, - .flags = CLK_GET_RATE_NOCACHE, }, };