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[90.55.193.222]) by smtp.gmail.com with ESMTPSA id f15sm1065423wrt.10.2018.11.21.09.27.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Nov 2018 09:27:46 -0800 (PST) From: Loic Poulain To: wim@linux-watchdog.org, linux@roeck-us.net, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, andy.gross@linaro.org, Loic Poulain Subject: [PATCH v2 1/3] watchdog: Add pm8916 watchdog driver Date: Wed, 21 Nov 2018 18:27:42 +0100 Message-Id: <1542821264-9200-1-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The PM816 module is a versatile PMIC with many diverse functions integrated, including, a watchdog. This watchdog is subcomponent of the PON (Power On) peripheral, in the same way as pwrkey/resin buttons. It works with two timers (2-stages), the first one generates an IRQ to the main SoC (APQ8016/MSM8916), the second one performs the reset. This driver expects the following device hierarchy: [pm8916]->[pm8916-pon]->[pm8916-wdt] It uses the pm8916 regmap to access PM8916 registers. Signed-off-by: Loic Poulain --- v2: SPDX license headers ordering coding styles / tabs / multi-line comments pretimeout / bark interrupt WDIOF_MAGICCLOSE flag timeout init via fdt devm usage drivers/watchdog/Kconfig | 8 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/pm8916_wdt.c | 214 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 223 insertions(+) create mode 100644 drivers/watchdog/pm8916_wdt.c -- 2.7.4 diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 2d64333..ef2c2b5 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -847,6 +847,14 @@ config SPRD_WATCHDOG Say Y here to include watchdog timer supported by Spreadtrum system. +config PM8916_WATCHDOG + tristate "QCOM PM8916 pmic watchdog" + depends on OF && MFD_SPMI_PMIC + select WATCHDOG_CORE + help + Say Y here to include support watchdog timer embedded into the + pm8916 module. + # X86 (i386 + ia64 + x86_64) Architecture config ACQUIRE_WDT diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index f69cdff..cc90e72 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -92,6 +92,7 @@ obj-$(CONFIG_STM32_WATCHDOG) += stm32_iwdg.o obj-$(CONFIG_UNIPHIER_WATCHDOG) += uniphier_wdt.o obj-$(CONFIG_RTD119X_WATCHDOG) += rtd119x_wdt.o obj-$(CONFIG_SPRD_WATCHDOG) += sprd_wdt.o +obj-$(CONFIG_PM8916_WATCHDOG) += pm8916_wdt.o # X86 (i386 + ia64 + x86_64) Architecture obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o diff --git a/drivers/watchdog/pm8916_wdt.c b/drivers/watchdog/pm8916_wdt.c new file mode 100644 index 0000000..25d1110 --- /dev/null +++ b/drivers/watchdog/pm8916_wdt.c @@ -0,0 +1,214 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PON_INT_RT_STS 0x10 +#define PMIC_WD_BARK_STS_BIT BIT(6) + +#define PON_PMIC_WD_RESET_S1_TIMER 0x54 +#define PON_PMIC_WD_RESET_S2_TIMER 0x55 + +#define PON_PMIC_WD_RESET_S2_CTL 0x56 +#define RESET_TYPE_WARM 0x01 +#define RESET_TYPE_SHUTDOWN 0x04 +#define RESET_TYPE_HARD 0x07 + +#define PON_PMIC_WD_RESET_S2_CTL2 0x57 +#define S2_RESET_EN_BIT BIT(7) + +#define PON_PMIC_WD_RESET_PET 0x58 +#define WATCHDOG_PET_BIT BIT(0) + +#define PM8916_WDT_DEFAULT_TIMEOUT 32 +#define PM8916_WDT_MIN_TIMEOUT 1 +#define PM8916_WDT_MAX_TIMEOUT 127 + +struct pm8916_wdt { + struct device *dev; + struct regmap *regmap; + struct watchdog_device wdev; + u32 baseaddr; + int irq; +}; + +static int pm8916_wdt_start(struct watchdog_device *wdev) +{ + struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); + + return regmap_update_bits(wdt->regmap, + wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, + S2_RESET_EN_BIT, S2_RESET_EN_BIT); +} + +static int pm8916_wdt_stop(struct watchdog_device *wdev) +{ + struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); + + return regmap_update_bits(wdt->regmap, + wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL2, + S2_RESET_EN_BIT, 0); +} + +static int pm8916_wdt_ping(struct watchdog_device *wdev) +{ + struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); + + return regmap_update_bits(wdt->regmap, + wdt->baseaddr + PON_PMIC_WD_RESET_PET, + WATCHDOG_PET_BIT, WATCHDOG_PET_BIT); +} + +static int pm8916_wdt_configure_timers(struct watchdog_device *wdev) +{ + struct pm8916_wdt *wdt = watchdog_get_drvdata(wdev); + int err; + + err = regmap_write(wdt->regmap, + wdt->baseaddr + PON_PMIC_WD_RESET_S1_TIMER, + wdev->timeout - wdev->pretimeout); + if (err) + return err; + + return regmap_write(wdt->regmap, + wdt->baseaddr + PON_PMIC_WD_RESET_S2_TIMER, + wdev->pretimeout); +} + +static int pm8916_wdt_set_timeout(struct watchdog_device *wdev, + unsigned int timeout) +{ + wdev->timeout = timeout; + + return pm8916_wdt_configure_timers(wdev); +} + +static int pm8916_wdt_set_pretimeout(struct watchdog_device *wdev, + unsigned int pretimeout) +{ + wdev->pretimeout = pretimeout; + + return pm8916_wdt_configure_timers(wdev); +} + +static irqreturn_t pm8916_wdt_isr(int irq, void *arg) +{ + struct pm8916_wdt *wdt = arg; + int err, sts; + + err = regmap_read(wdt->regmap, wdt->baseaddr + PON_INT_RT_STS, &sts); + if (err) + return IRQ_HANDLED; + + if (sts & PMIC_WD_BARK_STS_BIT) + watchdog_notify_pretimeout(&wdt->wdev); + + return IRQ_HANDLED; +} + +static const struct watchdog_info pm8916_wdt_ident = { + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, + .identity = "QCOM PM8916 PON WDT", +}; + +static const struct watchdog_info pm8916_wdt_pt_ident = { + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | + WDIOF_PRETIMEOUT, + .identity = "QCOM PM8916 PON WDT", +}; + +static const struct watchdog_ops pm8916_wdt_ops = { + .owner = THIS_MODULE, + .start = pm8916_wdt_start, + .stop = pm8916_wdt_stop, + .ping = pm8916_wdt_ping, + .set_timeout = pm8916_wdt_set_timeout, + .set_pretimeout = pm8916_wdt_set_pretimeout, +}; + +static int pm8916_wdt_probe(struct platform_device *pdev) +{ + struct pm8916_wdt *wdt; + struct device *parent; + int err, irq; + + wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); + if (!wdt) + return -ENOMEM; + + wdt->dev = &pdev->dev; + parent = pdev->dev.parent; + + /* + * The pm8916-pon-wdt is a child of the pon device, which is a child + * of the pm8916 mfd device. We want access to the pm8916 registers. + * Retrieve regmap from pm8916 (parent->parent) and base address + * from pm8916-pon (pon). + */ + wdt->regmap = dev_get_regmap(parent->parent, NULL); + if (!wdt->regmap) { + dev_err(&pdev->dev, "failed to locate regmap\n"); + return -ENODEV; + } + + err = device_property_read_u32(parent, "reg", &wdt->baseaddr); + if (err) { + dev_err(&pdev->dev, "failed to get pm8916-pon address\n"); + return err; + } + + irq = platform_get_irq(pdev, 0); + if (irq > 0) { + if (!devm_request_irq(&pdev->dev, irq, pm8916_wdt_isr, 0, + "pm8916_wdt", wdt)) + wdt->irq = irq; + } + + /* Configure watchdog to hard-reset mode */ + err = regmap_write(wdt->regmap, + wdt->baseaddr + PON_PMIC_WD_RESET_S2_CTL, + RESET_TYPE_HARD); + if (err) { + dev_err(&pdev->dev, "failed configure watchdog\n"); + return err; + } + + wdt->wdev.info = wdt->irq ? &pm8916_wdt_pt_ident : &pm8916_wdt_ident, + wdt->wdev.ops = &pm8916_wdt_ops, + wdt->wdev.parent = &pdev->dev; + wdt->wdev.min_timeout = PM8916_WDT_MIN_TIMEOUT; + wdt->wdev.max_timeout = PM8916_WDT_MAX_TIMEOUT; + wdt->wdev.timeout = PM8916_WDT_DEFAULT_TIMEOUT; + wdt->wdev.pretimeout = 0; + watchdog_set_drvdata(&wdt->wdev, wdt); + + watchdog_init_timeout(&wdt->wdev, 0, &pdev->dev); + pm8916_wdt_configure_timers(&wdt->wdev); + + return devm_watchdog_register_device(&pdev->dev, &wdt->wdev); +} + +static const struct of_device_id pm8916_wdt_id_table[] = { + { .compatible = "qcom,pm8916-wdt" }, + { } +}; +MODULE_DEVICE_TABLE(of, pm8916_wdt_id_table); + +static struct platform_driver pm8916_wdt_driver = { + .probe = pm8916_wdt_probe, + .driver = { + .name = "pm8916-wdt", + .of_match_table = of_match_ptr(pm8916_wdt_id_table), + }, +}; +module_platform_driver(pm8916_wdt_driver); + +MODULE_AUTHOR("Loic Poulain "); +MODULE_DESCRIPTION("Qualcomm pm8916 watchdog driver"); +MODULE_LICENSE("GPL v2"); From patchwork Wed Nov 21 17:27:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 151702 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2214513ljp; Wed, 21 Nov 2018 09:27:52 -0800 (PST) X-Google-Smtp-Source: AFSGD/WJkSXvUy+VtEpV+EdPtKHg2MbUt2FFFADTZdCS9a1nkFfDcg/Lw1l3xLVDQ0gXojI2pDFJ X-Received: by 2002:a17:902:2868:: with SMTP id e95mr5763480plb.317.1542821272257; Wed, 21 Nov 2018 09:27:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542821272; cv=none; d=google.com; s=arc-20160816; b=s+7JhM8SBH2UQwk8asrXjXHgv0E8BjZ1r8KI6w4LG11qSvM75VrWaafDT9dPy1xRqd an6HxIBa2llGJiih+gK7WP8TLJAdT1AuGjeW5pckEIdXazuJDOvduLryA/gvQbCsFzfI SGZuBitzx/yw0OrWhMx36U1WPAKjjyvOKviprNm4VlePljXaXVAg9KMppqpjRvYqj8+C OQ6dLqTw2WMyqsJwHHx8OBzfvJUfr7GGAwGVolHW1qcb3DJQb/9B5/j6ejAL1httH0DF B2oENuKAX6gRBIWaoCrqrU0X7L72oR4ajGEqTjnZuLjZvEM4f61s7MlsH3g//Smddd7T GRIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=p5l6i/iQQTVQZRXcGWIjj6XB1A/847V8QkxrdF6kDZI=; b=vtNsOs5S7HBrRC4NRtuS4NP2VEbTblgakTgMUCMxRSq+4ArzoxXHHgvc2eApbXnVp+ q0lM5BTlJM+JOnKLz5eHnZ0LPwk12ij5zdZyx2V+LtzJ86qMZVcmu25UtLFIuBx0hF38 AwpQGh5mgnYoisfhheHIZkRpITJV7MAE1HoW8nEPJerKEqiKDq33IBu7Y7bwAa8xJMGQ Z1+jbBpnG2Vgq8IW9JyqGYongK1sd9oFiWiYpV7OZuNaGlB23R8KxtUMVDfhO1TLdWjq S4l1KcOeTaocVe7sakHzHQbVPfBXWsAEsqqCMhFju6QOG/QKRalDWqkBP7kIfzizyxCG 4Bag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zetk12bF; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[90.55.193.222]) by smtp.gmail.com with ESMTPSA id f15sm1065423wrt.10.2018.11.21.09.27.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 21 Nov 2018 09:27:49 -0800 (PST) From: Loic Poulain To: wim@linux-watchdog.org, linux@roeck-us.net, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, andy.gross@linaro.org, Loic Poulain Subject: [PATCH v2 2/3] dt-bindings: watchdog: Add Qualcomm PM8916 watchdog Date: Wed, 21 Nov 2018 18:27:43 +0100 Message-Id: <1542821264-9200-2-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1542821264-9200-1-git-send-email-loic.poulain@linaro.org> References: <1542821264-9200-1-git-send-email-loic.poulain@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document support for the Watchdog Timer (WDT) Controller in the Qualcomm PM8916 PMIC module. Signed-off-by: Loic Poulain --- v2: Add interrupts and timeout-sec props .../bindings/watchdog/qcom,pm8916-wdt.txt | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt b/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt new file mode 100644 index 0000000..8a0d304 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt @@ -0,0 +1,29 @@ +QCOM PM8916 watchdog timer controller + +This pm8916 watchdog timer controller must be under pm8916-pon node. + +Required properties: +- compatible: should be "qcom,pm8916-wdt" + +Optional properties : +- interrupts : interrupt for pre-timeout (bark) +- timeout-sec : shall contain the default watchdog timeout in seconds, + if unset, the default timeout is 30 seconds + +Example: + + pm8916_0: pm8916@0 { + compatible = "qcom,pm8916", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + + pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800>; + + watchdog { + compatible = "qcom,pm8916-wdt"; + interrupts = <0x0 0x8 6 IRQ_TYPE_EDGE_RISING>; + timeout-sec = <10>; + }; + }; + };