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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT025.mail.protection.outlook.com (10.13.177.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4930.15 via Frontend Transport; Sun, 30 Jan 2022 18:41:47 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Sun, 30 Jan 2022 12:41:46 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 1/9] kernel/resource: Introduce request_mem_region_muxed() Date: Sun, 30 Jan 2022 12:41:22 -0600 Message-ID: <20220130184130.176646-2-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3e9956f3-be09-4f0b-5aff-08d9e4202c1c X-MS-TrafficTypeDiagnostic: CY4PR12MB1223:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8273; 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Add the request muxed memory region macro. MMIO memory accesses can be synchronized using request_mem_region() which is already available. This call will return failure if the resource is busy. The 'muxed' version of this macro will handle a busy resource by using a wait queue to retry until the resource is available. Reviewed-by: Andy Shevchenko Signed-off-by: Terry Bowman --- include/linux/ioport.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 8359c50f9988..ec5f71f7135b 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -262,6 +262,8 @@ resource_union(struct resource *r1, struct resource *r2, struct resource *r) #define request_muxed_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name), IORESOURCE_MUXED) #define __request_mem_region(start,n,name, excl) __request_region(&iomem_resource, (start), (n), (name), excl) #define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name), 0) +#define request_mem_region_muxed(start, n, name) \ + __request_region(&iomem_resource, (start), (n), (name), IORESOURCE_MUXED) #define request_mem_region_exclusive(start,n,name) \ __request_region(&iomem_resource, (start), (n), (name), IORESOURCE_EXCLUSIVE) #define rename_region(region, newname) do { (region)->name = (newname); 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Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 8c1b31ed0c42..3ff68967034e 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -77,6 +77,7 @@ /* SB800 constants */ #define SB800_PIIX4_SMB_IDX 0xcd6 +#define SB800_PIIX4_SMB_MAP_SIZE 2 #define KERNCZ_IMC_IDX 0x3e #define KERNCZ_IMC_DATA 0x3f @@ -290,7 +291,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, else smb_en = (aux) ? 0x28 : 0x2c; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, "sb800_piix4_smb")) { + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) { dev_err(&PIIX4_dev->dev, "SMB base address index region 0x%x already in use.\n", SB800_PIIX4_SMB_IDX); @@ -302,7 +304,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - release_region(SB800_PIIX4_SMB_IDX, 2); + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); if (!smb_en) { smb_en_status = smba_en_lo & 0x10; @@ -371,7 +373,8 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; } } else { - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, + SB800_PIIX4_SMB_MAP_SIZE, "sb800_piix4_smb")) { release_region(piix4_smba, SMBIOSIZE); return -EBUSY; @@ -384,7 +387,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, SB800_PIIX4_PORT_IDX; piix4_port_mask_sb800 = SB800_PIIX4_PORT_IDX_MASK; piix4_port_shift_sb800 = SB800_PIIX4_PORT_IDX_SHIFT; - release_region(SB800_PIIX4_SMB_IDX, 2); + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); } dev_info(&PIIX4_dev->dev, @@ -682,7 +685,8 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, u8 port; int retval; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, 2, "sb800_piix4_smb")) + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) return -EBUSY; /* Request the SMBUS semaphore, avoid conflicts with the IMC */ @@ -758,7 +762,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, piix4_imc_wakeup(); release: - release_region(SB800_PIIX4_SMB_IDX, 2); + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); return retval; } From patchwork Sun Jan 30 18:41:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 538642 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A789C433F5 for ; Sun, 30 Jan 2022 18:42:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354973AbiA3SmQ (ORCPT ); Sun, 30 Jan 2022 13:42:16 -0500 Received: from mail-bn1nam07on2058.outbound.protection.outlook.com ([40.107.212.58]:20734 "EHLO NAM02-BN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1355085AbiA3SmN (ORCPT ); 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Move is in preparation for following MMIO changes. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 39 +++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 3ff68967034e..5a98970ac60a 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -165,6 +165,24 @@ struct i2c_piix4_adapdata { u8 port; /* Port number, shifted */ }; +static int piix4_sb800_region_request(struct device *dev) +{ + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, + "sb800_piix4_smb")) { + dev_err(dev, + "SMBus base address index region 0x%x already in use.\n", + SB800_PIIX4_SMB_IDX); + return -EBUSY; + } + + return 0; +} + +static void piix4_sb800_region_release(struct device *dev) +{ + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); +} + static int piix4_setup(struct pci_dev *PIIX4_dev, const struct pci_device_id *id) { @@ -270,6 +288,7 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, unsigned short piix4_smba; u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel; u8 i2ccfg, i2ccfg_offset = 0x10; + int retval; /* SB800 and later SMBus does not support forcing address */ if (force || force_addr) { @@ -291,20 +310,16 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, else smb_en = (aux) ? 0x28 : 0x2c; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, - "sb800_piix4_smb")) { - dev_err(&PIIX4_dev->dev, - "SMB base address index region 0x%x already in use.\n", - SB800_PIIX4_SMB_IDX); - return -EBUSY; - } + retval = piix4_sb800_region_request(&PIIX4_dev->dev); + if (retval) + return retval; outb_p(smb_en, SB800_PIIX4_SMB_IDX); smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); + piix4_sb800_region_release(&PIIX4_dev->dev); if (!smb_en) { smb_en_status = smba_en_lo & 0x10; @@ -685,9 +700,9 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, u8 port; int retval; - if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, - "sb800_piix4_smb")) - return -EBUSY; + retval = piix4_sb800_region_request(&adap->dev); + if (retval) + return retval; /* Request the SMBUS semaphore, avoid conflicts with the IMC */ smbslvcnt = inb_p(SMBSLVCNT); @@ -762,7 +777,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, piix4_imc_wakeup(); release: - release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); + piix4_sb800_region_release(&adap->dev); return retval; } From patchwork Sun Jan 30 18:41:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 538440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 269DAC433F5 for ; Sun, 30 Jan 2022 18:43:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237823AbiA3SnB (ORCPT ); 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Sun, 30 Jan 2022 12:42:20 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 4/9] i2c: piix4: Move SMBus controller base address detect into function Date: Sun, 30 Jan 2022 12:41:25 -0600 Message-ID: <20220130184130.176646-5-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6e8c4655-5853-4f4c-8ee8-08d9e4203ff7 X-MS-TrafficTypeDiagnostic: CH2PR12MB3767:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2958; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: M+IljGm+JCa/RlfqeIuA7cjfPct6dwtNBDstl73y1z7UBS1kSWrHdtdpyn4IAEXipVRbJToxYJsjeBksM4ADL5F2ZFJT63o0jFX5iptFXeDeCFNKqWlglzEYSpVZzVjPYWQkyA5zHsRewn/1iy1m++nq9Kvea1xfygZ/vYEGAnuz71yK0ryxyK4Dso+J0+cOkUm/5O3fxgdnMg4BO1qWIfiU/4M0Nj17H/7OurzXJFhYVN68MoxE2scP4USpBoFAz11iUCiePZS4zLBSO6PVyuHRLf8Ew505eex9Rj2tjdgX6Kap5eZCs56VbgAHnozMFTBVHirfc1D6PsHcFDXpK4KUu9P85xuWtgOHvUGz5c6l6/KTIKPJXez3/OJfZkmCnBhdg/o4ue0p2Od2y3XjNPQM1VZNt+tszAOUsBnC/OtWnmqatYrr1O45vlL3a8nKa30zL/uiEAcb2JPOOOxvQxOf5Dtkr3zF+UOoYSYn/IPiphUooc2VcO/i3ru4gHcElJiyfELqEeJpuE5dMerPN3bV7pe02RYWGSqaxnr4RRR0IqBrdscbC13RHDPlntP6p2i3v4BrNjTN3bQQ4+iG0o27jXlgfWDtiNDUHL5IL3hdxz2E+xvGtsQvBEpbgaZVPqsqZ75SF1330GE+3TdUn9I82Fg1T+tkYF6h0K9Q7eEv5Jnk6iXYaKOcDwKXcOaLa+9kDvNU8iVDvwk/lnmQdzEXoJ7zTEFJMQxyvRPV9CM= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Refactor is in preparation for following MMIO changes. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 71 +++++++++++++++++++++------------- 1 file changed, 45 insertions(+), 26 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 5a98970ac60a..eab06e9e5fdf 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -282,12 +282,52 @@ static int piix4_setup(struct pci_dev *PIIX4_dev, return piix4_smba; } +static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, + u8 smb_en, + u8 aux, + u8 *smb_en_status, + unsigned short *piix4_smba) +{ + u8 smba_en_lo; + u8 smba_en_hi; + int retval; + + retval = piix4_sb800_region_request(&PIIX4_dev->dev); + if (retval) + return retval; + + outb_p(smb_en, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); + smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); + + piix4_sb800_region_release(&PIIX4_dev->dev); + + if (!smb_en) { + *smb_en_status = smba_en_lo & 0x10; + *piix4_smba = smba_en_hi << 8; + if (aux) + *piix4_smba |= 0x20; + } else { + *smb_en_status = smba_en_lo & 0x01; + *piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; + } + + if (!*smb_en_status) { + dev_err(&PIIX4_dev->dev, + "SMBus Host Controller not enabled!\n"); + return -ENODEV; + } + + return 0; +} + static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, const struct pci_device_id *id, u8 aux) { - unsigned short piix4_smba; - u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status, port_sel; + u8 smb_en, smb_en_status, port_sel; u8 i2ccfg, i2ccfg_offset = 0x10; + unsigned short piix4_smba; int retval; /* SB800 and later SMBus does not support forcing address */ @@ -310,33 +350,12 @@ static int piix4_setup_sb800(struct pci_dev *PIIX4_dev, else smb_en = (aux) ? 0x28 : 0x2c; - retval = piix4_sb800_region_request(&PIIX4_dev->dev); + retval = piix4_setup_sb800_smba(PIIX4_dev, smb_en, aux, &smb_en_status, + &piix4_smba); + if (retval) return retval; - outb_p(smb_en, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); - outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); - smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - - piix4_sb800_region_release(&PIIX4_dev->dev); - - if (!smb_en) { - smb_en_status = smba_en_lo & 0x10; - piix4_smba = smba_en_hi << 8; - if (aux) - piix4_smba |= 0x20; - } else { - smb_en_status = smba_en_lo & 0x01; - piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0; - } - - if (!smb_en_status) { - dev_err(&PIIX4_dev->dev, - "SMBus Host Controller not enabled!\n"); - return -ENODEV; - } - if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) return -ENODEV; From patchwork Sun Jan 30 18:41:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 538641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6B26C433FE for ; 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Sun, 30 Jan 2022 12:42:31 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 5/9] i2c: piix4: Move SMBus port selection into function Date: Sun, 30 Jan 2022 12:41:26 -0600 Message-ID: <20220130184130.176646-6-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6e30f360-c368-4dee-a47a-08d9e4204695 X-MS-TrafficTypeDiagnostic: MWHPR1201MB0141:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6108; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qM2PTj3I0xNB1n1hUUW88yfeOsDJUepkxIFLBgTD4HF/ODe68GoLcUbWB+seUARar2yIkO3iYY8CPUeWubl83LZr5m/Feb2yIiOOK20zTbRGnE2ffzVpE6x1JwgG7UIpCAgDLiNMIeXj30E9pAKyzz+Xk9KKLmnTsAUmFsmXxC2FV0veZxP9yShylXiA5Gsoje/QTgl8axnqbs7RXuM7ZM3sKU88Y8+1FfmeX2LQepzWsv9C2AOH5WR4BRaaKJCriZpEmmxcFSsSPfAW87NQR/MDPww2EYXQfKidheAx/6w/nSFn29nOTECzXec/BoUxL47aB2LVIze0/nfKyu8QCdoOiboHCsYPbCW3K+M2HSHgRVEq2QNbt/WRWPgzWYYctpUoZhr8iORxDjfEhTSPxG7tzz1/g44uYD5mbAFzm/iMnEwpJffvnRx7nZrlmNYriwSDTu4+Y33v6UNScU+wwxVwPVTc7jrp5uaFiqpqY9lxEycpBfh+bQfjMDkj97Aou++fg1RuYnrfT21A5w8ZG+iQ3zmYUMq9hi6H9M0+mPL06lJxM+2klbbOz6V2TeaYI8VJJqUCeSmH2/5LJlbXaqTzAB8zqZEAdsQwL44O5eHBEVWbB0iCMXx7G4yfzHPrLubStteSWZ8zR7DOx96XMbQkLWYrW0MCLB3Wka2K3k02+tAigEeGfcqu6JUgnwMyQBBro+7Vta4W6x+h+leH36oW3B7RMrpkODZHZMrpMOc= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Refactor is in preparation for following MMIO changes. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index eab06e9e5fdf..32a30af5778a 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -699,6 +699,19 @@ static void piix4_imc_wakeup(void) release_region(KERNCZ_IMC_IDX, 2); } +static int piix4_sb800_port_sel(u8 port) +{ + u8 smba_en_lo, val; + + outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + + val = (smba_en_lo & ~piix4_port_mask_sb800) | port; + if (smba_en_lo != val) + outb_p(val, SB800_PIIX4_SMB_IDX + 1); + + return (smba_en_lo & piix4_port_mask_sb800); +} /* * Handles access to multiple SMBus ports on the SB800. * The port is selected by bits 2:1 of the smb_en register (0x2c). @@ -715,8 +728,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, unsigned short piix4_smba = adapdata->smba; int retries = MAX_TIMEOUT; int smbslvcnt; - u8 smba_en_lo; - u8 port; + u8 prev_port; int retval; retval = piix4_sb800_region_request(&adap->dev); @@ -776,18 +788,12 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, } } - outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); - - port = adapdata->port; - if ((smba_en_lo & piix4_port_mask_sb800) != port) - outb_p((smba_en_lo & ~piix4_port_mask_sb800) | port, - SB800_PIIX4_SMB_IDX + 1); + prev_port = piix4_sb800_port_sel(adapdata->port); retval = piix4_access(adap, addr, flags, read_write, command, size, data); - outb_p(smba_en_lo, SB800_PIIX4_SMB_IDX + 1); + piix4_sb800_port_sel(prev_port); /* Release the semaphore */ outb_p(smbslvcnt | 0x20, SMBSLVCNT); From patchwork Sun Jan 30 18:41:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 538439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 013F1C433EF for ; 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Sun, 30 Jan 2022 12:42:42 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 6/9] i2c: piix4: Add EFCH MMIO support to region request and release Date: Sun, 30 Jan 2022 12:41:27 -0600 Message-ID: <20220130184130.176646-7-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 58f16609-7511-432a-1258-08d9e4204d2f X-MS-TrafficTypeDiagnostic: CY4PR1201MB0023:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: cfUbbL0qD3MzCu9Efz2t1yj6PQ/5SCg1tI/nk3CMiy5BO2lsOpGwWQ40QwaOfHfaKM0OWysOUkHUqQyQuIzCko26dY+FsAbbgf8HkV8csBYxVvuXxr5ngVgLBMDIxO467HxPZoQAqPi+l4VSZar6LTP1bjGcHoPbpLq05KxorjSlN7lpOVlaEthAXjpPkAdM2xFtD1V35D0+oh6qnSoraOCT+8GBfWQBzeaXDIqShbVWoQRt0wD1OzyOJDZ5fjfU0VsABXOMN7kGmw9g8TLSOeC2SN68/addUYpNnWnXZUT8XtvhkM01PJ4xtOoH1+tMjkfPnFsUbCNjZkt8sLM1NtuxH7wE3kwDltKHafXM9YRtC8YCGpQYTZ5z8RpNTzXVqmyXx5nlK9rxYuPJxEx7JJb7yKMXjJxKq+1dBBOZnrHGLR5Y1plylUkOdvIpv9hnNtT6fBav40AYjtFuaGsoTUhw12Qda45BNLkyZBk5JESqeBUB38te//i9K9r1RtQxesGRmub02qokbfFqu2gifz8/UPHmzZ3RrY0LcqEw7jqlzWA+nVYtKbMl90rUNyddzhfz6IeHoLHmUuhib5tpst/pECSgMSMqwLxxkw4kJ1XqTEsezRRTPQEb2tSh80o5vDGRfo66P0hkwmTIsLUC4fn3SJ0vHw7vihZroDdngY+8jLOQQYT/61u3h+vtN6INb9LVaxsI6T3SOqVgK0voWSsdZ3sMiUYnjFYH2JTvS5Y= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(186003)(26005)(336012)(426003)(47076005)(2616005)(4326008)(16526019)(1076003)(44832011)(5660300002)(86362001)(2906002)(70586007)(70206006)(7696005)(6666004)(8936002)(8676002)(83380400001)(508600001)(82310400004)(356005)(40460700003)(81166007)(36860700001)(316002)(54906003)(110136005)(36756003)(36900700001)(2101003)(20210929001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2022 18:42:43.3871 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 58f16609-7511-432a-1258-08d9e4204d2f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB0023 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org EFCH cd6h/cd7h port I/O may no longer be available on later AMD processors and it is recommended to use MMIO instead. Update the request and release functions to support MMIO. MMIO request/release and mmapping require details during cleanup. Add a MMIO configuration structure containing resource and vaddress details for mapping the region, accessing the region, and releasing the region. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 61 ++++++++++++++++++++++++++++++---- 1 file changed, 55 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 32a30af5778a..7defa0c5f1f9 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -98,6 +98,9 @@ #define SB800_PIIX4_PORT_IDX_MASK_KERNCZ 0x18 #define SB800_PIIX4_PORT_IDX_SHIFT_KERNCZ 3 +#define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 +#define SB800_PIIX4_FCH_PM_SIZE 8 + /* insmod parameters */ /* If force is set to anything different from 0, we forcibly enable the @@ -156,6 +159,12 @@ static const char *piix4_main_port_names_sb800[PIIX4_MAX_ADAPTERS] = { }; static const char *piix4_aux_port_name_sb800 = " port 1"; +struct sb800_mmio_cfg { + void __iomem *addr; + struct resource *res; + bool use_mmio; +}; + struct i2c_piix4_adapdata { unsigned short smba; @@ -163,10 +172,40 @@ struct i2c_piix4_adapdata { bool sb800_main; bool notify_imc; u8 port; /* Port number, shifted */ + struct sb800_mmio_cfg mmio_cfg; }; -static int piix4_sb800_region_request(struct device *dev) +static int piix4_sb800_region_request(struct device *dev, + struct sb800_mmio_cfg *mmio_cfg) { + if (mmio_cfg->use_mmio) { + struct resource *res; + void __iomem *addr; + + res = request_mem_region_muxed(SB800_PIIX4_FCH_PM_ADDR, + SB800_PIIX4_FCH_PM_SIZE, + "sb800_piix4_smb"); + if (!res) { + dev_err(dev, + "SMBus base address memory region 0x%x already in use.\n", + SB800_PIIX4_FCH_PM_ADDR); + return -EBUSY; + } + + addr = ioremap(SB800_PIIX4_FCH_PM_ADDR, + SB800_PIIX4_FCH_PM_SIZE); + if (!addr) { + release_resource(res); + dev_err(dev, "SMBus base address mapping failed.\n"); + return -ENOMEM; + } + + mmio_cfg->res = res; + mmio_cfg->addr = addr; + + return 0; + } + if (!request_muxed_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE, "sb800_piix4_smb")) { dev_err(dev, @@ -178,8 +217,15 @@ static int piix4_sb800_region_request(struct device *dev) return 0; } -static void piix4_sb800_region_release(struct device *dev) +static void piix4_sb800_region_release(struct device *dev, + struct sb800_mmio_cfg *mmio_cfg) { + if (mmio_cfg->use_mmio) { + iounmap(mmio_cfg->addr); + release_resource(mmio_cfg->res); + return; + } + release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); } @@ -288,11 +334,13 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, u8 *smb_en_status, unsigned short *piix4_smba) { + struct sb800_mmio_cfg mmio_cfg; u8 smba_en_lo; u8 smba_en_hi; int retval; - retval = piix4_sb800_region_request(&PIIX4_dev->dev); + mmio_cfg.use_mmio = 0; + retval = piix4_sb800_region_request(&PIIX4_dev->dev, &mmio_cfg); if (retval) return retval; @@ -301,7 +349,7 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); - piix4_sb800_region_release(&PIIX4_dev->dev); + piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg); if (!smb_en) { *smb_en_status = smba_en_lo & 0x10; @@ -731,7 +779,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, u8 prev_port; int retval; - retval = piix4_sb800_region_request(&adap->dev); + retval = piix4_sb800_region_request(&adap->dev, &adapdata->mmio_cfg); if (retval) return retval; @@ -802,7 +850,7 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, piix4_imc_wakeup(); release: - piix4_sb800_region_release(&adap->dev); + piix4_sb800_region_release(&adap->dev, &adapdata->mmio_cfg); return retval; } @@ -880,6 +928,7 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, return -ENOMEM; } + adapdata->mmio_cfg.use_mmio = 0; adapdata->smba = smba; adapdata->sb800_main = sb800_main; adapdata->port = port << piix4_port_shift_sb800; From patchwork Sun Jan 30 18:41:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 538640 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D2D6C43217 for ; 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Sun, 30 Jan 2022 12:42:53 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 7/9] i2c: piix4: Add EFCH MMIO support to SMBus base address detect Date: Sun, 30 Jan 2022 12:41:28 -0600 Message-ID: <20220130184130.176646-8-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a7e9af14-0e7f-4f69-b644-08d9e42053cd X-MS-TrafficTypeDiagnostic: MW4PR12MB5667:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2803; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: o1e3nyxlGQOxP74WteAGzRE37cId+rU58PtGhxWuWkVQisPQ+pblupwoVfCHFKZPhSIo4Ur6wr8g3XsCUQ/ac7up0nfS5WKxNp1/R69HJZP5m+5FgBMayYKHZo+ucNjZcmvzf5+ogA++cl58/gIrV/X3BkCGlrYQ/fhXVAnMtRiEwIR+9E5SHYGiWuhT+OYhM8vrbaSvAGjKhSsZWjwziezg09UBmEHYqfiC0LGzbFCMXgVxtWNAo0TU3sR6LvzpzPpaXXGA2B3/IIsUC4ES78f9T1dVbkUVp8uLsv/NDS/IVZYWyf945rAtWp4UICY/oSKzUxeeLFp3UyL+TuBfoH0Oj60iqkdvsI3mBsi5+jTzFh9Z/CJCUETT8xooa/mqpWO5IuFK+4VzgVH80gOibixEFsfT4I0K6ERcgeqjq/sfD4Fp4eVjgghoh1MPPzqSLI9FxrteZeC7VIqbPL4yWSG1yowA5GOvuc2ZlMhcJ9nSUGGEjB5yKi74+swmgOkFy6snBOE+uktif7Uq9xX9JBJ4Fwksjv48ltn1lu/S8RBguA6Fr9e5pxlsI4WGsy9cku7EiMPeLT5ODOXOrtNvkQQ/ONXd2OCS+7x2PNmj9LTgwZliyB8GwCerMqkNtgaMhx4BqtGNrHVfeh7icYHgPPwzsRUlyrItbCZhCqgOk+BixmpDK9U0ssViAsMqTfGCpFk1VEqSDsvIkUV5EVpDASJ8dKBpVgFEPCDcfiqUvkqEDJvg79XAVl7H1f7lyeWEwFKZxoy610Ca4avXinuJXjNr9a0N/uDlAIUr6ruxkUeUJ/BQzhSgEPdNWJuuWrAH X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(4636009)(40470700004)(36840700001)(46966006)(7696005)(1076003)(40460700003)(316002)(508600001)(81166007)(44832011)(70586007)(2616005)(47076005)(83380400001)(36860700001)(5660300002)(2906002)(356005)(16526019)(186003)(26005)(110136005)(36756003)(6666004)(336012)(82310400004)(86362001)(4326008)(54906003)(8936002)(70206006)(426003)(8676002)(2101003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2022 18:42:54.4931 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a7e9af14-0e7f-4f69-b644-08d9e42053cd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT018.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB5667 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org The EFCH SMBus controller's base address is determined using details in FCH::PM::DECODEEN[smbusasfiobase] and FCH::PM::DECODEEN[smbusasfioen].These register fields were accessed using cd6h/cd7h port I/O. cd6h/cd7h port I/O is no longer available in later AMD processors. Change base address detection to use MMIO instead of port I/O cd6h/cd7h. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 7defa0c5f1f9..a23c0327e1f6 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -344,10 +344,15 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, if (retval) return retval; - outb_p(smb_en, SB800_PIIX4_SMB_IDX); - smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); - outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); - smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); + if (mmio_cfg.use_mmio) { + smba_en_lo = ioread8(mmio_cfg.addr); + smba_en_hi = ioread8(mmio_cfg.addr + 1); + } else { + outb_p(smb_en, SB800_PIIX4_SMB_IDX); + smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); + outb_p(smb_en + 1, SB800_PIIX4_SMB_IDX); + smba_en_hi = inb_p(SB800_PIIX4_SMB_IDX + 1); + } piix4_sb800_region_release(&PIIX4_dev->dev, &mmio_cfg); From patchwork Sun Jan 30 18:41:29 2022 Content-Type: text/plain; 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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by BN8NAM11FT022.mail.protection.outlook.com (10.13.176.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4930.15 via Frontend Transport; Sun, 30 Jan 2022 18:43:05 +0000 Received: from ethanolx7ea3host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Sun, 30 Jan 2022 12:43:04 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 8/9] i2c: piix4: Add EFCH MMIO support for SMBus port select Date: Sun, 30 Jan 2022 12:41:29 -0600 Message-ID: <20220130184130.176646-9-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 67047805-a989-4e59-8876-08d9e4205a65 X-MS-TrafficTypeDiagnostic: BN6PR1201MB2547:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3513; 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Port selection is made during each user access by writing to FCH::PM::DECODEEN[smbus0sel]. Change the driver to use MMIO during SMBus port selection because cd6h/cd7h port I/O is not available on later AMD processors. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index a23c0327e1f6..c5325cadaf55 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -752,10 +752,19 @@ static void piix4_imc_wakeup(void) release_region(KERNCZ_IMC_IDX, 2); } -static int piix4_sb800_port_sel(u8 port) +static int piix4_sb800_port_sel(u8 port, struct sb800_mmio_cfg *mmio_cfg) { u8 smba_en_lo, val; + if (mmio_cfg->use_mmio) { + smba_en_lo = ioread8(mmio_cfg->addr + piix4_port_sel_sb800); + val = (smba_en_lo & ~piix4_port_mask_sb800) | port; + if (smba_en_lo != val) + iowrite8(val, mmio_cfg->addr + piix4_port_sel_sb800); + + return (smba_en_lo & piix4_port_mask_sb800); + } + outb_p(piix4_port_sel_sb800, SB800_PIIX4_SMB_IDX); smba_en_lo = inb_p(SB800_PIIX4_SMB_IDX + 1); @@ -765,6 +774,7 @@ static int piix4_sb800_port_sel(u8 port) return (smba_en_lo & piix4_port_mask_sb800); } + /* * Handles access to multiple SMBus ports on the SB800. * The port is selected by bits 2:1 of the smb_en register (0x2c). @@ -841,12 +851,12 @@ static s32 piix4_access_sb800(struct i2c_adapter *adap, u16 addr, } } - prev_port = piix4_sb800_port_sel(adapdata->port); + prev_port = piix4_sb800_port_sel(adapdata->port, &adapdata->mmio_cfg); retval = piix4_access(adap, addr, flags, read_write, command, size, data); - piix4_sb800_port_sel(prev_port); + piix4_sb800_port_sel(prev_port, &adapdata->mmio_cfg); /* Release the semaphore */ outb_p(smbslvcnt | 0x20, SMBSLVCNT); From patchwork Sun Jan 30 18:41:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Terry Bowman X-Patchwork-Id: 538639 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65684C433F5 for ; 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Sun, 30 Jan 2022 12:43:15 -0600 From: Terry Bowman To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v4 9/9] i2c: piix4: Enable EFCH MMIO for Family 17h+ Date: Sun, 30 Jan 2022 12:41:30 -0600 Message-ID: <20220130184130.176646-10-terry.bowman@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220130184130.176646-1-terry.bowman@amd.com> References: <20220130184130.176646-1-terry.bowman@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 744a8fb3-da0e-43c1-1f30-08d9e42060fc X-MS-TrafficTypeDiagnostic: MWHPR1201MB0064:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5797; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Bo9z4QJImKDfacAik2Q8rMWygGesSq+pXrTUdFjNRJV3U1g/GCG2apYk/7KVFKfH2fvrSAjiNU1jKitO/FYB2YflLYBUJ4IpnFU41wI9JRhZZcKpDeGUOyUAa/kv0e/WudqFXrLHI4LQG9p+LQWgIRJQqKaqlUGxogoOiABTTSLldcl+f8spNFCs+mnkbmXXpE4RYyyzXLFkVGCq6wX9EL4OAsZGJDkQEtcm6Kwce6aAhV4aGJCjhaBxSRk3CKCj96Ppk0Gvlhqt+u8XWxrSpiVnavKQs5wAu6TRQXxRvI4jtJ5bMITEUIgpxjLJ/5i+4FhCwlMbDuMjtWHqFCw+CAl11eQ7WcpsPGrqCmxDEcKg3abLq0Peygty8Sdzn9eOsP7SiSkEFjF8qYjhME8Rcp8eqTGEktbv/IApt8BSlRFpP1v4z34JYAO9jsfnKc+74DvGFaiL1vPl6GiX8M7vsTJMXpT8WeOLs/9zy7SyFYF2rNkyo5o+Xi9vNniPdTCiuziMt0YSqujh3sGs/75Vq0N04MR9bJyrhepk+qfnPKcy2K9DidrytyrWqn2szcIuCDBArdYIe1SoGI2MoJsnovPmKDbh1VNn8FZ7R1IVJP/33g7sIbImNgUTpZ8Owu/KzLsKiPRdsHP0p+wBFgPZBChUcB8dvyUThqLvZs0CCcXZc65NkMHCDDkqSo7x6BWQuRnw7FEwLznlq4RzJlAMTgEBh5V05pKo33lpf2bN+I8= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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SMBus PCI revision ID 0x51 is first used by family 17h. This PCI revision ID check will also enable future AMD processors with the same EFCH SMBus controller HW. Signed-off-by: Terry Bowman --- drivers/i2c/busses/i2c-piix4.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index c5325cadaf55..6a9495d994bc 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c @@ -101,6 +101,8 @@ #define SB800_PIIX4_FCH_PM_ADDR 0xFED80300 #define SB800_PIIX4_FCH_PM_SIZE 8 +#define AMD_PCI_SMBUS_REVISION_MMIO 0x51 + /* insmod parameters */ /* If force is set to anything different from 0, we forcibly enable the @@ -229,6 +231,13 @@ static void piix4_sb800_region_release(struct device *dev, release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE); } +static bool piix4_sb800_use_mmio(struct pci_dev *PIIX4_dev) +{ + return (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD && + PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS && + PIIX4_dev->revision >= AMD_PCI_SMBUS_REVISION_MMIO); +} + static int piix4_setup(struct pci_dev *PIIX4_dev, const struct pci_device_id *id) { @@ -339,7 +348,7 @@ static int piix4_setup_sb800_smba(struct pci_dev *PIIX4_dev, u8 smba_en_hi; int retval; - mmio_cfg.use_mmio = 0; + mmio_cfg.use_mmio = piix4_sb800_use_mmio(PIIX4_dev); retval = piix4_sb800_region_request(&PIIX4_dev->dev, &mmio_cfg); if (retval) return retval; @@ -943,7 +952,7 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba, return -ENOMEM; } - adapdata->mmio_cfg.use_mmio = 0; + adapdata->mmio_cfg.use_mmio = piix4_sb800_use_mmio(dev); adapdata->smba = smba; adapdata->sb800_main = sb800_main; adapdata->port = port << piix4_port_shift_sb800;