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[91.69.153.33]) by smtp.gmail.com with ESMTPSA id x79sm16469106wmd.42.2018.11.23.04.14.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 04:14:44 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Nov 2018 13:14:27 +0100 Message-Id: <20181123121431.22353-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181123121431.22353-1-ard.biesheuvel@linaro.org> References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 1/5] ArmPkg/ArmLib: add support for reading the max physical address space size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek , Eric Auger MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add a helper function that returns the maximum physical address space size as supported by the current CPU. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Include/Library/ArmLib.h | 6 ++++++ ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 16 ++++++++++++++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 8 ++++++++ 3 files changed, 30 insertions(+) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Philippe Mathieu-Daudé diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index ffda50e9d767..9a804c15fdb6 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -733,4 +733,10 @@ ArmWriteCntvOff ( UINT64 Val ); +UINTN +EFIAPI +ArmGetPhysicalAddressBits ( + VOID + ); + #endif // __ARM_LIB__ diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S index 1ef2f61f5979..75ab8dade485 100644 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S @@ -196,4 +196,20 @@ ASM_FUNC(ArmWriteSctlr) 3:msr sctlr_el3, x0 4:ret +ASM_FUNC(ArmGetPhysicalAddressBits) + mrs x0, id_aa64mmfr0_el1 + adr x1, .LPARanges + and x0, x0, #7 + ldrb w0, [x1, x0] + ret + +// +// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the +// physical address space support on this CPU: +// 0 == 32 bits, 1 == 36 bits, etc etc +// 6 and 7 are reserved +// +.LPARanges: + .byte 32, 36, 40, 42, 44, 48, -1, -1 + ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S index f2a517671f0a..f2f3c9a25991 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S @@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr) isb bx lr +ASM_FUNC (ArmGetPhysicalAddressBits) + mrc p15, 0, r0, c0, c1, 4 // MMFR0 + and r0, r0, #0xf // VMSA [3:0] + cmp r0, #5 // >5 implies LPAE support + movlt r0, #32 // 32 bits if no LPAE + movge r0, #40 // 40 bits if LPAE + bx lr + ASM_FUNCTION_REMOVE_IF_UNREFERENCED From patchwork Fri Nov 23 12:14:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 151855 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp2050790eds; Fri, 23 Nov 2018 04:14:51 -0800 (PST) X-Google-Smtp-Source: AFSGD/U852AAbg7x/NFw97ABE18Q92PYn2mmVJpsgoinmjvOO6E/tPN7uD7YlLyDb1fYqt/KD4jH X-Received: by 2002:a17:902:930b:: with SMTP id bc11mr15767404plb.17.1542975291284; Fri, 23 Nov 2018 04:14:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542975291; cv=none; d=google.com; s=arc-20160816; b=t5MqQskf65oNBG1xHPGBZ8OtdYnGdbUkwAGXcTr5+/SQKxt4ycrltjq7MkkxFjmvo9 Cz09tdmoTvtWjxzJaSEEkyO53CUzET3Kkot1vU6oxUEO5ggJRd/+6VR7iitqctzEl3dp iqt9cwHHyRuW7gpXFssD7bg0Esp1g5Y8ZMopHBqg0Arqb0e5NgCN/ixV0NP7t+eh0rnh R4froGhA+bxSTcBooXqHJ+Qw8sTG8BNekWHUEZwtq8e2fADOzNgNWF5ahwWJD3bTyzse VEVh8OxPFbw2J7jlUTfNG6ZTGLoAlfYgMUSAnebp37uSRc6Xe5i8rvvLJJQCLrRkKw87 sbig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=+xs4l2RFceUJp7+7ktkWQSuL9O+f1DpVEwoBymZdL5s=; b=V9p/QbTvuzA8XMlTb2bZrRpZUTYhOrkSNY1AS4d4naqMDZ5ZuZmEYoTh9ynQ3ie6K9 9CGZV7eGDGBeiLOZIV2vVdusKj+CtgpHsaD9y8iDTUqNShmvvZrta0UZaFm+TWweJe5b 3q96sBQTGoiReFnuLhI80zDAFIaOTSZStWRdMJT78MuIvHcVE+/YoEL0DolU8FrUHNfo RBZvGfriJFTQqaGcmNMwjfiHUtTZiBgFYYV+fI5QgErQj8U0gz2b9P3+6GNTABaN5ov4 LFok4k4iuyPCNwkuhkPMsSbd5PMQOFneV7+vSsN02+wPxBoqI/zsTTCL5GHZcAbr+30m YOCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZtCgVz92; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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[91.69.153.33]) by smtp.gmail.com with ESMTPSA id x79sm16469106wmd.42.2018.11.23.04.14.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 04:14:45 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Nov 2018 13:14:28 +0100 Message-Id: <20181123121431.22353-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181123121431.22353-1-ard.biesheuvel@linaro.org> References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 2/5] ArmPkg/ArmMmuLib: take the CPU supported maximum PA space into account X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek , Eric Auger MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In preparation of permitting the virt code to define a larger PA space size via gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize than what the CPU actually supports, take the CPU's capabilities into account when setting up the page tables. This is necessary because KVM will shortly support variable PA space sizes, and to support running the same UEFI binaries regardless of that limit, PcdPrePiCpuMemorySize needs to be treated as an upper bound rather than a fixed size. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index 4b62ecb6a476..a4fde9b59383 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -593,6 +593,7 @@ ArmConfigureMmu ( { VOID* TranslationTable; UINT32 TranslationTableAttribute; + UINTN MaxAddressBits; UINT64 MaxAddress; UINTN T0SZ; UINTN RootTableEntryCount; @@ -605,7 +606,9 @@ ArmConfigureMmu ( } // Cover the entire GCD memory space - MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1; + MaxAddressBits = MIN (ArmGetPhysicalAddressBits (), + PcdGet8 (PcdPrePiCpuMemorySize)); + MaxAddress = (1UL << MaxAddressBits) - 1; // Lookup the Table Level to get the information LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount); From patchwork Fri Nov 23 12:14:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 151856 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp2050880eds; Fri, 23 Nov 2018 04:14:55 -0800 (PST) X-Google-Smtp-Source: AFSGD/U8y55STq/XiYDwiPHauEs0TnOBk/44v3AO6cRPGAl9Y8gkAMaDLuPKYXt183VHmLSZQND1 X-Received: by 2002:a17:902:b7cc:: with SMTP id v12mr15540220plz.8.1542975294897; Fri, 23 Nov 2018 04:14:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542975294; cv=none; d=google.com; s=arc-20160816; b=w64YwML1jWoagwg+ougJ3WfMHQn9JeD3D9SkYqoDj9t0UEvGsJuKuTcyWC/n0tXBmd 0lB1UjsSwLOKpErAgj5f3vcDFORCS+CqUmXn6F69G98wOVkj0hdulLflARYQLR2JN59h f3uFvpdJnVBeupfFezDictYD7PGyNWeY7z+r71i3gGY8kEVZGcYxeFPSYsgMmeC4NCqD YG9PpA2i3MNTFwfFzU0wWcobdcG2MqjvGhUUa9qfhs5WEPTGJWrYBq6AbxbzgZbRicV5 n5jD1K9AZBRQifYEoOtx2weEuU/neMB0QOBuBvdu3yPSlbJKzy8ytY5TbBrkX2vg7mj0 HTQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=WXEgevkvT3ky4/j+9jkFe6LDtOl+gZvuYP9+tSxMXlA=; b=0J0sopIQ+z1Ei1EsbqiJmJy4EhWZDsHnlIJM8w0HlapBaJyV9ePTdQHZN02cz3vx6K oibvwWBcZBSpCxS0IBVZS3a+X/AZxoYZfOfmxj+LGTX2xa48yB139vLvJEcqiyuXfxci kvPdnsurFo5ieAVIP78EyzrX+dMIMFxF3X618ZiepiK0f+QVpQiw/+ZILqPvqd3w/qDO no67PF+Y/2apj2BSrKQCRVEC5/gN6JM214pm409gDIa29TrKFQ2/mRKhUxTKqYB4NEzF QL5TtoaIH9necak2r/oZEQ6pnia6CeZnrQslxxWMS0crP5jjLlSCOGKIIoEUEFetir+Z 34Xw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=aSd1r0G8; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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[91.69.153.33]) by smtp.gmail.com with ESMTPSA id x79sm16469106wmd.42.2018.11.23.04.14.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 04:14:47 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Nov 2018 13:14:29 +0100 Message-Id: <20181123121431.22353-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181123121431.22353-1-ard.biesheuvel@linaro.org> References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 3/5] ArmVirtPkg: refactor reading of the physical address space size X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek , Eric Auger MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In preparation of dropping the hardcoded 40-bit limit on the physical address space when running under virtualization, let's refactor the code a bit so we read the hardware limit in a single place. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h | 1 + ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c | 4 +- ArmVirtPkg/Library/QemuVirtMemInfoLib/AArch64/PhysAddrTop.S | 39 -------------------- ArmVirtPkg/Library/QemuVirtMemInfoLib/Arm/PhysAddrTop.S | 24 ------------ ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 3 +- ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf | 6 --- ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf | 6 --- ArmVirtPkg/Library/XenVirtMemInfoLib/AArch64/PhysAddrTop.S | 39 -------------------- ArmVirtPkg/Library/XenVirtMemInfoLib/Arm/PhysAddrTop.S | 24 ------------ ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c | 8 +--- ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.inf | 6 --- 11 files changed, 8 insertions(+), 152 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Laszlo Ersek diff --git a/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h b/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h index bdf1c513bc6d..15562b35c730 100644 --- a/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h +++ b/ArmVirtPkg/Include/Library/ArmVirtMemInfoLib.h @@ -35,6 +35,7 @@ VOID EFIAPI ArmVirtGetMemoryMap ( + IN EFI_PHYSICAL_ADDRESS TopOfAddressSpace, OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap ); diff --git a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c index 05afd1282422..3f0e9b3a0579 100644 --- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c +++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c @@ -15,6 +15,7 @@ #include +#include #include #include #include @@ -39,7 +40,8 @@ InitMmu ( RETURN_STATUS Status; // Get Virtual Memory Map from the Platform Library - ArmVirtGetMemoryMap (&MemoryTable); + ArmVirtGetMemoryMap (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()), + &MemoryTable); //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in // DRAM (even at the top of DRAM as it is the first permanent memory allocation) diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/AArch64/PhysAddrTop.S b/ArmVirtPkg/Library/QemuVirtMemInfoLib/AArch64/PhysAddrTop.S deleted file mode 100644 index a1f6a194d59b..000000000000 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/AArch64/PhysAddrTop.S +++ /dev/null @@ -1,39 +0,0 @@ -# -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# Copyright (c) 2016-2017, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include - -//EFI_PHYSICAL_ADDRESS -//GetPhysAddrTop ( -// VOID -// ); -ASM_FUNC(ArmGetPhysAddrTop) - mrs x0, id_aa64mmfr0_el1 - adr x1, .LPARanges - and x0, x0, #7 - ldrb w1, [x1, x0] - mov x0, #1 - lsl x0, x0, x1 - ret - -// -// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the -// physical address space support on this CPU: -// 0 == 32 bits, 1 == 36 bits, etc etc -// 6 and 7 are reserved -// -.LPARanges: - .byte 32, 36, 40, 42, 44, 48, -1, -1 - -ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/Arm/PhysAddrTop.S b/ArmVirtPkg/Library/QemuVirtMemInfoLib/Arm/PhysAddrTop.S deleted file mode 100644 index 9cd81529fb3d..000000000000 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/Arm/PhysAddrTop.S +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# Copyright (c) 2014-2017, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include - -//EFI_PHYSICAL_ADDRESS -//GetPhysAddrTop ( -// VOID -// ); -ASM_FUNC(ArmGetPhysAddrTop) - mov r0, #0x00000000 - mov r1, #0x10000 - bx lr diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c index 760bcc169cf4..4eca9b895354 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c @@ -41,6 +41,7 @@ ArmGetPhysAddrTop ( **/ VOID ArmVirtGetMemoryMap ( + IN EFI_PHYSICAL_ADDRESS TopOfAddressSpace, OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap ) { @@ -80,7 +81,7 @@ ArmVirtGetMemoryMap ( // Peripheral space after DRAM TopOfMemory = MIN (1ULL << FixedPcdGet8 (PcdPrePiCpuMemorySize), - ArmGetPhysAddrTop ()); + TopOfAddressSpace); VirtualMemoryTable[2].PhysicalBase = VirtualMemoryTable[0].Length + VirtualMemoryTable[1].Length; VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase; VirtualMemoryTable[2].Length = TopOfMemory - diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf index c72a97f9e78a..f2c461e3b55a 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf @@ -24,12 +24,6 @@ [Sources] QemuVirtMemInfoLib.c -[Sources.ARM] - Arm/PhysAddrTop.S - -[Sources.AARCH64] - AArch64/PhysAddrTop.S - [Packages] ArmPkg/ArmPkg.dec ArmVirtPkg/ArmVirtPkg.dec diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf index e4032d3efb53..f54fb51ee1d4 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf @@ -26,12 +26,6 @@ QemuVirtMemInfoLib.c QemuVirtMemInfoPeiLibConstructor.c -[Sources.ARM] - Arm/PhysAddrTop.S - -[Sources.AARCH64] - AArch64/PhysAddrTop.S - [Packages] ArmPkg/ArmPkg.dec ArmVirtPkg/ArmVirtPkg.dec diff --git a/ArmVirtPkg/Library/XenVirtMemInfoLib/AArch64/PhysAddrTop.S b/ArmVirtPkg/Library/XenVirtMemInfoLib/AArch64/PhysAddrTop.S deleted file mode 100644 index a1f6a194d59b..000000000000 --- a/ArmVirtPkg/Library/XenVirtMemInfoLib/AArch64/PhysAddrTop.S +++ /dev/null @@ -1,39 +0,0 @@ -# -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# Copyright (c) 2016-2017, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include - -//EFI_PHYSICAL_ADDRESS -//GetPhysAddrTop ( -// VOID -// ); -ASM_FUNC(ArmGetPhysAddrTop) - mrs x0, id_aa64mmfr0_el1 - adr x1, .LPARanges - and x0, x0, #7 - ldrb w1, [x1, x0] - mov x0, #1 - lsl x0, x0, x1 - ret - -// -// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the -// physical address space support on this CPU: -// 0 == 32 bits, 1 == 36 bits, etc etc -// 6 and 7 are reserved -// -.LPARanges: - .byte 32, 36, 40, 42, 44, 48, -1, -1 - -ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmVirtPkg/Library/XenVirtMemInfoLib/Arm/PhysAddrTop.S b/ArmVirtPkg/Library/XenVirtMemInfoLib/Arm/PhysAddrTop.S deleted file mode 100644 index 9cd81529fb3d..000000000000 --- a/ArmVirtPkg/Library/XenVirtMemInfoLib/Arm/PhysAddrTop.S +++ /dev/null @@ -1,24 +0,0 @@ -# -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# Copyright (c) 2014-2017, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include - -//EFI_PHYSICAL_ADDRESS -//GetPhysAddrTop ( -// VOID -// ); -ASM_FUNC(ArmGetPhysAddrTop) - mov r0, #0x00000000 - mov r1, #0x10000 - bx lr diff --git a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c index 88ff3167cbfd..3d4e3e38c3f1 100644 --- a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c +++ b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.c @@ -18,11 +18,6 @@ STATIC ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[2]; -EFI_PHYSICAL_ADDRESS -ArmGetPhysAddrTop ( - VOID - ); - /** Return the Virtual Memory Map of your platform @@ -39,6 +34,7 @@ ArmGetPhysAddrTop ( VOID EFIAPI ArmVirtGetMemoryMap ( + IN EFI_PHYSICAL_ADDRESS TopOfAddressSpace, OUT ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap ) { @@ -51,7 +47,7 @@ ArmVirtGetMemoryMap ( // mVirtualMemoryTable[0].PhysicalBase = 0x0; mVirtualMemoryTable[0].VirtualBase = 0x0; - mVirtualMemoryTable[0].Length = ArmGetPhysAddrTop (); + mVirtualMemoryTable[0].Length = TopOfAddressSpace; mVirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; mVirtualMemoryTable[1].PhysicalBase = 0x0; diff --git a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.inf b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.inf index cd4c805a4db9..ae107810e927 100644 --- a/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.inf +++ b/ArmVirtPkg/Library/XenVirtMemInfoLib/XenVirtMemInfoLib.inf @@ -24,12 +24,6 @@ [Sources] XenVirtMemInfoLib.c -[Sources.ARM] - Arm/PhysAddrTop.S - -[Sources.AARCH64] - AArch64/PhysAddrTop.S - [Packages] ArmPkg/ArmPkg.dec ArmVirtPkg/ArmVirtPkg.dec From patchwork Fri Nov 23 12:14:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 151857 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp2050999eds; Fri, 23 Nov 2018 04:15:00 -0800 (PST) X-Google-Smtp-Source: AFSGD/U4Euh0B7ehNcP6j38gTAH4qLtvvdtbHbQ9fp5R/l9atAC/aw6bpM9SMJmOCZ3oXZM5zAP8 X-Received: by 2002:a63:24c2:: with SMTP id k185mr13474621pgk.406.1542975300503; Fri, 23 Nov 2018 04:15:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542975300; cv=none; d=google.com; s=arc-20160816; b=mMT5TTu7AJQmygCENl+Ws8PpYWkzrC+p7RzB/i7jat70wKHzEu6QdRZ3VbEY/sFRAQ F4L5aHJsABJkyBtUBqw7TPJYSLQ5fQRq3s0zSg96Usae8Jb+lZlHNTITfTzwgimMvadx YhXTTo6Ql4hYT8EdpgpRb3KQovuzoj/wDWNJExJ5dzasH8VNuR6ef+oBBxMhHys9gP2H 63wFq1sir5EwMlZNu1xHs40DHbchjdlkg6K7j5cHnc5P4j779JLquYy6scFIO/O7G4fg oRyp64WtLknhh4DBdbsbqoqBv5MjIqB0/jsIIPzd4foe3NQrnVym1pXwn7fW8eYYqowS +4XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to; bh=Ecse3g7/Vjdt+P9VPMD/0hT34RpQbZB8R4+4KLhoK/E=; b=mM8Ina0Pc3MyDy/uwI8P7j1dhLzGnL/P0QR6T2hbHWX7Ryi7ePdbvgxcj6JmXRL5P1 +CAiXm3oUUKKF4QJggwhPuZac8xtHrMbrQGVWw7bLwK1KWp8ZVO6QSQDXJB0iBgJDsm9 xR96GCLStjph4NUhsf8xcEvLAwympIvkdirqZqmZccRJxeoX7q1cFfUtq4MNZXZv6xvz elnOmgNsq94c0Xb1Q4OW4i9RUQguo7DFt88IRp/5irhfCkFWt0UZ9VHNkbxtYKAOWIxF HJm84WhN5nH3UDdoWEfdjORdX9RZirEG0D565mQTcb6yYqTtCfHrvHRE2CqiKXJajvQA B23Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Of8btlsC; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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[91.69.153.33]) by smtp.gmail.com with ESMTPSA id x79sm16469106wmd.42.2018.11.23.04.14.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 04:14:49 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Nov 2018 13:14:30 +0100 Message-Id: <20181123121431.22353-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181123121431.22353-1-ard.biesheuvel@linaro.org> References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 4/5] ArmVirtPkg: disregard PcdPrePiCpuMemorySize PCD when sizing the GCD space X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek , Eric Auger MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Move the call to BuildCpuHob () into ArmVirtMemoryInitPeiLib (which is shared between all the ArmVirtPkg targets), and drop the inclusion of CpuPei.inf [which calls it on ArmVirtQemu] and the BuildCpuHob () call from ArmVirtPrePiUniCoreRelocatable [for the other targets]. This makes the size of the GCD address space and page table mappings depend only on the size of the physical address space as exposed by the CPU system registers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/ArmVirtQemu.dsc | 1 - ArmVirtPkg/ArmVirtQemu.fdf | 1 - ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c | 3 +++ ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf | 1 + ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 5 +---- ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf | 1 - ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf | 1 - ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 3 --- ArmVirtPkg/PrePi/PrePi.c | 3 --- 9 files changed, 5 insertions(+), 14 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index 885c6b14b844..cb59c790afcc 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -226,7 +226,6 @@ } ArmPlatformPkg/PlatformPei/PlatformPeim.inf ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf - ArmPkg/Drivers/CpuPei/CpuPei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf diff --git a/ArmVirtPkg/ArmVirtQemu.fdf b/ArmVirtPkg/ArmVirtQemu.fdf index c6a22dc018f3..12bc570c4cb3 100644 --- a/ArmVirtPkg/ArmVirtQemu.fdf +++ b/ArmVirtPkg/ArmVirtQemu.fdf @@ -106,7 +106,6 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Core/Pei/PeiMain.inf INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf - INF ArmPkg/Drivers/CpuPei/CpuPei.inf INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf diff --git a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c index 3f0e9b3a0579..3d86d31ab50e 100644 --- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c +++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c @@ -116,5 +116,8 @@ MemoryPeim ( BuildMemoryTypeInformationHob (); } + // Publish the CPU memory and io spaces sizes + BuildCpuHob (ArmGetPhysicalAddressBits (), FixedPcdGet8 (PcdPrePiCpuIoSize)); + return EFI_SUCCESS; } diff --git a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf index 54879d590a8a..d0e39df84b20 100644 --- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf +++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.inf @@ -59,6 +59,7 @@ gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize [Pcd] gArmTokenSpaceGuid.PcdSystemMemoryBase diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c index 4eca9b895354..ded87d604f4f 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c @@ -46,7 +46,6 @@ ArmVirtGetMemoryMap ( ) { ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; - UINT64 TopOfMemory; ASSERT (VirtualMemoryMap != NULL); @@ -80,11 +79,9 @@ ArmVirtGetMemoryMap ( VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; // Peripheral space after DRAM - TopOfMemory = MIN (1ULL << FixedPcdGet8 (PcdPrePiCpuMemorySize), - TopOfAddressSpace); VirtualMemoryTable[2].PhysicalBase = VirtualMemoryTable[0].Length + VirtualMemoryTable[1].Length; VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase; - VirtualMemoryTable[2].Length = TopOfMemory - + VirtualMemoryTable[2].Length = TopOfAddressSpace - VirtualMemoryTable[2].PhysicalBase; VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf index f2c461e3b55a..5c5b841051ad 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf @@ -45,4 +45,3 @@ [FixedPcd] gArmTokenSpaceGuid.PcdFdSize - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf index f54fb51ee1d4..d12089760b22 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf @@ -49,4 +49,3 @@ [FixedPcd] gArmTokenSpaceGuid.PcdFdSize gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize diff --git a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf index 1587bd92f206..e04bd1b7c497 100755 --- a/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf +++ b/ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf @@ -85,9 +85,6 @@ gArmPlatformTokenSpaceGuid.PcdCoreCount - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize - gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType diff --git a/ArmVirtPkg/PrePi/PrePi.c b/ArmVirtPkg/PrePi/PrePi.c index f6abe2f2016b..ecaaac1545c4 100755 --- a/ArmVirtPkg/PrePi/PrePi.c +++ b/ArmVirtPkg/PrePi/PrePi.c @@ -79,9 +79,6 @@ PrePiMain ( StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize); BuildStackHob (StacksBase, StacksSize); - //TODO: Call CpuPei as a library - BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize)); - // Set the Boot Mode SetBootMode (BOOT_WITH_FULL_CONFIGURATION); From patchwork Fri Nov 23 12:14:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 151858 Delivered-To: patch@linaro.org Received: by 2002:aa7:da0f:0:0:0:0:0 with SMTP id r15csp2051098eds; Fri, 23 Nov 2018 04:15:04 -0800 (PST) X-Google-Smtp-Source: AFSGD/VsDY0BwuEJ5B4xlnze4EVw+X7CGq2McRrgyQPBWch/VXCQgJYmEVIvR/40todlls9etc1/ X-Received: by 2002:a17:902:728c:: with SMTP id d12mr349099pll.284.1542975304503; Fri, 23 Nov 2018 04:15:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542975304; cv=none; d=google.com; s=arc-20160816; b=KOZwciiigzHv4CT2dUbDL4RPht/sKrLH8M6ikdY7fEFfMwrFtKGcwVkevd2wyI7jib dgAJpXIrTCLsJV3yi5qCWKTyVd4e69PsQglNe3ud8tvnBgSZL2XuQAheSBzpCcdct90U FSctn+mIq2Q1i+FUeKyphJRy/qI5cs+Eg4yP4MpASBJDLEhVkt6gmkOK64eTUXZYPok3 ohb8dbH2PG7obnmBbfpBNJShBi+u6BX/wWaCAWn2uL7Mxr+3iIE3MPdBk9iaNT7dNzkD EIji+D1IMGqZKg2WFbNnsIwa3t88KR6HV06iLoNgAwjMR4pguGAePx3JbcMzd8q5uUWK 9w4g== ARC-Message-Signature: i=1; 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[91.69.153.33]) by smtp.gmail.com with ESMTPSA id x79sm16469106wmd.42.2018.11.23.04.14.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 04:14:50 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Nov 2018 13:14:31 +0100 Message-Id: <20181123121431.22353-6-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181123121431.22353-1-ard.biesheuvel@linaro.org> References: <20181123121431.22353-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 5/5] ArmVirtPkg: revert PcdPrePiCpuMemorySize to is default value of 48 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek , Eric Auger MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Drop the PcdPrePiCpuMemorySize definitions that limit it to 40 bits on AArch64 targets. This is no longer appropriate now that KVM has been enhanced to permit any IPA space size permitted by the architecture. This means the value will revert back to its default of 48. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/ArmVirtQemu.dsc | 4 ---- ArmVirtPkg/ArmVirtQemuKernel.dsc | 4 ---- 2 files changed, 8 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index cb59c790afcc..42f2adce80e6 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -143,10 +143,6 @@ gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16 [PcdsFixedAtBuild.AARCH64] - # KVM limits it IPA space to 40 bits (1 TB), so there is no need to - # support anything bigger, even if the host hardware does - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 - # Clearing BIT0 in this PCD prevents installing a 32-bit SMBIOS entry point, # if the entry point version is >= 3.0. AARCH64 OSes cannot assume the # presence of the 32-bit entry point anyway (because many AARCH64 systems diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc index 434d6861a56f..d8fbf14e8f4e 100644 --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc @@ -157,10 +157,6 @@ # gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16 - # KVM limits it IPA space to 40 bits (1 TB), so there is no need to - # support anything bigger, even if the host hardware does - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|40 - [PcdsDynamicDefault.common] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3