From patchwork Wed Nov 28 05:27:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 152180 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp679574ljp; Tue, 27 Nov 2018 21:29:41 -0800 (PST) X-Google-Smtp-Source: AFSGD/VBrsrSzZrxvAm5iFfFrkelS9Ii54xJVcIxjGlqoF5K0cNxYDhrFY2yI37vVc7gAICfsALK X-Received: by 2002:a63:f0c:: with SMTP id e12mr31577643pgl.274.1543382981122; Tue, 27 Nov 2018 21:29:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543382981; cv=none; d=google.com; s=arc-20160816; b=q9z4uhimO0Q7gEVRLz36QAjvZoGYQ3tqg1DyP2pKIlnuzrgoaqyXFuiWjAnwsvdw2j CYc6V4IH3tUugYhk5J8pgskj0LtBXxFGRSG5Aj2ZTCBjDXFt7hctR2luZMlyRZPPnMOO j5gFe5HSFSPmavpXxqHa4vOwUfiG9tJie7ZMu3/0/swfgkm0DTuZSsSjRmhthFbYQjBG heNkQXgCdgITOH1AnRLNfnf93ejjkpNCLbzsWAHe7MsrEwnbON3bxSeqs7S2wu94ka8I S7MqFQfI7slJXtPZ8vsViZT0J87TLf2fVtY6mKnw6BooCTiVzTD7lby2H/K8tFHkwqb+ zbeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=z11Hg5eC7Hyy5ve5za+67F0BpV3LZ3Xu5vPK1lusvmA=; b=PQGVm4WstyuSmQAalTheUyEB/7v3vY9bEMxp4ZYoWhR8OirzSXyUG1YArhr0quuy6k /RU7l3tR0ehZZ47Lxv8YCiPuhEOzOjM99Ooi0eedhs5xLdFcJhRPpHbxi5YNMZhOcDEC F8PEHrpQMhakCsVp7p6bdXQRMmYrdiVmJ5GLp6uvIH0OPeP6yPrLhhTHz0GKoSwxZ6Ti YVCqg/Ml0jyZaa7fniVBzl4zauEJHm8tbzpFHs/IRt9dcu/r1ffOKdJUlJHk49bRqHDw 0QvLGMX8U1MxvQRLi9QBnmn1lAxCTQm2j938GIExUeIzDGCJKVp72ymXapivmab3VUGC d1Cw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=vgVJuzxd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 44si6429476plb.57.2018.11.27.21.29.40; Tue, 27 Nov 2018 21:29:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=vgVJuzxd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727695AbeK1QaC (ORCPT + 32 others); Wed, 28 Nov 2018 11:30:02 -0500 Received: from conuserg-08.nifty.com ([210.131.2.75]:19158 "EHLO conuserg-08.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726972AbeK1Q3z (ORCPT ); Wed, 28 Nov 2018 11:29:55 -0500 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id wAS5RnF4025853; Wed, 28 Nov 2018 14:27:50 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com wAS5RnF4025853 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1543382871; bh=z11Hg5eC7Hyy5ve5za+67F0BpV3LZ3Xu5vPK1lusvmA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vgVJuzxdBj4QJHiEpg1iufdwUw30sTs8SQSUfm/ZPVu+vl2CZW89BiyQM2stIy0DU DSpMSuBWeTdPYxQf94xn7pGJb1Nn8nZm/C5PCW8lyocQIP+iCEbJvvNsD7rhExXvus 7wikFzpOEf7xBTpXDLIjUWqQHUcpz7eeVwnuIqoFLFMBsZGT+KpQSjFdpkDiF0lIPr gtMaBsli11eG20FJK0rj6rjB6FHcTiYuRmDkrEw+bSPD2PVh7Ypjw5SPFLpwAZ+vxk fHN86w5GqWSMYU3v0fsMvW4SZb6W/ZOHmMTAeWU49XtGp30Kqz4JwlN0H2NUmyStKT P6xwZSUVpM6sg== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org, Boris Brezillon , Miquel Raynal Cc: Masahiro Yamada , linux-kernel@vger.kernel.org, Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH v2 1/2] mtd: rawnand: denali: remove ->dev_ready() hook Date: Wed, 28 Nov 2018 14:27:36 +0900 Message-Id: <1543382857-30827-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1543382857-30827-1-git-send-email-yamada.masahiro@socionext.com> References: <1543382857-30827-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Denali NAND IP has no way to read out the current signal level of the R/B# pin. Instead, denali_dev_ready() checks if the R/B# transition has already happened. (The INTR__INT_ACT interrupt is asserted at the rising edge of the R/B# pin.) It is not a correct way to implement the ->dev_ready() hook. In fact, it has a drawback; in the nand_scan_ident phase, the chip detection iterates over maxchips until it fails to find a homogeneous chip. For the last loop, nand_reset() fails if no chip is there. If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready() after NAND_CMD_RESET. However, we know denali_dev_ready() never returns 1 unless there exists a chip that toggles R/B# in that chip select. Then, nand_wait_ready() just ends up with wasting 400 msec, in the end, shows the "timeout while waiting for chip to become ready" warning. Let's remove the mis-implemented dev_ready hook, and fallback to sending the NAND_CMD_STATUS and nand_wait_status_ready(), which bails out more quickly. Signed-off-by: Masahiro Yamada --- Changes in v2: - Rebase drivers/mtd/nand/raw/denali.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index 830ea24..ead6e60 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -204,18 +204,6 @@ static uint32_t denali_wait_for_irq(struct denali_nand_info *denali, return denali->irq_status; } -static uint32_t denali_check_irq(struct denali_nand_info *denali) -{ - unsigned long flags; - uint32_t irq_status; - - spin_lock_irqsave(&denali->irq_lock, flags); - irq_status = denali->irq_status; - spin_unlock_irqrestore(&denali->irq_lock, flags); - - return irq_status; -} - static void denali_read_buf(struct nand_chip *chip, uint8_t *buf, int len) { struct mtd_info *mtd = nand_to_mtd(chip); @@ -288,8 +276,7 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int dat, unsigned int ctrl) return; /* - * Some commands are followed by chip->legacy.dev_ready or - * chip->legacy.waitfunc. + * Some commands are followed by chip->legacy.waitfunc. * irq_status must be cleared here to catch the R/B# interrupt later. */ if (ctrl & NAND_CTRL_CHANGE) @@ -298,13 +285,6 @@ static void denali_cmd_ctrl(struct nand_chip *chip, int dat, unsigned int ctrl) denali->host_write(denali, DENALI_BANK(denali) | type, dat); } -static int denali_dev_ready(struct nand_chip *chip) -{ - struct denali_nand_info *denali = mtd_to_denali(nand_to_mtd(chip)); - - return !!(denali_check_irq(denali) & INTR__INT_ACT); -} - static int denali_check_erased_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, unsigned long uncor_ecc_flags, @@ -1359,7 +1339,6 @@ int denali_init(struct denali_nand_info *denali) chip->legacy.read_byte = denali_read_byte; chip->legacy.write_byte = denali_write_byte; chip->legacy.cmd_ctrl = denali_cmd_ctrl; - chip->legacy.dev_ready = denali_dev_ready; chip->legacy.waitfunc = denali_waitfunc; if (features & FEATURES__INDEX_ADDR) {